Make sure we select the deepest possible C-state during suspend-to-idle.

ok deraadt@, guenther@, mlarkin@, jsg@

remove unused global vars
ok deraadt@ miod@

Add ci_cpuid_level and ci_vendor holding the per-CPU basic cpuid
level and a numeric mapping of the cpu vendor, both from CPUID(0).
Convert the general use of strcmp(cpu_vendor) to simple numeric
tes

Add ci_cpuid_level and ci_vendor holding the per-CPU basic cpuid
level and a numeric mapping of the cpu vendor, both from CPUID(0).
Convert the general use of strcmp(cpu_vendor) to simple numeric
tests of ci_vendor. Track the minimum of all ci_cpuid_level in the
cpuid_level global and continue to use that for what we vmm exposes.

AMD testing help matthieu@ krw@
ok miod@ deraadt@ cheloha@

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We don't do compat32 so MSR_CSTAR shouldn't be set up: delete the
Xsyscall32 stub and UCODE32 selector, set MSR_CSTAR to zero at CPU
startup, and rezero on ACPI resume and VM exit.

requested a while

We don't do compat32 so MSR_CSTAR shouldn't be set up: delete the
Xsyscall32 stub and UCODE32 selector, set MSR_CSTAR to zero at CPU
startup, and rezero on ACPI resume and VM exit.

requested a while ago by deraadt@
AMD VM testing chris@
testing and ok krw@

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Add new amd64-only sysctl machdep.retpoline which says whether the cpu
requires retpoline. If 0, we should do everything in our power to avoid
pure retpoline (replacing it with a simple thunk where

Add new amd64-only sysctl machdep.retpoline which says whether the cpu
requires retpoline. If 0, we should do everything in our power to avoid
pure retpoline (replacing it with a simple thunk where possible), because
by it's nature retpoline converts an indirect-branch into a direct branch
(push to stack & ret), and therefore it is an IBT (endbr64) bypass method.
This sysctl leverages guenther's decision-making logic in the kernel, which
already uses codepatch to fix the kernel retpoline thunk.
In my opinion, the retpoline-using logic really should be flipped; ROP
execution bypassing IBT to re-enter regular control flow is more dangerous
than spectre.
ok kettenis

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Implement Multiple Message MSI support on amd64. This is experimental code
to assist qwx(4) development. We may remove this code again at some point
in the future.

Multiple Message MSI has some se

Implement Multiple Message MSI support on amd64. This is experimental code
to assist qwx(4) development. We may remove this code again at some point
in the future.

Multiple Message MSI has some serious design flaws, especially when
combined with the APIC interrupt controller architecture. It was
superseded by MSI-X. Unfortunately qwx(4) does not implement MSI-X.

ok stsp@, deraadt@

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Clean up old console bootargs

7.3 is long gone, you must have new bootloaders and new kernels.
Zaps both condition and else block, unindent and merge lines where fit.

Feedback OK kettenis
Tests OK

Clean up old console bootargs

7.3 is long gone, you must have new bootloaders and new kernels.
Zaps both condition and else block, unindent and merge lines where fit.

Feedback OK kettenis
Tests OK denis

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all platforms: separate cpu_initclocks() from cpu_startclock()

To give the primary CPU an opportunity to perform clock interrupt
preparation in a machine-independent manner we need to separate the
"

all platforms: separate cpu_initclocks() from cpu_startclock()

To give the primary CPU an opportunity to perform clock interrupt
preparation in a machine-independent manner we need to separate the
"initialization" parts of cpu_initclocks() from the "start the clock
interrupt" parts. Currently, cpu_initclocks() does everything all at
once, so there is no space for this MI setup.

Many platforms have more-or-less already done this separation by
implementing a separate routine named "cpu_startclock()". This patch
promotes cpu_startclock() from de facto standard to mandatory API.

- Prototype cpu_startclock() in sys/systm.h alongside cpu_initclocks().
The separation of responsibility between the two routines is a bit
fuzzy but the basic guidelines are as follows:

+ cpu_initclocks() must initialize hz, stathz, and profhz, and call
clockintr_init().

+ cpu_startclock() must call clockintr_cpu_init() and start the clock
interrupt cycle on the calling CPU.

These guidelines will shift in the future, but that's the way things
stand as of *this* commit.

- In initclocks(): first call cpu_initclocks(), then do MI setup, and
last call cpu_startclock().

- On platforms where cpu_startclock() already exists: don't call
cpu_startclock() from cpu_initclocks() anymore.

- On platforms where cpu_startclock() doesn't yet exist: implement it.
Usually this is as simple as dividing cpu_initclocks() in two.

Tested on amd64 (i8254, lapic), arm64, i386 (i8254, lapic), macppc,
mips64/octeon, and sparc64. Tested on arm/armv7 (agtimer(4)) by
phessler@ and jmatthew@. Tested on m88k/luna88k by aoyama@. Tested
on powerpc64 by gkoehler@ and mlarkin@. Tested on riscv64 by
jmatthew@.

Thread: https://marc.info/?l=openbsd-tech&m=169195251322149&w=2

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Follow the lead of mips64 and make cpu_idle_cycle() just call the
indirect pointer itself and provide an initializer for that going
to the default "just enable interrupts and halt" path.

ok kettenis@

Enable Indirect Branch Tracking for amd64 userland, using XSAVES/XRSTORS
to save/restore the state and enabling it at exec-time (and for
signal handling) if the PS_NOBTCFI flag isn't set.

Note: this

Enable Indirect Branch Tracking for amd64 userland, using XSAVES/XRSTORS
to save/restore the state and enabling it at exec-time (and for
signal handling) if the PS_NOBTCFI flag isn't set.

Note: this changes the format of the sc_fpstate data in the signal
context to possibly be in compressed format: starting now we just
guarantee that that state is in a format understood by the XRSTOR
instruction of the system that is being executed on.

At this time, passing sigreturn a corrupt sc_fpstate now results
in the process exiting with no attempt to fix it up or send a
T_PROTFLT trap. That may change.

prodding by deraadt@
issues with my original signal handling design identified by kettenis@

lots of base and ports preparation for this by deraadt@ and the
libressl and ports teams

ok deraadt@ kettenis@

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Move the generic variable definitions from the ASM at the top of
locore.S to be in C in cpu.c, machdep.c, pmap.c, or bus_space.c for
better typing/debug info. Delete REALBASEMEM, REALEXTMEM, and
bio

Move the generic variable definitions from the ASM at the top of
locore.S to be in C in cpu.c, machdep.c, pmap.c, or bus_space.c for
better typing/debug info. Delete REALBASEMEM, REALEXTMEM, and
biosextmem as unused/ignored.

ok mpi@ krw@ mlarkin@

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amd64: add delay_fini()

Not all of the clocks with a delay(9) implementation necessarily keep
ticking across suspend/resume. We need a clean way to reverse
delay_init() during suspend when those cl

amd64: add delay_fini()

Not all of the clocks with a delay(9) implementation necessarily keep
ticking across suspend/resume. We need a clean way to reverse
delay_init() during suspend when those clocks stop ticking.

Hence, delay_fini(). delay_fini() resets delay_func() to
i8254_delay() if the given function pointer is the active delay(9)
implementation.

ok mlarkin@

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Simplfity setregs() by passing it the ps_strings and switching
sys_execve() to return EJUSTRETURN.

setregs() is the MD routine used by sys_execve() to set up the
thread's trapframe and PCB such that

Simplfity setregs() by passing it the ps_strings and switching
sys_execve() to return EJUSTRETURN.

setregs() is the MD routine used by sys_execve() to set up the
thread's trapframe and PCB such that, on 'return' to userspace, it
has the register values defined by the ABI and otherwise zero. It
had to set the syscall retval[] values previously because the normal
syscall return path overwrites a couple registers with the retval[]
values. By instead returning EJUSTRETURN that and some complexity
with program-counter handling on m88k and sparc64 goes away.

Also, give setregs() add a 'struct ps_strings *arginfo' argument
so powerpc, powerpc64, and sh can directly get argc/argv/envp
values for registers instead of copyin()ing the one in userspace.

Improvements from miod@ and millert@
Testing assistance miod@, kettenis@, and aoyama@
ok miod@ kettenis@

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Add the guts for EFI runtime services support on amd64. This will be used
in the future to implement support for things like EFI variables.

ok krw@ (a few others ok'ed earlier incarnations of this

Add the guts for EFI runtime services support on amd64. This will be used
in the future to implement support for things like EFI variables.

ok krw@ (a few others ok'ed earlier incarnations of this diff)

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amd64, i386: add delay_init(): basic delay(9) implementation management

Because the clock situation on x86 and amd64 is a terminal
clusterfuck, there are many different ways to delay(9). We need a

amd64, i386: add delay_init(): basic delay(9) implementation management

Because the clock situation on x86 and amd64 is a terminal
clusterfuck, there are many different ways to delay(9). We need a
rudimentary mechanism for gracefully switching to progressively better
delay(9) implementations as they become available during boot without
riddling the code with ifdefs and function pointer comparisons.

This patch adds delay_init() to both amd64 and i386. If the quality
value passed to delay_init() exceeds the quality value of the current
delay_func, delay_init() changes delay_func to the given function
pointer and updates the quality value. Both platforms start with
delay_func set to i8254_delay() and a quality value of zero: all other
delay(9) implementations are preferable.

Idea and patch provided by jsg@. With tons of input, research, and
advice from jsg@.

Link: https://marc.info/?l=openbsd-tech&m=166053729104923&w=2

ok mlarkin@ jsg@

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Start to add annotations to the cpu_info members, doing I/a/o for
immutable/atomic/owned ala <sys/proc.h>. Move CPUF_USERSEGS and
CPUF_USERXSTATE, which really are private to the CPU, into a new
ci_

Start to add annotations to the cpu_info members, doing I/a/o for
immutable/atomic/owned ala <sys/proc.h>. Move CPUF_USERSEGS and
CPUF_USERXSTATE, which really are private to the CPU, into a new
ci_pflags and rename s/CPUF_/CPUPF_/. Make all (remaining) ci_flags
alterations via atomic_{set,clear}bits_int(), so its annotation
isn't a lie. Delete ci_info member as unused all the way from
rev 1.1

ok jsg@ mlarkin@

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Add support for using non-standard UARTs (such as the Synopsys DesignWare
UART found on AMD's Ryzen Embedded V1000 family) as an early console.
This requires additional parameters to be passed by the

Add support for using non-standard UARTs (such as the Synopsys DesignWare
UART found on AMD's Ryzen Embedded V1000 family) as an early console.
This requires additional parameters to be passed by the bootloader to the
kernel so it changes the struct for the BOOTARG_CONSDEV boot argument.
The old struct will still be supported until OpenBSD 7.3 has been released
such that new kernels boot with the old bootloader.

ok anton@, deraadt@

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An old hack skips use of memory regions < 1MB size, because some machines
put BIOS objects into there, and rely upon them. We are shocked, SHOCKED,
to find a machine that does so in a large object (

An old hack skips use of memory regions < 1MB size, because some machines
put BIOS objects into there, and rely upon them. We are shocked, SHOCKED,
to find a machine that does so in a large object (Supermicro 5019D-FTN4).
So now we need to ignore memory regions < 32MB in size. If we put this
memory into use, the zerothread will soon clear it, and on this particular
case the machine resets because something in AML or SMI gets unhappy.
Other machines with similar problems may exhibit other misbehaviours, so
this could fix heisenbugs. Sadly I expect products to get worse.
ok kettenis, miod

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Capture a repeated pattern into sysctl_securelevel_int function

A few variables in the kernel are only writeable before securelevel is
raised. It makes sense to handle them with less code.

OK sthen

Capture a repeated pattern into sysctl_securelevel_int function

A few variables in the kernel are only writeable before securelevel is
raised. It makes sense to handle them with less code.

OK sthen@ bluhm@

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Change sendsig() interface so that the MD code does not need to access
data from struct process anymore. This changes how siginfo and onstack
are accessed and make sendsig() more MP friendly.
With an

Change sendsig() interface so that the MD code does not need to access
data from struct process anymore. This changes how siginfo and onstack
are accessed and make sendsig() more MP friendly.
With and OK semarie@ OK kettenis@

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Update the remaining SYSCTL_INT_READONLY cases

OK mvs@

spelling

Remove trailing whitespace

No code/functional change

Turn simple sysctl_rdint into cpuctl_vars entries

ok gkoehler@

In case of failure, call sigexit() from trapsignal instead of sensig().

Simplify MD code and reduce the amount of recursion into the signal code
which helps when dealing with locks.

ok cheloha@, de

In case of failure, call sigexit() from trapsignal instead of sensig().

Simplify MD code and reduce the amount of recursion into the signal code
which helps when dealing with locks.

ok cheloha@, deraadt@

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