add references to 10h 12h revision guides

add SH-B0 0x00000f50 socket 940 family 0Fh Opteron
we already had SH-B0 0x00000f40 socket 754 family 0Fh Athlon 64

SH-B0 is part of amd64_errata_set8[]. Used for:
Errata 89: Potential Deadlock With

add SH-B0 0x00000f50 socket 940 family 0Fh Opteron
we already had SH-B0 0x00000f40 socket 754 family 0Fh Athlon 64

SH-B0 is part of amd64_errata_set8[]. Used for:
Errata 89: Potential Deadlock With Locked Transactions

ok deraadt@

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only call printf the first time amd64_errata() is called
it may later be used from a resume path when we don't want to print

same change as amd64 amd64errata.c 1.11 by robert

ok robert@ deraadt@

remove HY_D1_G34R1 enum value and just use HY_D1

HY-D1 C32r1 (0x00100f81) and HY-D1 G34r1 (0x00100f91) have the same
errata and multiple cpuid values can map to a single enum value.

Change ci_dev.dv_xname to ci_dev->dv_xname in debugging printf()
to make it compile when enabled.
from hshoexer@

Recommit preparation for i386 Meltdown fix after OpenBSD 6.3 release.

- provide a cpu_softc for cpu_attach() etc.
- replace per PCB TSS with per CPU TSS

The first change prepares for cpu_info being

Recommit preparation for i386 Meltdown fix after OpenBSD 6.3 release.

- provide a cpu_softc for cpu_attach() etc.
- replace per PCB TSS with per CPU TSS

The first change prepares for cpu_info being embedded in a
cpu_full_info. Therefore during autoconf/cpu_attach we hand down
a softc.

The second change removes the per PCB TSS. We now have one TSS per
CPU, thus in cpu_switchto() we only have to patch the ring 0 stack
pointer instead of loading a new TSS. This also allows for cleaning
up the GDT, so we only have a single slot for the TSS.

from hshoexer@; OK deraadt@

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iBackout the preparations for fixing Meltdown on i386. The task was
only halfway done and the current state does not help anybody. For
OpenBSD 6.3 release go back to the original code before 2018/0

iBackout the preparations for fixing Meltdown on i386. The task was
only halfway done and the current state does not help anybody. For
OpenBSD 6.3 release go back to the original code before 2018/03/13.
This gives us a stable release and the changes will come back later.
discussed with guenther@ deraadt@ hshoexer@

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Preparation for i386 Meltdown fix:

- provide a cpu_softc for cpu_attach() etc.
- replace per PCB TSS with per CPU TSS

The first change prepares for cpu_info being embedded in a
cpu_full_info. Ther

Preparation for i386 Meltdown fix:

- provide a cpu_softc for cpu_attach() etc.
- replace per PCB TSS with per CPU TSS

The first change prepares for cpu_info being embedded in a
cpu_full_info. Therefore during autoconf/cpu_attach we hand down
a softc.

The second change removes the per PCB TSS. We now have one TSS per
CPU, thus in cpu_switchto() we only have to patch the ring 0 stack
pointer instead of loading a new TSS. This also allows for cleaning
up the GDT, so we only have a single slot for the TSS.

from hshoexer@; OK deraadt@

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If you use sys/param.h, you don't need sys/types.h

add MULTIPROCESSOR guards around otherwise unused pieces to satisfy clang
ok deraadt@ kettenis@

Errata 122 is currently disabled so stick amd64_errata_set4 under #if 0 too
to appease the LLVM warning.

amd64errata.c:103:22: error: unused variable 'amd64_errata_set4' [-Werror,-Wunused-const-vari

Errata 122 is currently disabled so stick amd64_errata_set4 under #if 0 too
to appease the LLVM warning.

amd64errata.c:103:22: error: unused variable 'amd64_errata_set4' [-Werror,-Wunused-const-variable]

ok sthen@

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de-static-ize prototypes as well, which makes these functions not-static
for real!

Pointed out by Alexey E. Suslikov.

de-static-ize, such that people don't get confused by aesni failures on
AMD hardware the next time somebody tries to run on a broken KVM hypervisor.

Implement the AMD suggested workaround for family 10h & 12h errata 721
"Processor May Incorrectly Update Stack Pointer" by setting a bit
marked 'reserved' in an MSR that is only "documented" to exist

Implement the AMD suggested workaround for family 10h & 12h errata 721
"Processor May Incorrectly Update Stack Pointer" by setting a bit
marked 'reserved' in an MSR that is only "documented" to exist on 12h.

AMD claim this problem can only occur in 64-bit mode, set the workaround
bit on i386 in case this isn't true and in the interest of keeping the
errata in sync between i386/amd64.

ok deraadt@

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First pass at removing clauses 3 and 4 from NetBSD licenses.

Not sure what's more surprising: how long it took for NetBSD to
catch up to the rest of the BSDs (including UCB), or the amount of
code t

First pass at removing clauses 3 and 4 from NetBSD licenses.

Not sure what's more surprising: how long it took for NetBSD to
catch up to the rest of the BSDs (including UCB), or the amount of
code that NetBSD has claimed for itself without attributing to the
actual authors.

OK deraadt@

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Bring in the AMD errata checks from amd64.

Changes to either copy of amd64errata.c must be replicated in the other.

ok deraadt@