powerpc64: trigger deferred DEC interrupts from splx(9)

In order to move to a machine-independent clock interrupt subsystem,
the powerpc64 clock interrupt code needs to work without knowing
anything

powerpc64: trigger deferred DEC interrupts from splx(9)

In order to move to a machine-independent clock interrupt subsystem,
the powerpc64 clock interrupt code needs to work without knowing
anything about the clock interrupt schedule.

The easiest way to do this is, if the DEC fires while the CPU's IPL is
at or above IPL_CLOCK, to postpone clock interrupt work until the
clock interrupt is logically unmasked from splx(9).

Because we no longer defer work until the next tick, we don't need to
keep track of pending statclock ticks in the cpu_info struct.

With input from kettenis@.

Graciously compiled and tested by gkoehler@ and kettenis@.

Link: https://marc.info/?l=openbsd-tech&m=165862522102767&w=2

ok kettenis@ gkoehler@.

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Support "empty" phandles in interrups-extended properties. This is needed
to support the device tree binding for the "apple,admac" controller.

ok visa@, patrick@

Do the NULL -> cpu_info_primary conversion in the interrupt controller
drivers instead of the "midlayer". I had missed a couple of places in
the midlayer and instead of fixing this in several places

Do the NULL -> cpu_info_primary conversion in the interrupt controller
drivers instead of the "midlayer". I had missed a couple of places in
the midlayer and instead of fixing this in several places it is better
to do it in the functions that get invoked in the end.

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Use an IPI, so hw.setperf affects all cores in the mp kernel.

Before, apm -A was speeding up only one core of my POWER9.
Now, apm -A speeds up all cores, so my parallel builds are faster.

I copy th

Use an IPI, so hw.setperf affects all cores in the mp kernel.

Before, apm -A was speeding up only one core of my POWER9.
Now, apm -A speeds up all cores, so my parallel builds are faster.

I copy the idea from amd64 and i386: mp_setperf() sends an IPI to all
cpus; the interrupt handler calls ul_setperf().

ok deraadt@ kettenis@

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Correctly pass the "struct cpu_info" pointer along when establishing
interrupts. This fixes IPIs on machines with certain (newer?) OPAL
firmware. It also allows implementing pci_intr_establish_cpu(

Correctly pass the "struct cpu_info" pointer along when establishing
interrupts. This fixes IPIs on machines with certain (newer?) OPAL
firmware. It also allows implementing pci_intr_establish_cpu(9), which
is needed for distributing interrupt handlers across CPUs.

tested by gkoehler@

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Add support for "normal" external interrupts. Needed for running on POWER8
and earlier CPUs.

Make switching CPUs in DDB work.

Implement IPIs.

Add FDT interrupt support.

Make soft interrupts work.

Add support for the XIVE interrupt controller found on POWER9 CPUs.