remove prototypes with no matching function

spelling
feedback and ok tb@ jmc@ ok ratchov@

Introduce two quirks to prevent attaching ATA and ATAPI devices

Hyper-V and Xen have varying support for detaching emulated IDE
devices ranging from none on Hyper-V to only IDE disks but not
CDROM (

Introduce two quirks to prevent attaching ATA and ATAPI devices

Hyper-V and Xen have varying support for detaching emulated IDE
devices ranging from none on Hyper-V to only IDE disks but not
CDROM (Xen). The quirk mechanism provides a way of enforcing the
desired behavior.

With suggestions and OK kettenis, tedu, mlarkin

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The 80's called and want their interface back. Remove last fragments of
ST-506 support. Remove redundant 'precomp' variables/fields and rename
remaining few to 'features' to be consistant with the re

The 80's called and want their interface back. Remove last fragments of
ST-506 support. Remove redundant 'precomp' variables/fields and rename
remaining few to 'features' to be consistant with the rest of the code.

Consensus that no ST-506 disks (requiring ISA cards, <120MB, usually
rife with bad sectors that can't be worked around) are still running
OpenBSD.

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dont piggyback on C_PRIVATEXFER because it must not touch splx.
because im using it while the system is up and running i need the
xfer free path to take the right locks, which PRIVATEXFER doesnt.
inv

dont piggyback on C_PRIVATEXFER because it must not touch splx.
because im using it while the system is up and running i need the
xfer free path to take the right locks, which PRIVATEXFER doesnt.
invent a new C_SCSIXFER flag that provides the safety needed.

this fixes issues people have had installing from atapiscsi(4) cdrom
devices.

bug spelunking and tailq corruption identified by jsing@
ok jsing@

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move atapiscsi to iopools by making the entire ata layer use them too.

this would have been difficult before because the ata completion
paths try to be helfpul by freeing xfers on the adapters behal

move atapiscsi to iopools by making the entire ata layer use them too.

this would have been difficult before because the ata completion
paths try to be helfpul by freeing xfers on the adapters behalf,
whch doesn't work in the new world scsi model where the layer that
allocated the thing is responsible for freeing it, and expects to
get it back and maybe use it again. however, deraadt@ added magic
flags for hibernate that im now using to keep ata xfers for the
scsi layers.

committing this now so itll be tested. i cant think of a better time
to handle fallout from diffs like this than hackathons.

discussed with deraadt@

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Cope with the start-dma-before-init errata and some other register setup
errata for the Serverworks SATA chipset found on the macppc xserve G5.
ok jmc

Refactor queue allocation and initialization into a wdc_alloc_queue()
function, and let attachment code calls this rather than malloc(9).
This prevents re-initialization of the queue in shared queue

Refactor queue allocation and initialization into a wdc_alloc_queue()
function, and let attachment code calls this rather than malloc(9).
This prevents re-initialization of the queue in shared queue chipsets.
Also, add wdc_free_queue() as a complementary function.

Earlier version (without wdc_free_queue()) tested by sthen@ and Amit
Kulkarni on various pciide(4) chips.

ok dlg@

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Eliminate a few unused wdc capability flags (WDC_CAPABILITY_HWLOCK,
WDC_CAPABILITY_ATA_NOSTREAM, and WDC_CAPABILITY_ATAPI_NOSTREAM).

ok dlg@, jsg@, krw@

keep an eye out for wdc registers returning 0xff. if they return 0xff,
this probably means the controller is dead -- as in, a hot plug eject
event. in that case, mark the driver dead and try harder

keep an eye out for wdc registers returning 0xff. if they return 0xff,
this probably means the controller is dead -- as in, a hot plug eject
event. in that case, mark the driver dead and try harder to return -1
in the interrupt handler.
tested by many
ok dlg, miod did not object

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Change wdc_reset_channel() to take a `no wait' argument. Pass in turn this
argument to wdcreset(), to have it skip waiting until active channels see
their BUSY bit clear in the status register.

Use

Change wdc_reset_channel() to take a `no wait' argument. Pass in turn this
argument to wdcreset(), to have it skip waiting until active channels see
their BUSY bit clear in the status register.

Use this feature in the resume path, during the first reset operation. The
first reset is supposed to only wake up the controller, and the disks don't
come back until the second reset is issued, therefore waiting for them to
report themselves as ready after the first reset, but before the second, is
moot - and as a matter of fact some controllers, such as the AMD 754 and
clones/offspring (e.g. Geode) keep the BUSY bit asserted after the first
reset.

Last, but not least, make sure wd@ata invokes wd_get_params() again before
returning from the resume code, as we will still be using polled transfers
for a short while.

This causes the Lemote Yeelong to resume within less than one second, instead
of the lousy 30 seconds wait between the two resets; and the wd_get_params()
voodoo prevents it from getting spurious ide interrupts afterwards.

wd_get_params() magic from dlg; rest of the work by yours truly after enough
prodding by dlg@ and pirofti@, among others. ok deraadt@ dlg@

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wd_hibernate_io() is a standalone disk io writer which tries to not
damage kernel memory very much while doing the job. It is not very
pretty yet, but improving it will need some MI work.
ok mlarkin

wd_hibernate_io() is a standalone disk io writer which tries to not
damage kernel memory very much while doing the job. It is not very
pretty yet, but improving it will need some MI work.
ok mlarkin jsg dlg

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pcmcia/wdc_pcmcia.c

hander -> handler

ok miod@

Get rid of devact enum, substitute it with an int and coresponding defines.

This is needed for the addition of further suspend/resume actions.

Okay deraadt@, marco@.

Add some minimalistic detach/unmap bits for pciide,
done using a chipset unmap callback.

Still needs to work to distinguish between compat
register mappings and compat interrupts so we
don't get cau

Add some minimalistic detach/unmap bits for pciide,
done using a chipset unmap callback.

Still needs to work to distinguish between compat
register mappings and compat interrupts so we
don't get caught out.

Tested with a diskless sii3112 CardBus eSATA controller
by me, and testing and feedback by deraadt@ with
a phison based expresscard SSD.

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First pass at removing clauses 3 and 4 from NetBSD licenses.

Not sure what's more surprising: how long it took for NetBSD to
catch up to the rest of the BSDs (including UCB), or the amount of
code t

First pass at removing clauses 3 and 4 from NetBSD licenses.

Not sure what's more surprising: how long it took for NetBSD to
catch up to the rest of the BSDs (including UCB), or the amount of
code that NetBSD has claimed for itself without attributing to the
actual authors.

OK deraadt@

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wdcrestart() is never used

atapi_print() is never used

Provide a function pointer that allows for the wdc reset
method to be changed as required.
This will be required for dealing with several chips in pciide.

Fix LBA48 access for ServerWorks SATA.
ok grange@

Add a callback drv_probe() to allow underlying ata controller driver
to probe for drives in its own way. It's a no-op for now but will be
needed for native sata support.

Move declaration of default _vtbl members (wdc_default_*) to
wdcvar.h.

Define number of general and ``shadow'' (overlapping) ATA registers;
from NetBSD.

Multiple inclusion protection.