the myx_cmd struct has to be 4 byte aligned for use with bus_space

i don't know how this didn't blow up before.

enum thing needs commas between items.

unbreaks the build...

there's some new errors that commands can complete with too

there's a bunch of new commands in newer firmwares

turns out these chips can handle buffers up to 9400 bytes in length.

raise the mtu to 9380 bytes so we can take advantage of the extra space.

i need to revisit the macro names at some point.

myri employees and their drivers for linux and solaris have repeatedly
told me that if you're going to rx into buffers greater than 4k in
size, they have to be aligned to a 4k boundary.

the mru of t

myri employees and their drivers for linux and solaris have repeatedly
told me that if you're going to rx into buffers greater than 4k in
size, they have to be aligned to a 4k boundary.

the mru of this chip is 9k, but ive been using the 12k mcl pool to
provide the alignment. however, if we move to putting 8 items on a
pool page there'll be enough slack space in the mcl12k pool pages
to allow item colouring, which in turn will break the chip requirement
above. in practice the chips i have seem to work fine with unaligned
buffers, but i dont want to risk breaking early revision chips.

this moves myx to using a private pool for allocating clusters for
the big rx ring. the item size is 9k, but we specify a 4k alignment
so every item we get out of it will be correct for the chip.

show more ...

we're not using these macros

annotate some packed structures with the alignment the hardware
requires and the driver provides. without this gcc assumes the
alignment of these structures is 1, which leads to some horrible
asm.

t

annotate some packed structures with the alignment the hardware
requires and the driver provides. without this gcc assumes the
alignment of these structures is 1, which leads to some horrible
asm.

this is particularly interesting when reading stuff from the
myx_status struct (like the txdone count) which needs to be atomic.
doing byte reads and shifting them into a word in registers isnt
atomic. its also probably a bit slow. specifying the alignment fixes
this.

deraadt@ warned me about this maybe 8 years ago.

show more ...

i prefer 16k ints/sec to 32k ints/sec.

i got myx working!

casts so this compiles on i386.
ok reyk

initialize the rings

initial bits of a new driver for the Myricom Myri-10G Lanai-Z8E 10Gb
Ethernet chipset. not working yet.

ok dlg@