41d0ad1d | 16-Mar-2024 |
Markus Armbruster <armbru@redhat.com> |
qapi: Rename visitor parameter @variants to @alternatives
A previous commit narrowed the type of .visit_alternate_type() parameter @variants from QAPISchemaVariants to QAPISchemaAlternatives. Rename
qapi: Rename visitor parameter @variants to @alternatives
A previous commit narrowed the type of .visit_alternate_type() parameter @variants from QAPISchemaVariants to QAPISchemaAlternatives. Rename it to @alternatives.
One of them passes @alternatives to helper function gen_visit_alternate(). Rename its @variants parameter to @alternatives as well.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
show more ...
|
d1da8af8 | 15-Mar-2024 |
Markus Armbruster <armbru@redhat.com> |
qapi: Rename visitor parameter @variants to @branches
The previous commit narrowed the type of .visit_object_type() parameter @variants from QAPISchemaVariants to QAPISchemaBranches. Rename it to @b
qapi: Rename visitor parameter @variants to @branches
The previous commit narrowed the type of .visit_object_type() parameter @variants from QAPISchemaVariants to QAPISchemaBranches. Rename it to @branches.
Same for .visit_object_type_flat().
A few of these pass @branches to helper functions: QAPISchemaGenRSTVisitor.visit_object_type() to ._nodes_for_members() and ._nodes_for_variant_when(), and QAPISchemaGenVisitVisitor.visit_object_type() to gen_visit_object_members(). Rename the helpers' @variants parameters to @branches as well.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
show more ...
|
029171b5 | 19-Apr-2024 |
Thomas Huth <thuth@redhat.com> |
docs/about: Deprecate the old "UltraSparc" CPU names that contain a "+"
For consistency we should drop the names with a "+" in it in the long run.
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@il
docs/about: Deprecate the old "UltraSparc" CPU names that contain a "+"
For consistency we should drop the names with a "+" in it in the long run.
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240419084812.504779-5-thuth@redhat.com> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
show more ...
|
49ce37e3 | 19-Apr-2024 |
Thomas Huth <thuth@redhat.com> |
docs/system/target-sparc: Improve the Sparc documentation
Add some words about how to enable or disable boolean features, and remove the note about a Linux kernel being available on the QEMU website
docs/system/target-sparc: Improve the Sparc documentation
Add some words about how to enable or disable boolean features, and remove the note about a Linux kernel being available on the QEMU website (they have been removed long ago already), and the note about NetBSD and OpenBSD still having issues (they should work fine nowadays).
Fixes: https://gitlab.com/qemu-project/qemu/-/issues/2141 Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240419084812.504779-4-thuth@redhat.com> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
show more ...
|
7cdfcea6 | 11-Mar-2024 |
Paolo Bonzini <pbonzini@redhat.com> |
docs: document new convention for Kconfig board symbols
Boards have been switched to use "default y" and are now listed in default-configs/*.mak only for convenience.
Document this change and the n
docs: document new convention for Kconfig board symbols
Boards have been switched to use "default y" and are now listed in default-configs/*.mak only for convenience.
Document this change and the new possibilities that it allows.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
show more ...
|
c771f883 | 24-Apr-2024 |
Inès Varhol <ines.varhol@telecom-paris.fr> |
hw/display : Add device DM163
This device implements the IM120417002 colors shield v1.1 for Arduino (which relies on the DM163 8x3-channel led driving logic) and features a simple display of an 8x8
hw/display : Add device DM163
This device implements the IM120417002 colors shield v1.1 for Arduino (which relies on the DM163 8x3-channel led driving logic) and features a simple display of an 8x8 RGB matrix. The columns of the matrix are driven by the DM163 and the rows are driven externally.
Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240424200929.240921-2-ines.varhol@telecom-paris.fr [PMM: updated to new reset hold method prototype] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
663163f0 | 18-Apr-2024 |
Peter Maydell <peter.maydell@linaro.org> |
target/arm: Enable FEAT_Spec_FPACC for -cpu max
FEAT_Spec_FPACC is a feature describing speculative behaviour in the event of a PAC authontication failure when FEAT_FPACCOMBINE is implemented. FEAT
target/arm: Enable FEAT_Spec_FPACC for -cpu max
FEAT_Spec_FPACC is a feature describing speculative behaviour in the event of a PAC authontication failure when FEAT_FPACCOMBINE is implemented. FEAT_Spec_FPACC means that the speculative use of pointers processed by a PAC Authentication is not materially different in terms of the impact on cached microarchitectural state (caches, TLBs, etc) between passing and failing of the PAC Authentication.
QEMU doesn't do speculative execution, so we can advertise this feature.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240418152004.2106516-6-peter.maydell@linaro.org
show more ...
|
74360f35 | 18-Apr-2024 |
Peter Maydell <peter.maydell@linaro.org> |
target/arm: Enable FEAT_ETS2 for -cpu max
FEAT_ETS2 is a tighter set of guarantees about memory ordering involving translation table walks than the old FEAT_ETS; FEAT_ETS has been retired from the A
target/arm: Enable FEAT_ETS2 for -cpu max
FEAT_ETS2 is a tighter set of guarantees about memory ordering involving translation table walks than the old FEAT_ETS; FEAT_ETS has been retired from the Arm ARM and the old ID_AA64MMFR1.ETS == 1 now gives no greater guarantees than ETS == 0.
FEAT_ETS2 requires: * the virtual address of a load or store that appears in program order after a DSB cannot be translated until after the DSB completes (section B2.10.9) * TLB maintenance operations that only affect translations without execute permission are guaranteed complete after a DSB (R_BLDZX) * if a memory access RW2 is ordered-before memory access RW2, then RW1 is also ordered-before any translation table walk generated by RW2 that generates a Translation, Address size or Access flag fault (R_NNFPF, I_CLGHP)
As with FEAT_ETS, QEMU is already compliant, because we do not reorder translation table walk memory accesses relative to other memory accesses, and we always guarantee to have finished TLB maintenance as soon as the TLB op is done.
Update the documentation to list FEAT_ETS2 instead of the no-longer-existent FEAT_ETS, and update the 'max' CPU ID registers.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240418152004.2106516-4-peter.maydell@linaro.org
show more ...
|
e1973951 | 18-Apr-2024 |
Peter Maydell <peter.maydell@linaro.org> |
target/arm: Enable FEAT_CSV2_3 for -cpu max
FEAT_CSV2_3 adds a mechanism to identify if hardware cannot disclose information about whether branch targets and branch history trained in one hardware d
target/arm: Enable FEAT_CSV2_3 for -cpu max
FEAT_CSV2_3 adds a mechanism to identify if hardware cannot disclose information about whether branch targets and branch history trained in one hardware described context can control speculative execution in a different hardware context.
There is no branch prediction in TCG, so we don't need to do anything to be compliant with this. Upadte the '-cpu max' ID registers to advertise the feature.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240418152004.2106516-3-peter.maydell@linaro.org
show more ...
|
bc980d66 | 18-Apr-2024 |
Peter Maydell <peter.maydell@linaro.org> |
docs/system/arm/emulation.rst: Add missing implemented features
As of version DDI0487K.a of the Arm ARM, some architectural features which previously didn't have official names have been named. Add
docs/system/arm/emulation.rst: Add missing implemented features
As of version DDI0487K.a of the Arm ARM, some architectural features which previously didn't have official names have been named. Add these to the list of features which QEMU's TCG emulation supports. Mostly these are features which we thought of as part of baseline 8.0 support. For SVE and SVE2, the names have been brought into line with the FEAT_* naming convention of other extensions, and some sub-components split into separate FEAT_ items. In a few cases (eg FEAT_CCIDX, FEAT_DPB2) the omission from our list was just an oversight.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240418152004.2106516-2-peter.maydell@linaro.org
show more ...
|
b1f8536c | 22-Apr-2024 |
Manos Pitsidianakis <manos.pitsidianakis@linaro.org> |
docs/devel: fix minor typo in submitting-a-patch.rst
s/Resolved:/Resolves:/
Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Message-ID: <20240422124128.4034482-1-manos.pitsidian
docs/devel: fix minor typo in submitting-a-patch.rst
s/Resolved:/Resolves:/
Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Message-ID: <20240422124128.4034482-1-manos.pitsidianakis@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
show more ...
|
92741432 | 29-Mar-2024 |
Arnaud Minier <arnaud.minier@telecom-paris.fr> |
hw/arm: Add the USART to the stm32l4x5 SoC
Add the USART to the SoC and connect it to the other implemented devices.
Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr> Signed-off-by: Inè
hw/arm: Add the USART to the stm32l4x5 SoC
Add the USART to the SoC and connect it to the other implemented devices.
Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240329174402.60382-5-arnaud.minier@telecom-paris.fr [PMM: fixed a few checkpatch nits] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
631f46d4 | 12-Apr-2024 |
Peter Maydell <peter.maydell@linaro.org> |
reset: Add RESET_TYPE_SNAPSHOT_LOAD
Some devices and machines need to handle the reset before a vmsave snapshot is loaded differently -- the main user is the handling of RNG seed information, which
reset: Add RESET_TYPE_SNAPSHOT_LOAD
Some devices and machines need to handle the reset before a vmsave snapshot is loaded differently -- the main user is the handling of RNG seed information, which does not want to put a new RNG seed into a ROM blob when we are doing a snapshot load.
Currently this kind of reset handling is supported only for: * TYPE_MACHINE reset methods, which take a ShutdownCause argument * reset functions registered with qemu_register_reset_nosnapshotload
To allow a three-phase-reset device to also distinguish "snapshot load" reset from the normal kind, add a new ResetType RESET_TYPE_SNAPSHOT_LOAD. All our existing reset methods ignore the reset type, so we don't need to update any device code.
Add the enum type, and make qemu_devices_reset() use the right reset type for the ShutdownCause it is passed. This allows us to get rid of the device_reset_reason global we were using to implement qemu_register_reset_nosnapshotload().
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Luc Michel <luc.michel@amd.com> Message-id: 20240412160809.1260625-7-peter.maydell@linaro.org
show more ...
|
41d49ec1 | 12-Apr-2024 |
Peter Maydell <peter.maydell@linaro.org> |
docs/devel/reset: Update to new API for hold and exit phase methods
Update the reset documentation's example code to match the new API for the hold and exit phase method APIs where they take a Reset
docs/devel/reset: Update to new API for hold and exit phase methods
Update the reset documentation's example code to match the new API for the hold and exit phase method APIs where they take a ResetType argument.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Luc Michel <luc.michel@amd.com> Message-id: 20240412160809.1260625-6-peter.maydell@linaro.org
show more ...
|
14a16403 | 19-Apr-2024 |
Jinjie Ruan <ruanjinjie@huawei.com> |
target/arm: Add FEAT_NMI to max
Enable FEAT_NMI on the 'max' CPU.
Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter
target/arm: Add FEAT_NMI to max
Enable FEAT_NMI on the 'max' CPU.
Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240407081733.3231820-24-ruanjinjie@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
838f8246 | 12-Apr-2024 |
Zhao Liu <zhao1.liu@intel.com> |
docs: i386: pc: Update maximum CPU numbers for PC Q35
Commit e4e98c7eebfa ("pc: q35: Bump max_cpus to 4096 vcpus") increases the supported CPUs for PC Q35 machine.
Update maximum CPU numbers for PC
docs: i386: pc: Update maximum CPU numbers for PC Q35
Commit e4e98c7eebfa ("pc: q35: Bump max_cpus to 4096 vcpus") increases the supported CPUs for PC Q35 machine.
Update maximum CPU numbers for PC Q35 in the document.
Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Message-ID: <20240412085358.731560-1-zhao1.liu@linux.intel.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
show more ...
|
2d9cbbea | 28-Mar-2024 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
block/gluster: Remove deprecated RDMA protocol handling
GlusterFS+RDMA has been deprecated 8 years ago in commit 0552ff2465 ("block/gluster: deprecate rdma support"):
gluster volfile server fetch
block/gluster: Remove deprecated RDMA protocol handling
GlusterFS+RDMA has been deprecated 8 years ago in commit 0552ff2465 ("block/gluster: deprecate rdma support"):
gluster volfile server fetch happens through unix and/or tcp, it doesn't support volfile fetch over rdma. The rdma code may actually mislead, so to make sure things do not break, for now we fallback to tcp when requested for rdma, with a warning.
If you are wondering how this worked all these days, its the gluster libgfapi code which handles anything other than unix transport as socket/tcp, sad but true.
Besides, the whole RDMA subsystem was deprecated in commit e9a54265f5 ("hw/rdma: Deprecate the pvrdma device and the rdma subsystem") released in v8.2.
Cc: Prasanna Kumar Kalever <prasanna.kalever@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20240328130255.52257-4-philmd@linaro.org>
show more ...
|
1dfd42c4 | 28-Mar-2024 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
hw/rdma: Remove deprecated pvrdma device and rdmacm-mux helper
The whole RDMA subsystem was deprecated in commit e9a54265f5 ("hw/rdma: Deprecate the pvrdma device and the rdma subsystem") released i
hw/rdma: Remove deprecated pvrdma device and rdmacm-mux helper
The whole RDMA subsystem was deprecated in commit e9a54265f5 ("hw/rdma: Deprecate the pvrdma device and the rdma subsystem") released in v8.2.
Remove: - PVRDMA device - generated vmw_pvrdma/ directory from linux-headers - rdmacm-mux tool from contrib/
Cc: Yuval Shaia <yuval.shaia.ml@gmail.com> Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20240328130255.52257-2-philmd@linaro.org>
show more ...
|
6c301485 | 27-Mar-2024 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
target/nios2: Remove the deprecated Nios II target
The Nios II target is deprecated since v8.2 in commit 9997771bc1 ("target/nios2: Deprecate the Nios II architecture").
Remove: - Buildsys / CI inf
target/nios2: Remove the deprecated Nios II target
The Nios II target is deprecated since v8.2 in commit 9997771bc1 ("target/nios2: Deprecate the Nios II architecture").
Remove: - Buildsys / CI infra - User emulation - System emulation (10m50-ghrd & nios2-generic-nommu machines) - Tests
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Marek Vasut <marex@denx.de> Message-Id: <20240327144806.11319-3-philmd@linaro.org>
show more ...
|
9c050717 | 18-Apr-2024 |
Paolo Bonzini <pbonzini@redhat.com> |
pythondeps.toml: warn about updates needed to docs/requirements.txt
docs/requirements.txt is expected by readthedocs and should be in sync with pythondeps.toml. Add a comment to both.
Reviewed-by:
pythondeps.toml: warn about updates needed to docs/requirements.txt
docs/requirements.txt is expected by readthedocs and should be in sync with pythondeps.toml. Add a comment to both.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
show more ...
|
4034159c | 08-Apr-2024 |
Michael S. Tsirkin <mst@redhat.com> |
Revert "hw/virtio: Add support for VDPA network simulation devices"
This reverts commit cd341fd1ffded978b2aa0b5309b00be7c42e347c.
The patch adds non-upstream code in include/standard-headers/linux/
Revert "hw/virtio: Add support for VDPA network simulation devices"
This reverts commit cd341fd1ffded978b2aa0b5309b00be7c42e347c.
The patch adds non-upstream code in include/standard-headers/linux/virtio_pci.h which would make maintainance harder.
Revert for now.
Suggested-by: Jason Wang <jasowang@redhat.com> Message-Id: <df6b6b465753e754a19459e8cd61416548f89a42.1712569644.git.mst@redhat.com> Acked-by: Jason Wang <jasowang@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
show more ...
|
f6822fee | 31-Mar-2024 |
Stefan Weil <sw@weilnetz.de> |
Fix some typos in documentation (found by codespell)
Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru> |
aaaae120 | 02-Apr-2024 |
Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> |
docs: sbsa: update specs, add dt note
Hardware of sbsa-ref board is nowadays defined by both BSA and SBSA specifications. Then BBR defines firmware interface.
Added note about DeviceTree data passe
docs: sbsa: update specs, add dt note
Hardware of sbsa-ref board is nowadays defined by both BSA and SBSA specifications. Then BBR defines firmware interface.
Added note about DeviceTree data passed from QEMU to firmware. It is very minimal and provides only data we use in firmware.
Added NUMA information to list of things reported by DeviceTree.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Message-id: 20240328163851.1386176-1-marcin.juszkiewicz@linaro.org Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
1dd7754a | 24-Mar-2024 |
BALATON Zoltan <balaton@eik.bme.hu> |
docs/system/ppc/amigang.rst: Fix formatting
Add missing space to fix character formatting where it was missed in two places.
Fixes: 623d9065b6 (docs/system/ppc: Document running Linux on AmigaNG ma
docs/system/ppc/amigang.rst: Fix formatting
Add missing space to fix character formatting where it was missed in two places.
Fixes: 623d9065b6 (docs/system/ppc: Document running Linux on AmigaNG machines) Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-ID: <20240324161148.4650D4E601F@zero.eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
show more ...
|
52405b7f | 22-Mar-2024 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
hw/clock: Let clock_set_mul_div() return a boolean value
Let clock_set_mul_div() return a boolean value whether the clock has been updated or not, similarly to clock_set().
Return early when clock_
hw/clock: Let clock_set_mul_div() return a boolean value
Let clock_set_mul_div() return a boolean value whether the clock has been updated or not, similarly to clock_set().
Return early when clock_set_mul_div() is called with same mul/div values the clock has.
Acked-by: Luc Michel <luc@lmichel.fr> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20240325152827.73817-2-philmd@linaro.org>
show more ...
|