Revision tags: v8.2.2, v7.2.10 |
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#
b1470a14 |
| 20-Feb-2024 |
Manos Pitsidianakis <manos.pitsidianakis@linaro.org> |
hw/riscv/virt.h: correct typos
Correct typos automatically found with the `typos` tool <https://crates.io/crates/typos>
Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-
hw/riscv/virt.h: correct typos
Correct typos automatically found with the `typos` tool <https://crates.io/crates/typos>
Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
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|
Revision tags: v8.2.1, v8.1.5, v7.2.9, v8.1.4, v7.2.8, v8.2.0 |
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#
e86e9527 |
| 18-Dec-2023 |
Sunil V L <sunilvl@ventanamicro.com> |
hw/riscv/virt: Update GPEX MMIO related properties
Update the GPEX host bridge properties related to MMIO ranges with values set for the virt machine.
Suggested-by: Igor Mammedov <imammedo@redhat.c
hw/riscv/virt: Update GPEX MMIO related properties
Update the GPEX host bridge properties related to MMIO ranges with values set for the virt machine.
Suggested-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-ID: <20231218150247.466427-12-sunilvl@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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#
68c8b403 |
| 18-Dec-2023 |
Sunil V L <sunilvl@ventanamicro.com> |
hw/riscv: virt: Make few IMSIC macros and functions public
Some macros and static function related to IMSIC are defined in virt.c. They are required in virt-acpi-build.c. So, make them public.
Sign
hw/riscv: virt: Make few IMSIC macros and functions public
Some macros and static function related to IMSIC are defined in virt.c. They are required in virt-acpi-build.c. So, make them public.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-ID: <20231218150247.466427-5-sunilvl@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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Revision tags: v8.2.0-rc4, v8.2.0-rc3, v8.2.0-rc2, v8.2.0-rc1, v7.2.7, v8.1.3, v8.2.0-rc0, v8.1.2, v8.1.1, v7.2.6, v8.0.5, v8.1.0, v8.1.0-rc4, v8.1.0-rc3, v7.2.5, v8.0.4, v8.1.0-rc2, v8.1.0-rc1, v8.1.0-rc0, v8.0.3, v7.2.4, v8.0.2, v8.0.1, v7.2.3, v7.2.2, v8.0.0, v8.0.0-rc4, v8.0.0-rc3, v7.2.1, v8.0.0-rc2, v8.0.0-rc1, v8.0.0-rc0 |
|
#
7da2fb24 |
| 02-Mar-2023 |
Sunil V L <sunilvl@ventanamicro.com> |
hw/riscv/virt: Enable basic ACPI infrastructure
Add basic ACPI infrastructure for RISC-V with below tables. 1) DSDT with below basic objects - CPUs - fw_cfg
hw/riscv/virt: Enable basic ACPI infrastructure
Add basic ACPI infrastructure for RISC-V with below tables. 1) DSDT with below basic objects - CPUs - fw_cfg 2) FADT revision 6 with HW_REDUCED flag 3) XSDT 4) RSDP
Add this functionality in a new file virt-acpi-build.c and enable building this infrastructure.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-ID: <20230302091212.999767-5-sunilvl@ventanamicro.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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#
71302ff3 |
| 02-Mar-2023 |
Sunil V L <sunilvl@ventanamicro.com> |
hw/riscv/virt: Add memmap pointer to RiscVVirtState
memmap needs to be exported outside of virt.c so that modules like acpi can use it. Hence, add a pointer field in RiscVVirtState structure and ini
hw/riscv/virt: Add memmap pointer to RiscVVirtState
memmap needs to be exported outside of virt.c so that modules like acpi can use it. Hence, add a pointer field in RiscVVirtState structure and initialize it with the memorymap.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-ID: <20230302091212.999767-4-sunilvl@ventanamicro.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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#
168b8c29 |
| 02-Mar-2023 |
Sunil V L <sunilvl@ventanamicro.com> |
hw/riscv/virt: Add a switch to disable ACPI
ACPI will be enabled by default. Add a switch to turn off for testing and debug purposes.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by
hw/riscv/virt: Add a switch to disable ACPI
ACPI will be enabled by default. Add a switch to turn off for testing and debug purposes.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-ID: <20230302091212.999767-3-sunilvl@ventanamicro.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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#
90477a65 |
| 02-Mar-2023 |
Sunil V L <sunilvl@ventanamicro.com> |
hw/riscv/virt: Add OEM_ID and OEM_TABLE_ID fields
ACPI needs OEM_ID and OEM_TABLE_ID for the machine. Add these fields in the RISCVVirtState structure and initialize with default values.
Signed-off
hw/riscv/virt: Add OEM_ID and OEM_TABLE_ID fields
ACPI needs OEM_ID and OEM_TABLE_ID for the machine. Add these fields in the RISCVVirtState structure and initialize with default values.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-ID: <20230302091212.999767-2-sunilvl@ventanamicro.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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Revision tags: v8.2.0-rc4, v8.2.0-rc3, v8.2.0-rc2, v8.2.0-rc1, v7.2.7, v8.1.3, v8.2.0-rc0, v8.1.2, v8.1.1, v7.2.6, v8.0.5, v8.1.0, v8.1.0-rc4, v8.1.0-rc3, v7.2.5, v8.0.4, v8.1.0-rc2, v8.1.0-rc1, v8.1.0-rc0, v8.0.3, v7.2.4, v8.0.2, v8.0.1, v7.2.3, v7.2.2, v8.0.0, v8.0.0-rc4, v8.0.0-rc3, v7.2.1, v8.0.0-rc2, v8.0.0-rc1, v8.0.0-rc0 |
|
#
7da2fb24 |
| 02-Mar-2023 |
Sunil V L <sunilvl@ventanamicro.com> |
hw/riscv/virt: Enable basic ACPI infrastructure
Add basic ACPI infrastructure for RISC-V with below tables. 1) DSDT with below basic objects - CPUs - fw_cfg
hw/riscv/virt: Enable basic ACPI infrastructure
Add basic ACPI infrastructure for RISC-V with below tables. 1) DSDT with below basic objects - CPUs - fw_cfg 2) FADT revision 6 with HW_REDUCED flag 3) XSDT 4) RSDP
Add this functionality in a new file virt-acpi-build.c and enable building this infrastructure.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-ID: <20230302091212.999767-5-sunilvl@ventanamicro.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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#
71302ff3 |
| 02-Mar-2023 |
Sunil V L <sunilvl@ventanamicro.com> |
hw/riscv/virt: Add memmap pointer to RiscVVirtState
memmap needs to be exported outside of virt.c so that modules like acpi can use it. Hence, add a pointer field in RiscVVirtState structure and ini
hw/riscv/virt: Add memmap pointer to RiscVVirtState
memmap needs to be exported outside of virt.c so that modules like acpi can use it. Hence, add a pointer field in RiscVVirtState structure and initialize it with the memorymap.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-ID: <20230302091212.999767-4-sunilvl@ventanamicro.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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#
168b8c29 |
| 02-Mar-2023 |
Sunil V L <sunilvl@ventanamicro.com> |
hw/riscv/virt: Add a switch to disable ACPI
ACPI will be enabled by default. Add a switch to turn off for testing and debug purposes.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by
hw/riscv/virt: Add a switch to disable ACPI
ACPI will be enabled by default. Add a switch to turn off for testing and debug purposes.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-ID: <20230302091212.999767-3-sunilvl@ventanamicro.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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#
90477a65 |
| 02-Mar-2023 |
Sunil V L <sunilvl@ventanamicro.com> |
hw/riscv/virt: Add OEM_ID and OEM_TABLE_ID fields
ACPI needs OEM_ID and OEM_TABLE_ID for the machine. Add these fields in the RISCVVirtState structure and initialize with default values.
Signed-off
hw/riscv/virt: Add OEM_ID and OEM_TABLE_ID fields
ACPI needs OEM_ID and OEM_TABLE_ID for the machine. Add these fields in the RISCVVirtState structure and initialize with default values.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-ID: <20230302091212.999767-2-sunilvl@ventanamicro.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
show more ...
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Revision tags: v8.2.0-rc4, v8.2.0-rc3, v8.2.0-rc2, v8.2.0-rc1, v7.2.7, v8.1.3, v8.2.0-rc0, v8.1.2, v8.1.1, v7.2.6, v8.0.5, v8.1.0, v8.1.0-rc4, v8.1.0-rc3, v7.2.5, v8.0.4, v8.1.0-rc2, v8.1.0-rc1, v8.1.0-rc0, v8.0.3, v7.2.4, v8.0.2, v8.0.1, v7.2.3, v7.2.2, v8.0.0, v8.0.0-rc4, v8.0.0-rc3, v7.2.1, v8.0.0-rc2, v8.0.0-rc1, v8.0.0-rc0 |
|
#
7da2fb24 |
| 02-Mar-2023 |
Sunil V L <sunilvl@ventanamicro.com> |
hw/riscv/virt: Enable basic ACPI infrastructure
Add basic ACPI infrastructure for RISC-V with below tables. 1) DSDT with below basic objects - CPUs - fw_cfg
hw/riscv/virt: Enable basic ACPI infrastructure
Add basic ACPI infrastructure for RISC-V with below tables. 1) DSDT with below basic objects - CPUs - fw_cfg 2) FADT revision 6 with HW_REDUCED flag 3) XSDT 4) RSDP
Add this functionality in a new file virt-acpi-build.c and enable building this infrastructure.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-ID: <20230302091212.999767-5-sunilvl@ventanamicro.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
show more ...
|
#
71302ff3 |
| 02-Mar-2023 |
Sunil V L <sunilvl@ventanamicro.com> |
hw/riscv/virt: Add memmap pointer to RiscVVirtState
memmap needs to be exported outside of virt.c so that modules like acpi can use it. Hence, add a pointer field in RiscVVirtState structure and ini
hw/riscv/virt: Add memmap pointer to RiscVVirtState
memmap needs to be exported outside of virt.c so that modules like acpi can use it. Hence, add a pointer field in RiscVVirtState structure and initialize it with the memorymap.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-ID: <20230302091212.999767-4-sunilvl@ventanamicro.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
show more ...
|
#
168b8c29 |
| 02-Mar-2023 |
Sunil V L <sunilvl@ventanamicro.com> |
hw/riscv/virt: Add a switch to disable ACPI
ACPI will be enabled by default. Add a switch to turn off for testing and debug purposes.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by
hw/riscv/virt: Add a switch to disable ACPI
ACPI will be enabled by default. Add a switch to turn off for testing and debug purposes.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-ID: <20230302091212.999767-3-sunilvl@ventanamicro.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
show more ...
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#
90477a65 |
| 02-Mar-2023 |
Sunil V L <sunilvl@ventanamicro.com> |
hw/riscv/virt: Add OEM_ID and OEM_TABLE_ID fields
ACPI needs OEM_ID and OEM_TABLE_ID for the machine. Add these fields in the RISCVVirtState structure and initialize with default values.
Signed-off
hw/riscv/virt: Add OEM_ID and OEM_TABLE_ID fields
ACPI needs OEM_ID and OEM_TABLE_ID for the machine. Add these fields in the RISCVVirtState structure and initialize with default values.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-ID: <20230302091212.999767-2-sunilvl@ventanamicro.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
show more ...
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Revision tags: v8.2.0-rc4, v8.2.0-rc3, v8.2.0-rc2, v8.2.0-rc1, v7.2.7, v8.1.3, v8.2.0-rc0, v8.1.2, v8.1.1, v7.2.6, v8.0.5, v8.1.0, v8.1.0-rc4, v8.1.0-rc3, v7.2.5, v8.0.4, v8.1.0-rc2, v8.1.0-rc1, v8.1.0-rc0, v8.0.3, v7.2.4, v8.0.2, v8.0.1, v7.2.3, v7.2.2, v8.0.0, v8.0.0-rc4, v8.0.0-rc3, v7.2.1, v8.0.0-rc2, v8.0.0-rc1, v8.0.0-rc0 |
|
#
7da2fb24 |
| 02-Mar-2023 |
Sunil V L <sunilvl@ventanamicro.com> |
hw/riscv/virt: Enable basic ACPI infrastructure
Add basic ACPI infrastructure for RISC-V with below tables. 1) DSDT with below basic objects - CPUs - fw_cfg
hw/riscv/virt: Enable basic ACPI infrastructure
Add basic ACPI infrastructure for RISC-V with below tables. 1) DSDT with below basic objects - CPUs - fw_cfg 2) FADT revision 6 with HW_REDUCED flag 3) XSDT 4) RSDP
Add this functionality in a new file virt-acpi-build.c and enable building this infrastructure.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-ID: <20230302091212.999767-5-sunilvl@ventanamicro.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
show more ...
|
#
71302ff3 |
| 02-Mar-2023 |
Sunil V L <sunilvl@ventanamicro.com> |
hw/riscv/virt: Add memmap pointer to RiscVVirtState
memmap needs to be exported outside of virt.c so that modules like acpi can use it. Hence, add a pointer field in RiscVVirtState structure and ini
hw/riscv/virt: Add memmap pointer to RiscVVirtState
memmap needs to be exported outside of virt.c so that modules like acpi can use it. Hence, add a pointer field in RiscVVirtState structure and initialize it with the memorymap.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-ID: <20230302091212.999767-4-sunilvl@ventanamicro.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
show more ...
|
#
168b8c29 |
| 02-Mar-2023 |
Sunil V L <sunilvl@ventanamicro.com> |
hw/riscv/virt: Add a switch to disable ACPI
ACPI will be enabled by default. Add a switch to turn off for testing and debug purposes.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by
hw/riscv/virt: Add a switch to disable ACPI
ACPI will be enabled by default. Add a switch to turn off for testing and debug purposes.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-ID: <20230302091212.999767-3-sunilvl@ventanamicro.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
show more ...
|
#
90477a65 |
| 02-Mar-2023 |
Sunil V L <sunilvl@ventanamicro.com> |
hw/riscv/virt: Add OEM_ID and OEM_TABLE_ID fields
ACPI needs OEM_ID and OEM_TABLE_ID for the machine. Add these fields in the RISCVVirtState structure and initialize with default values.
Signed-off
hw/riscv/virt: Add OEM_ID and OEM_TABLE_ID fields
ACPI needs OEM_ID and OEM_TABLE_ID for the machine. Add these fields in the RISCVVirtState structure and initialize with default values.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-ID: <20230302091212.999767-2-sunilvl@ventanamicro.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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#
7a5951f6 |
| 22-Dec-2022 |
Markus Armbruster <armbru@redhat.com> |
include: Include headers where needed
A number of headers neglect to include everything they need. They compile only if the headers they need are already included from elsewhere. Fix that.
Signed
include: Include headers where needed
A number of headers neglect to include everything they need. They compile only if the headers they need are already included from elsewhere. Fix that.
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20221222120813.727830-3-armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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#
7a5951f6 |
| 22-Dec-2022 |
Markus Armbruster <armbru@redhat.com> |
include: Include headers where needed
A number of headers neglect to include everything they need. They compile only if the headers they need are already included from elsewhere. Fix that.
Signed
include: Include headers where needed
A number of headers neglect to include everything they need. They compile only if the headers they need are already included from elsewhere. Fix that.
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20221222120813.727830-3-armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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#
7a5951f6 |
| 22-Dec-2022 |
Markus Armbruster <armbru@redhat.com> |
include: Include headers where needed
A number of headers neglect to include everything they need. They compile only if the headers they need are already included from elsewhere. Fix that.
Signed
include: Include headers where needed
A number of headers neglect to include everything they need. They compile only if the headers they need are already included from elsewhere. Fix that.
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20221222120813.727830-3-armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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Revision tags: v7.2.0 |
|
#
5decd2c5 |
| 11-Dec-2022 |
Bin Meng <bmeng@tinylab.org> |
hw/intc: sifive_plic: Change "priority-base" to start from interrupt source 0
At present the SiFive PLIC model "priority-base" expects interrupt priority register base starting from source 1 instead
hw/intc: sifive_plic: Change "priority-base" to start from interrupt source 0
At present the SiFive PLIC model "priority-base" expects interrupt priority register base starting from source 1 instead source 0, that's why on most platforms "priority-base" is set to 0x04 except 'opentitan' machine. 'opentitan' should have set "priority-base" to 0x04 too.
Note the irq number calculation in sifive_plic_{read,write} is correct as the codes make up for the irq number by adding 1.
Let's simply update "priority-base" to start from interrupt source 0 and add a comment to make it crystal clear.
Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Wilfred Mallawa <wilfred.mallawa@wdc.com> Message-Id: <20221211030829.802437-14-bmeng@tinylab.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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#
59f74489 |
| 11-Dec-2022 |
Bin Meng <bmeng@tinylab.org> |
hw/riscv: virt: Fix the value of "riscv, ndev" in the dtb
Commit 28d8c281200f ("hw/riscv: virt: Add optional AIA IMSIC support to virt machine") changed the value of VIRT_IRQCHIP_NUM_SOURCES from 12
hw/riscv: virt: Fix the value of "riscv, ndev" in the dtb
Commit 28d8c281200f ("hw/riscv: virt: Add optional AIA IMSIC support to virt machine") changed the value of VIRT_IRQCHIP_NUM_SOURCES from 127 to 53, which is VIRTIO_NDEV and also used as the value of "riscv,ndev" property in the dtb. Unfortunately this is wrong as VIRT_IRQCHIP_NUM_SOURCES should include interrupt source 0 but "riscv,ndev" does not.
While we are here, we also fix the comments of platform bus irq range which is now "64 to 96", but should be "64 to 95", introduced since commit 1832b7cb3f64 ("hw/riscv: virt: Create a platform bus").
Fixes: 28d8c281200f ("hw/riscv: virt: Add optional AIA IMSIC support to virt machine") Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20221211030829.802437-13-bmeng@tinylab.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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Revision tags: v7.2.0-rc4, v7.2.0-rc3, v7.2.0-rc2 |
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0c83343b |
| 22-Nov-2022 |
Atish Patra <atishp@rivosinc.com> |
hw/riscv: virt: Remove the redundant ipi-id property
The imsic DT binding[1] has changed and no longer require an ipi-id. The latest IMSIC driver dynamically allocates ipi id if slow-ipi is not defi
hw/riscv: virt: Remove the redundant ipi-id property
The imsic DT binding[1] has changed and no longer require an ipi-id. The latest IMSIC driver dynamically allocates ipi id if slow-ipi is not defined.
Get rid of the unused dt property which may lead to confusion.
[1] https://lore.kernel.org/lkml/20221111044207.1478350-5-apatel@ventanamicro.com/
Signed-off-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20221122080529.1692533-1-atishp@rivosinc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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