Revision tags: v7.0.0, v7.0.0-rc4, v7.0.0-rc3, v7.0.0-rc2, v7.0.0-rc1, v7.0.0-rc0, v6.1.1, v6.2.0, v6.2.0-rc4, v6.2.0-rc3, v6.2.0-rc2, v6.2.0-rc1, v6.2.0-rc0, v6.0.1, v6.1.0, v6.1.0-rc4, v6.1.0-rc3, v6.1.0-rc2, v6.1.0-rc1, v6.1.0-rc0, v6.0.0, v6.0.0-rc5, v6.0.0-rc4, v6.0.0-rc3, v6.0.0-rc2, v6.0.0-rc1, v6.0.0-rc0, v5.2.0, v5.2.0-rc4, v5.2.0-rc3, v5.2.0-rc2, v5.2.0-rc1, v5.2.0-rc0, v5.0.1, v5.1.0 |
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abff1abf |
| 07-Aug-2020 |
Paolo Bonzini <pbonzini@redhat.com> |
meson: target
Similar to hw_arch, each architecture defines two sourceset which are placed in dictionaries target_arch and target_softmmu_arch. These are then picked up from there when building the
meson: target
Similar to hw_arch, each architecture defines two sourceset which are placed in dictionaries target_arch and target_softmmu_arch. These are then picked up from there when building the per-emulator static_library.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Revision tags: v5.1.0-rc3, v5.1.0-rc2, v5.1.0-rc1, v5.1.0-rc0, v4.2.1, v5.0.0, v5.0.0-rc4, v5.0.0-rc3, v5.0.0-rc2, v5.0.0-rc1, v5.0.0-rc0 |
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139c1837 |
| 04-Feb-2020 |
Paolo Bonzini <pbonzini@redhat.com> |
meson: rename included C source files to .c.inc
With Makefiles that have automatically generated dependencies, you generated includes are set as dependencies of the Makefile, so that they are built
meson: rename included C source files to .c.inc
With Makefiles that have automatically generated dependencies, you generated includes are set as dependencies of the Makefile, so that they are built before everything else and they are available when first building the .c files.
Alternatively you can use a fine-grained dependency, e.g.
target/arm/translate.o: target/arm/decode-neon-shared.inc.c
With Meson you have only one choice and it is a third option, namely "build at the beginning of the corresponding target"; the way you express it is to list the includes in the sources of that target.
The problem is that Meson decides if something is a source vs. a generated include by looking at the extension: '.c', '.cc', '.m', '.C' are sources, while everything else is considered an include---including '.inc.c'.
Use '.c.inc' to avoid this, as it is consistent with our other convention of using '.rst.inc' for included reStructuredText files. The editorconfig file is adjusted.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Revision tags: v4.2.0, v4.2.0-rc5, v4.2.0-rc4, v4.2.0-rc3, v4.2.0-rc2, v4.1.1, v4.2.0-rc1, v4.2.0-rc0, v4.0.1, v3.1.1.1 |
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3e0e41ef |
| 26-Aug-2019 |
Richard Henderson <richard.henderson@linaro.org> |
target/openrisc: Implement l.adrp
This was added to the 1.3 spec.
Reviewed-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Revision tags: v4.1.0, v4.1.0-rc5, v4.1.0-rc4, v3.1.1, v4.1.0-rc3, v4.1.0-rc2, v4.1.0-rc1, v4.1.0-rc0 |
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2b13b4b9 |
| 14-May-2019 |
Richard Henderson <richard.henderson@linaro.org> |
target/openrisc: Implement unordered fp comparisons
These were added to the 1.3 spec. For OF32S, validate AVR. But OF64A32 is itself new to 1.3 so no extra check needed.
Reviewed-by: Stafford Horn
target/openrisc: Implement unordered fp comparisons
These were added to the 1.3 spec. For OF32S, validate AVR. But OF64A32 is itself new to 1.3 so no extra check needed.
Reviewed-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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62f2b038 |
| 06-May-2019 |
Richard Henderson <richard.henderson@linaro.org> |
target/openrisc: Add support for ORFPX64A32
This is hardware support for double-precision floating-point using pairs of 32-bit registers. Fix latent bugs in the heretofore unused helper_itofd and h
target/openrisc: Add support for ORFPX64A32
This is hardware support for double-precision floating-point using pairs of 32-bit registers. Fix latent bugs in the heretofore unused helper_itofd and helper_ftoid. Include the bit for cpu "any". Change the default cpu for linux-user to "any".
Reviewed-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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a8d25326 |
| 23-May-2019 |
Markus Armbruster <armbru@redhat.com> |
Include qemu-common.h exactly where needed
No header includes qemu-common.h after this commit, as prescribed by qemu-common.h's file comment.
Signed-off-by: Markus Armbruster <armbru@redhat.com> Me
Include qemu-common.h exactly where needed
No header includes qemu-common.h after this commit, as prescribed by qemu-common.h's file comment.
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190523143508.25387-5-armbru@redhat.com> [Rebased with conflicts resolved automatically, except for include/hw/arm/xlnx-zynqmp.h hw/arm/nrf51_soc.c hw/arm/msf2-soc.c block/qcow2-refcount.c block/qcow2-cluster.c block/qcow2-cache.c target/arm/cpu.h target/lm32/cpu.h target/m68k/cpu.h target/mips/cpu.h target/moxie/cpu.h target/nios2/cpu.h target/openrisc/cpu.h target/riscv/cpu.h target/tilegx/cpu.h target/tricore/cpu.h target/unicore32/cpu.h target/xtensa/cpu.h; bsd-user/main.c and net/tap-bsd.c fixed up]
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Revision tags: v4.0.0 |
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3979fca4 |
| 17-Apr-2019 |
Markus Armbruster <armbru@redhat.com> |
disas: Rename include/disas/bfd.h back to include/disas/dis-asm.h
Commit dc99065b5f9 (v0.1.0) added dis-asm.h from binutils.
Commit 43d4145a986 (v0.1.5) inlined bfd.h into dis-asm.h to remove the d
disas: Rename include/disas/bfd.h back to include/disas/dis-asm.h
Commit dc99065b5f9 (v0.1.0) added dis-asm.h from binutils.
Commit 43d4145a986 (v0.1.5) inlined bfd.h into dis-asm.h to remove the dependency on binutils.
Commit 76cad71136b (v1.4.0) moved dis-asm.h to include/disas/bfd.h. The new name is confusing when you try to match against (pre GPLv3+) binutils. Rename it back. Keep it in the same directory, of course.
Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190417191805.28198-17-armbru@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
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Revision tags: v4.0.0-rc4, v3.0.1, v4.0.0-rc3, v4.0.0-rc2, v4.0.0-rc1, v4.0.0-rc0, v3.1.0, v3.1.0-rc5, v3.1.0-rc4, v3.1.0-rc3, v3.1.0-rc2, v3.1.0-rc1, v3.1.0-rc0 |
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3a7be554 |
| 23-Oct-2018 |
Richard Henderson <richard.henderson@linaro.org> |
decodetree: Remove "insn" argument from trans_* expanders
This allows trans_* expanders to be shared between decoders for 32 and 16-bit insns, by not tying the expander to the size of the insn that
decodetree: Remove "insn" argument from trans_* expanders
This allows trans_* expanders to be shared between decoders for 32 and 16-bit insns, by not tying the expander to the size of the insn that produced it.
This change requires adjusting the two existing users to match.
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Revision tags: v3.0.0, v3.0.0-rc4, v2.12.1, v3.0.0-rc3, v3.0.0-rc2, v3.0.0-rc1, v3.0.0-rc0, v2.11.2 |
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d5cabcce |
| 23-May-2018 |
Richard Henderson <richard.henderson@linaro.org> |
target/openrisc: Add print_insn_or1k
Rather than emit disassembly while translating, reuse the generated decoder to build a separate disassembler.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.o
target/openrisc: Add print_insn_or1k
Rather than emit disassembly while translating, reuse the generated decoder to build a separate disassembler.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stafford Horne <shorne@gmail.com>
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