Revision tags: v9.0.3, v8.2.7, v7.2.14, v9.1.0, v9.1.0-rc4, v9.1.0-rc3 |
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d2a0c3a7 |
| 16-Aug-2024 |
Richard Henderson <richard.henderson@linaro.org> |
target/sparc: Add gen_trap_if_nofpu_fpexception
Model fp_exception state, in which only fp stores are allowed until such time as the FQ has been flushed.
Signed-off-by: Richard Henderson <richard.h
target/sparc: Add gen_trap_if_nofpu_fpexception
Model fp_exception state, in which only fp stores are allowed until such time as the FQ has been flushed.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Carl Hauser <chauser@pullman.com>
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29b99802 |
| 16-Aug-2024 |
Richard Henderson <richard.henderson@linaro.org> |
target/sparc: Implement STDFQ
Invalid encoding of addr should raise TT_ILL_INSN, so check before supervisor, which might raise TT_PRIV_INSN. Clear QNE after execution.
Resolves: https://gitlab.com/
target/sparc: Implement STDFQ
Invalid encoding of addr should raise TT_ILL_INSN, so check before supervisor, which might raise TT_PRIV_INSN. Clear QNE after execution.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2340 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Carl Hauser <chauser@pullman.com>
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5a165e26 |
| 16-Aug-2024 |
Richard Henderson <richard.henderson@linaro.org> |
target/sparc: Add FSR_QNE to tb_flags
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Mark Cave-Ayland <mark.cave-ay
target/sparc: Add FSR_QNE to tb_flags
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Carl Hauser <chauser@pullman.com>
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12d36294 |
| 16-Aug-2024 |
Richard Henderson <richard.henderson@linaro.org> |
target/sparc: Restrict STQF to sparcv9
Prior to sparcv9, the same encoding was STDFQ.
Cc: qemu-stable@nongnu.org Fixes: 06c060d9e5b ("target/sparc: Move simple fp load/store to decodetree") Signed-
target/sparc: Restrict STQF to sparcv9
Prior to sparcv9, the same encoding was STDFQ.
Cc: qemu-stable@nongnu.org Fixes: 06c060d9e5b ("target/sparc: Move simple fp load/store to decodetree") Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240816072311.353234-2-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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Revision tags: v9.1.0-rc2, v9.1.0-rc1, v9.1.0-rc0, v9.0.2, v8.2.6, v7.2.13, v9.0.1, v8.2.5, v7.2.12, v8.2.4, v8.2.3, v7.2.11, v9.0.0, v9.0.0-rc4, v9.0.0-rc3, v9.0.0-rc2, v9.0.0-rc1, v9.0.0-rc0, v8.2.2, v7.2.10, v8.2.1, v8.1.5, v7.2.9, v8.1.4, v7.2.8, v8.2.0, v8.2.0-rc4, v8.2.0-rc3, v8.2.0-rc2, v8.2.0-rc1, v7.2.7, v8.1.3, v8.2.0-rc0 |
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eeb3f592 |
| 05-Nov-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/sparc: Implement monitor ASIs
Ignore the "monitor" portion and treat them the same as their base ASIs.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderso
target/sparc: Implement monitor ASIs
Ignore the "monitor" portion and treat them the same as their base ASIs.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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6fbc032c |
| 05-Nov-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/sparc: Implement MWAIT
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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56f2ef9c |
| 05-Nov-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/sparc: Implement SUBXC, SUBXCcc
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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db11dfea |
| 05-Nov-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/sparc: Implement FPMIN, FPMAX
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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b3c934dd |
| 05-Nov-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/sparc: Implement VIS4 comparisons
VIS4 completes the set, adding missing signed 8-bit ops and missing unsigned 16 and 32-bit ops.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Sign
target/sparc: Implement VIS4 comparisons
VIS4 completes the set, adding missing signed 8-bit ops and missing unsigned 16 and 32-bit ops.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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b99c1bbd |
| 05-Nov-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/sparc: Implement 8-bit FPADD, FPADDS, and FPADDUS
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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b2b48493 |
| 05-Nov-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/sparc: Implement FALIGNDATAi
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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90b1433d |
| 05-Nov-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/sparc: Add feature bit for VIS4
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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68a414e9 |
| 05-Nov-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/sparc: Implement IMA extension
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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029b0283 |
| 05-Nov-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/sparc: Implement XMULX
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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680af1b4 |
| 05-Nov-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/sparc: Implement UMULXHI
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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7d5ebd8f |
| 05-Nov-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/sparc: Implement PDISTN
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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09b157e6 |
| 05-Nov-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/sparc: Implement MOVsTOw, MOVdTOx, MOVwTOs, MOVxTOd
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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875ce392 |
| 05-Nov-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/sparc: Implement LZCNT
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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298c52f7 |
| 05-Nov-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/sparc: Implement LDXEFSR
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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fbc5c8d4 |
| 05-Nov-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/sparc: Implement FSLL, FSRL, FSRA, FSLAS
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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669e0774 |
| 04-Nov-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/sparc: Implement FPCMPEQ8, FPCMPNE8, FPCMPULE8, FPCMPUGT8
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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0d1d3aaf |
| 05-Nov-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/sparc: Implement FPADDS, FPSUBS
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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bc3f14a9 |
| 04-Nov-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/sparc: Implement FPADD64, FPSUB64
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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d6ff1ccb |
| 04-Nov-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/sparc: Implement FMEAN16
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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1d3ed3d7 |
| 04-Nov-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/sparc: Implement FLCMP
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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