History log of /qemu/tests/tcg/aarch64/sve-str.c (Results 1 – 3 of 3)
Revision Date Author Comments
# b11293c2 31-Oct-2023 Richard Henderson <richard.henderson@linaro.org>

target/arm: Fix SVE STR increment

The previous change missed updating one of the increments and
one of the MemOps. Add a test case for all vector lengths.

Cc: qemu-stable@nongnu.org
Fixes: e6dd5e7

target/arm: Fix SVE STR increment

The previous change missed updating one of the increments and
one of the MemOps. Add a test case for all vector lengths.

Cc: qemu-stable@nongnu.org
Fixes: e6dd5e782be ("target/arm: Use tcg_gen_qemu_{ld, st}_i128 in gen_sve_{ld, st}r")
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20231031143215.29764-1-richard.henderson@linaro.org
[PMM: fixed checkpatch nit]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...


# b11293c2 31-Oct-2023 Richard Henderson <richard.henderson@linaro.org>

target/arm: Fix SVE STR increment

The previous change missed updating one of the increments and
one of the MemOps. Add a test case for all vector lengths.

Cc: qemu-stable@nongnu.org
Fixes: e6dd5e7

target/arm: Fix SVE STR increment

The previous change missed updating one of the increments and
one of the MemOps. Add a test case for all vector lengths.

Cc: qemu-stable@nongnu.org
Fixes: e6dd5e782be ("target/arm: Use tcg_gen_qemu_{ld, st}_i128 in gen_sve_{ld, st}r")
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20231031143215.29764-1-richard.henderson@linaro.org
[PMM: fixed checkpatch nit]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...


# b11293c2 31-Oct-2023 Richard Henderson <richard.henderson@linaro.org>

target/arm: Fix SVE STR increment

The previous change missed updating one of the increments and
one of the MemOps. Add a test case for all vector lengths.

Cc: qemu-stable@nongnu.org
Fixes: e6dd5e7

target/arm: Fix SVE STR increment

The previous change missed updating one of the increments and
one of the MemOps. Add a test case for all vector lengths.

Cc: qemu-stable@nongnu.org
Fixes: e6dd5e782be ("target/arm: Use tcg_gen_qemu_{ld, st}_i128 in gen_sve_{ld, st}r")
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20231031143215.29764-1-richard.henderson@linaro.org
[PMM: fixed checkpatch nit]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...