186 	uint32_t reg;  in tegra124_pmc_set_powergate()  local
191 	reg = RD4(sc, PMC_PWRGATE_STATUS) & PMC_PWRGATE_STATUS_PARTID(id);  in tegra124_pmc_set_powergate()
192 	if (((reg != 0) && ena) || ((reg == 0) && !ena)) {  in tegra124_pmc_set_powergate()
198 		reg = RD4(sc, PMC_PWRGATE_TOGGLE);  in tegra124_pmc_set_powergate()
199 		if ((reg & PMC_PWRGATE_TOGGLE_START) == 0)  in tegra124_pmc_set_powergate()
211 		reg = RD4(sc, PMC_PWRGATE_TOGGLE);  in tegra124_pmc_set_powergate()
212 		if ((reg & PMC_PWRGATE_TOGGLE_START) == 0)  in tegra124_pmc_set_powergate()
227 	uint32_t reg;  in tegra_powergate_remove_clamping()  local
238 	reg = RD4(sc, PMC_PWRGATE_STATUS);  in tegra_powergate_remove_clamping()
239 	if ((reg & PMC_PWRGATE_STATUS_PARTID(id)) == 0)  in tegra_powergate_remove_clamping()
251 		reg = RD4(sc, PMC_REMOVE_CLAMPING_CMD);  in tegra_powergate_remove_clamping()
252 		if ((reg & PMC_REMOVE_CLAMPING_CMD_PARTID(swid)) == 0)  in tegra_powergate_remove_clamping()
259 	reg = RD4(sc, PMC_CLAMP_STATUS);  in tegra_powergate_remove_clamping()
260 	if ((reg & PMC_CLAMP_STATUS_PARTID(id)) != 0)  in tegra_powergate_remove_clamping()
270 	uint32_t reg;  in tegra_powergate_is_powered()  local
274 	reg = RD4(sc, PMC_PWRGATE_STATUS);  in tegra_powergate_is_powered()
275 	return ((reg & PMC_PWRGATE_STATUS_PARTID(id)) ? 1 : 0);  in tegra_powergate_is_powered()
482 	uint32_t reg;  in tegra124_pmc_attach()  local
512 	reg = RD4(sc, PMC_CNTRL);  in tegra124_pmc_attach()
513 	reg |= PMC_CNTRL_CPU_PWRREQ_OE;  in tegra124_pmc_attach()
514 	WR4(sc, PMC_CNTRL, reg);  in tegra124_pmc_attach()
517 	reg = RD4(sc, PMC_CNTRL);  in tegra124_pmc_attach()
519 		reg &= ~PMC_CNTRL_SYSCLK_POLARITY;  in tegra124_pmc_attach()
521 		reg |= PMC_CNTRL_SYSCLK_POLARITY;  in tegra124_pmc_attach()
522 	WR4(sc, PMC_CNTRL, reg);  in tegra124_pmc_attach()
525 	reg = RD4(sc, PMC_CNTRL);  in tegra124_pmc_attach()
526 	reg |= PMC_CNTRL_SYSCLK_OE;  in tegra124_pmc_attach()
527 	WR4(sc, PMC_CNTRL, reg);  in tegra124_pmc_attach()
533 	reg = RD4(sc, PMC_IO_DPD_STATUS);  in tegra124_pmc_attach()
534 	reg &= ~ PMC_IO_DPD_STATUS_HDMI;  in tegra124_pmc_attach()
535 	WR4(sc, PMC_IO_DPD_STATUS, reg);  in tegra124_pmc_attach()
537 	reg = RD4(sc, PMC_IO_DPD2_STATUS);  in tegra124_pmc_attach()
538 	reg &= ~ PMC_IO_DPD2_STATUS_HV;  in tegra124_pmc_attach()
539 	WR4(sc, PMC_IO_DPD2_STATUS, reg);  in tegra124_pmc_attach()