| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 291 MachineOperand *BaseOp1 = HII.getBaseAndOffset(L1, Offset1, Size1); in apply() local
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| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 292 MachineOperand *BaseOp1 = HII.getBaseAndOffset(L1, Offset1, Size1); in apply() local
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| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 291 MachineOperand *BaseOp1 = HII.getBaseAndOffset(L1, Offset1, Size1); in apply() local
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| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 292 MachineOperand *BaseOp1 = HII.getBaseAndOffset(L1, Offset1, Size1); in apply() local
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| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 292 MachineOperand *BaseOp1 = HII.getBaseAndOffset(L1, Offset1, Size1); in apply() local
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| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 293 MachineOperand *BaseOp1 = HII.getBaseAndOffset(L1, Offset1, Size1); in apply() local
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| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 294 MachineOperand *BaseOp1 = HII.getBaseAndOffset(L1, Offset1, Size1); in apply() local
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 345 MachineOperand *BaseOp1 = HII.getBaseAndOffset(L1, Offset1, Size1); in apply() local
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| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 362 MachineOperand *BaseOp1 = HII.getBaseAndOffset(L1, Offset1, Size1); in apply() local
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| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 362 MachineOperand *BaseOp1 = HII.getBaseAndOffset(L1, Offset1, Size1); in apply() local
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 362 MachineOperand *BaseOp1 = HII.getBaseAndOffset(L1, Offset1, Size1); in apply() local
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 362 MachineOperand *BaseOp1 = HII.getBaseAndOffset(L1, Offset1, Size1); in apply() local
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 362 MachineOperand *BaseOp1 = HII.getBaseAndOffset(L1, Offset1, Size1); in apply() local
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 362 MachineOperand *BaseOp1 = HII.getBaseAndOffset(L1, Offset1, Size1); in apply() local
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 362 MachineOperand *BaseOp1 = HII.getBaseAndOffset(L1, Offset1, Size1); in apply() local
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 362 MachineOperand *BaseOp1 = HII.getBaseAndOffset(L1, Offset1, Size1); in apply() local
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| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 382 const MachineOperand &BaseOp1, in memOpsHaveSameBasePtr()
416 bool SIInstrInfo::shouldClusterMemOps(MachineOperand &BaseOp1, in shouldClusterMemOps()
2177 MachineOperand *BaseOp0, *BaseOp1; in checkInstOffsetsDoNotOverlap() local
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| /dports/devel/llvm90/llvm-9.0.1.src/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1181 virtual bool shouldClusterMemOps(const MachineOperand &BaseOp1, in shouldClusterMemOps()
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| /dports/devel/llvm10/llvm-10.0.1.src/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1271 virtual bool shouldClusterMemOps(const MachineOperand &BaseOp1, in shouldClusterMemOps()
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| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1271 virtual bool shouldClusterMemOps(const MachineOperand &BaseOp1, in shouldClusterMemOps()
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| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1271 virtual bool shouldClusterMemOps(const MachineOperand &BaseOp1, in shouldClusterMemOps()
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| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 378 const MachineOperand &BaseOp1, in memOpsHaveSameBasePtr()
412 bool SIInstrInfo::shouldClusterMemOps(const MachineOperand &BaseOp1, in shouldClusterMemOps()
2452 const MachineOperand *BaseOp0, *BaseOp1; in checkInstOffsetsDoNotOverlap() local
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| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 402 const MachineOperand &BaseOp1, in memOpsHaveSameBasePtr()
436 bool SIInstrInfo::shouldClusterMemOps(const MachineOperand &BaseOp1, in shouldClusterMemOps()
2530 const MachineOperand *BaseOp0, *BaseOp1; in checkInstOffsetsDoNotOverlap() local
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| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 402 const MachineOperand &BaseOp1, in memOpsHaveSameBasePtr()
436 bool SIInstrInfo::shouldClusterMemOps(const MachineOperand &BaseOp1, in shouldClusterMemOps()
2530 const MachineOperand *BaseOp0, *BaseOp1; in checkInstOffsetsDoNotOverlap() local
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| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 402 const MachineOperand &BaseOp1, in memOpsHaveSameBasePtr()
436 bool SIInstrInfo::shouldClusterMemOps(const MachineOperand &BaseOp1, in shouldClusterMemOps()
2530 const MachineOperand *BaseOp0, *BaseOp1; in checkInstOffsetsDoNotOverlap() local
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