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Searched defs:CCR2 (Results 1 – 25 of 39) sorted by relevance

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/dports/java/openjdk11/jdk11u-jdk-11.0.13-8-1/src/hotspot/cpu/ppc/
H A Dregister_ppc.hpp235 #define CCR2 ((ConditionRegister)(CCR2_ConditionRegisterEnumValue)) macro
/dports/multimedia/libv4l/linux-5.13-rc2/include/linux/
H A Domap-dma.h150 CPC, CCR2, LCH_CTRL, enumerator
/dports/multimedia/v4l_compat/linux-5.13-rc2/include/linux/
H A Domap-dma.h150 CPC, CCR2, LCH_CTRL, enumerator
/dports/java/openjdk11-jre/jdk11u-jdk-11.0.13-8-1/src/hotspot/cpu/ppc/
H A Dregister_ppc.hpp235 #define CCR2 ((ConditionRegister)(CCR2_ConditionRegisterEnumValue)) macro
/dports/java/openjdk13/jdk13u-jdk-13.0.10-1-1/src/hotspot/cpu/ppc/
H A Dregister_ppc.hpp235 #define CCR2 ((ConditionRegister)(CCR2_ConditionRegisterEnumValue)) macro
/dports/java/openjdk16/jdk16u-jdk-16.0.2-7-1/src/hotspot/cpu/ppc/
H A Dregister_ppc.hpp235 #define CCR2 ((ConditionRegister)(CCR2_ConditionRegisterEnumValue)) macro
/dports/java/openjdk17/jdk17u-jdk-17.0.1-12-1/src/hotspot/cpu/ppc/
H A Dregister_ppc.hpp235 #define CCR2 ((ConditionRegister)(CCR2_ConditionRegisterEnumValue)) macro
/dports/java/openjdk12/openjdk-jdk12u-jdk-12.0.2-10-4/src/hotspot/cpu/ppc/
H A Dregister_ppc.hpp235 #define CCR2 ((ConditionRegister)(CCR2_ConditionRegisterEnumValue)) macro
/dports/java/openjdk15/jdk15u-jdk-15.0.6-1-1/src/hotspot/cpu/ppc/
H A Dregister_ppc.hpp235 #define CCR2 ((ConditionRegister)(CCR2_ConditionRegisterEnumValue)) macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/include/linux/
H A Domap-dma.h150 CPC, CCR2, LCH_CTRL, enumerator
/dports/java/openjdk14/jdk14u-jdk-14.0.2-12-1/src/hotspot/cpu/ppc/
H A Dregister_ppc.hpp235 #define CCR2 ((ConditionRegister)(CCR2_ConditionRegisterEnumValue)) macro
/dports/java/openjdk8/jdk8u-jdk8u312-b07.1/hotspot/src/cpu/ppc/vm/
H A Dregister_ppc.hpp236 #define CCR2 ((ConditionRegister)(CCR2_ConditionRegisterEnumValue)) macro
/dports/java/openjdk8-jre/jdk8u-jdk8u312-b07.1/hotspot/src/cpu/ppc/vm/
H A Dregister_ppc.hpp236 #define CCR2 ((ConditionRegister)(CCR2_ConditionRegisterEnumValue)) macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/char/pcmcia/
H A Dsynclink_cs.c270 #define CCR2 0x2e macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/char/pcmcia/
H A Dsynclink_cs.c270 #define CCR2 0x2e macro
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/char/pcmcia/
H A Dsynclink_cs.c270 #define CCR2 0x2e macro
/dports/devel/msp430-debug-stack/msp430-debug-stack-3.15.0.1/Bios/src/fw/uifv1/
H A Dmsp430x16x.h646 #define CCR2 TACCR2 /* Timer A Capture/Compare 2 */ macro
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f37x/
H A Dstm32f37x.h765 __IO uint32_t CCR2; /*!< TIM capture/compare register 2, Address offset: 0x38 */ member
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f0xx/
H A Dstm32f0xx.h931 …__IO uint32_t CCR2; /*!< TIM capture/compare register 2, Address offset: 0… member
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/CMSIS/CM3_f37x/
H A Dstm32f37x.h765 __IO uint32_t CCR2; /*!< TIM capture/compare register 2, Address offset: 0x38 */ member
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/CMSIS/CM3_f10x/
H A Dstm32f10x.h1012 __IO uint16_t CCR2; member
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f10x/
H A Dstm32f10x.h1012 __IO uint16_t CCR2; member
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/CMSIS/CM3_f30x/
H A Dstm32f30x.h1119 __IO uint32_t CCR2; /*!< TIM capture/compare register 2, Address offset: 0x38 */ member
/dports/security/py-pyvex/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/
H A Dstm32l152xe.h584 __IO uint32_t CCR2; /*!< TIM capture/compare register 2, Address offset: 0x38 */ member
/dports/devel/py-cle/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/
H A Dstm32l152xe.h584 __IO uint32_t CCR2; /*!< TIM capture/compare register 2, Address offset: 0x38 */ member

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