| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 5939 SDValue LL, LR, RL, RR, N0CC, N1CC; in foldLogicOfSetCCs() local
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | SCCPSolver.cpp | 1282 ConstantRange LR = getConstantRange(L, Ty); in handleExtractOfWithOverflow() local
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| H A D | LoopRotationUtils.cpp | 1057 LoopRotate LR(Threshold, LI, TTI, AC, DT, SE, MSSAU, SQ, RotationOnly, in LoopRotation() local
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineVectorOps.cpp | 807 ShuffleOps LR = collectShuffleElements(VecOp, Mask, RHS, IC, Rerun); in collectShuffleElements() local
1700 ShuffleOps LR = in visitInsertElementInst() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCFrameLowering.cpp | 270 static bool MustSaveLR(const MachineFunction &MF, unsigned LR) { in MustSaveLR()
314 unsigned LR = RegInfo->getRARegister(); in determineFrameLayout() local
1990 unsigned LR = RegInfo->getRARegister(); in determineCalleeSaves() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 661 unsigned LR = HRI.getRARegister(); in LowerINLINEASM() local
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| H A D | HexagonConstPropagation.cpp | 2706 const LatticeCell &LR = Inputs.get(R.Reg); in evaluateHexCondMove() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 3178 LiveRange &LR = LIS->getRegUnit(Unit); in findReachingDef() local
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| H A D | SIWholeQuadMode.cpp | 314 void SIWholeQuadMode::markDefs(const MachineInstr &UseMI, LiveRange &LR, in markDefs()
449 LiveRange &LR = LIS->getInterval(Reg); in markOperand() local
456 LiveRange &LR = LIS->getRegUnit(Unit); in markOperand() local
1138 LiveRange &LR = in prepareInsertion() local
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| H A D | SIOptimizeExecMasking.cpp | 386 LivePhysRegs LR(*TRI); in isRegisterInUseBetween() local
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| H A D | SILowerWWMCopies.cpp | 81 LiveRange &LR = in isSCCLiveAtMI() local
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| H A D | GCNRegPressure.cpp | 519 auto IsInOneSegment = [Begin, End](const LiveRange &LR) -> bool { in getRegLiveThroughMask()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FalkorHWPFFix.cpp | 711 LiveRegUnits LR(*TRI); in runOnLoop() local
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| /freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/Orc/ |
| H A D | EPCGenericDylibManager.cpp | 49 static size_t size(const ExecutorProcessControl::LookupRequest &LR) { in size()
54 const ExecutorProcessControl::LookupRequest &LR) { in serialize()
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| H A D | LookupAndRecordAddrs.cpp | 63 ExecutorProcessControl::LookupRequest LR(H, Symbols); in lookupAndRecordAddrs() local
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| H A D | ObjectLinkingLayer.cpp | 212 AsyncLookupResult LR; in lookup() local
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| /freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/JITLink/ |
| H A D | JITLinkGeneric.cpp | 135 Expected<AsyncLookupResult> LR) { in linkPhase3()
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| /freebsd/contrib/llvm-project/llvm/lib/DebugInfo/GSYM/ |
| H A D | FunctionInfo.cpp | 184 LookupResult LR; in lookup() local
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| H A D | DwarfTransformer.cpp | 637 auto LR = Gsym->lookup(Addr); in verify() local
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| /freebsd/contrib/llvm-project/llvm/lib/DebugInfo/LogicalView/Readers/ |
| H A D | LVCodeViewVisitor.cpp | 2164 Error LVLogicalVisitor::visitKnownRecord(CVType &Record, LabelRecord &LR, in visitKnownRecord()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TwoAddressInstructionPass.cpp | 1565 if (LiveRange *LR = LIS->getCachedRegUnit(Unit)) { in processTiedPairs() local
1626 auto Shrink = [=](LiveRange &LR, LaneBitmask LaneMask) { in processTiedPairs()
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| H A D | SplitKit.cpp | 1245 static bool removeDeadSegment(SlotIndex Def, LiveRange &LR) { in removeDeadSegment()
1257 LiveRange &LR, LaneBitmask LM, in extendPHIRange()
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| H A D | RegisterCoalescer.cpp | 1611 if (LiveRange *LR = LIS->getCachedRegUnit(Unit)) in reMaterializeTrivialDef() local
1624 if (LiveRange *LR = LIS->getCachedRegUnit(Unit)) in reMaterializeTrivialDef() local
2324 LiveRange &LR = LIS->getRegUnit(Unit); in joinReservedPhysReg() local
2407 LiveRange &LR; member in __anon495410520311::JoinVals
2589 JoinVals(LiveRange &LR, Register Reg, unsigned SubIdx, LaneBitmask LaneMask, in JoinVals()
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| H A D | MachineVerifier.cpp | 559 void MachineVerifier::report_context(const LiveRange &LR, Register VRegUnit, in report_context()
2428 const LiveRange &LR, in checkLivenessAtUse()
2454 const LiveRange &LR, in checkLivenessAtDef()
2555 if (const LiveRange *LR = LiveInts->getCachedRegUnit(Unit)) in checkLiveness() local
3087 if (const LiveRange *LR = LiveInts->getCachedRegUnit(i)) in verifyLiveIntervals() local
3091 void MachineVerifier::verifyLiveRangeValue(const LiveRange &LR, in verifyLiveRangeValue()
3182 void MachineVerifier::verifyLiveRangeSegment(const LiveRange &LR, in verifyLiveRangeSegment()
3410 void MachineVerifier::verifyLiveRange(const LiveRange &LR, Register Reg, in verifyLiveRange()
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| H A D | PHIElimination.cpp | 411 for (auto LR : ToUpdate) { in LowerPHINode() local
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