| /openbsd/gnu/llvm/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMInstPrinter.cpp | 102 const MCOperand &MO1 = MI->getOperand(1); in printInst() local
125 const MCOperand &MO1 = MI->getOperand(1); in printInst() local
369 const MCOperand &MO1 = MI->getOperand(OpNum); in printThumbLdrLabelOperand() local
436 const MCOperand &MO1 = MI->getOperand(Op); in printAM2PreOrOffsetIndexOp() local
465 const MCOperand &MO1 = MI->getOperand(Op); in printAddrModeTBB() local
477 const MCOperand &MO1 = MI->getOperand(Op); in printAddrModeTBH() local
489 const MCOperand &MO1 = MI->getOperand(Op); in printAddrMode2Operand() local
534 const MCOperand &MO1 = MI->getOperand(Op); in printAM3PreOrOffsetIndexOp() local
563 const MCOperand &MO1 = MI->getOperand(Op); in printAddrMode3Operand() local
1089 const MCOperand &MO1 = MI->getOperand(Op); in printThumbAddrModeRROperand() local
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| H A D | ARMMCCodeEmitter.cpp | 595 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); in EncodeAddrModeOpValues() local
930 const MCOperand &MO1 = MI.getOperand(OpIdx); in getThumbAddrModeRegRegOpValue() local
1186 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); in getT2AddrModeImm0_1020s4OpValue() local
1253 const MCOperand &MO1 = MI.getOperand(OpIdx+1); in getLdStSORegOpValue() local
1290 const MCOperand &MO1 = MI.getOperand(OpIdx+1); in getAddrMode2OffsetOpValue() local
1312 const MCOperand &MO1 = MI.getOperand(OpIdx+1); in getPostIdxRegOpValue() local
1326 const MCOperand &MO1 = MI.getOperand(OpIdx+1); in getAddrMode3OffsetOpValue() local
1347 const MCOperand &MO1 = MI.getOperand(OpIdx+1); in getAddrMode3OpValue() local
1594 const MCOperand &MO1 = MI.getOperand(OpNum); in getT2AddrModeSORegOpValue() local
1614 const MCOperand &MO1 = MI.getOperand(OpNum); in getT2AddrModeImmOpValue() local
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| H A D | ARMMCTargetDesc.cpp | 448 const MCOperand &MO1 = Inst.getOperand(MemOpIndex); in evaluateMemOpAddrForAddrMode_i12() local
466 const MCOperand &MO1 = Inst.getOperand(MemOpIndex); in evaluateMemOpAddrForAddrMode3() local
486 const MCOperand &MO1 = Inst.getOperand(MemOpIndex); in evaluateMemOpAddrForAddrMode5() local
505 const MCOperand &MO1 = Inst.getOperand(MemOpIndex); in evaluateMemOpAddrForAddrMode5FP16() local
525 const MCOperand &MO1 = Inst.getOperand(MemOpIndex); in evaluateMemOpAddrForAddrModeT2_i8s4() local
543 const MCOperand &MO1 = Inst.getOperand(MemOpIndex); in evaluateMemOpAddrForAddrModeT2_pc() local
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| /openbsd/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86OptimizeLEAs.cpp | 201 static inline bool isIdenticalOp(const MachineOperand &MO1, in isIdenticalOp()
213 static bool isSimilarDispOp(const MachineOperand &MO1, in isSimilarDispOp()
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| H A D | X86RegisterInfo.cpp | 966 MachineOperand &MO1 = MI->getOperand(1); in getTileShape() local
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| H A D | X86FloatingPoint.cpp | 1527 const MachineOperand &MO1 = MI.getOperand(1); in handleSpecialFP() local
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| H A D | X86InstrInfo.cpp | 7001 MachineOperand &MO1 = DataMI->getOperand(1); in unfoldMemoryOperand() local
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| /openbsd/gnu/llvm/llvm/lib/Target/MSP430/MCTargetDesc/ |
| H A D | MSP430MCCodeEmitter.cpp | 123 const MCOperand &MO1 = MI.getOperand(Op); in getMemOpValue() local
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| /openbsd/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMHazardRecognizer.cpp | 202 auto MO1 = *L1->memoperands().begin(); in getHazardType() local
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| H A D | ARMAsmPrinter.cpp | 978 const MachineOperand &MO1 = MI->getOperand(1); in emitJumpTableAddrs() local
1024 const MachineOperand &MO1 = MI->getOperand(1); in emitJumpTableInsts() local
1054 const MachineOperand &MO1 = MI->getOperand(1); in emitJumpTableTBInst() local
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| H A D | ARMExpandPseudoInsts.cpp | 2555 const MachineOperand &MO1 = MI.getOperand(1); in ExpandMI() local
2616 const MachineOperand &MO1 = MI.getOperand(1); in ExpandMI() local
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| H A D | ARMBaseInstrInfo.cpp | 1876 const MachineOperand &MO1 = MI1.getOperand(1); in produceSameValue() local
1929 const MachineOperand &MO1 = MI1.getOperand(i); in produceSameValue() local
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| /openbsd/gnu/llvm/llvm/lib/Target/Hexagon/AsmParser/ |
| H A D | HexagonAsmParser.cpp | 1233 static MCInst makeCombineInst(int opCode, MCOperand &Rdd, MCOperand &MO1, in makeCombineInst()
1595 MCOperand &MO1 = Inst.getOperand(1); in processInstruction() local
1610 MCOperand &MO1 = Inst.getOperand(1); in processInstruction() local
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| /openbsd/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonAsmPrinter.cpp | 464 MCOperand &MO1 = MappedInst.getOperand(1); in HexagonProcessInstruction() local
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| /openbsd/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64ExpandPseudoInsts.cpp | 1155 const MachineOperand &MO1 = MI.getOperand(1); in expandMI() local
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| /openbsd/gnu/llvm/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 280 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); in getAddSubImmOpValue() local
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| H A D | AArch64InstPrinter.cpp | 1407 const MCOperand MO1 = MI->getOperand(OpNum + 1); in printAMIndexedWB() local
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| /openbsd/gnu/llvm/llvm/lib/CodeGen/ |
| H A D | RegAllocFast.cpp | 1242 const MachineOperand &MO1 = MI.getOperand(I1); in allocateInstruction() local
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| H A D | MachineVerifier.cpp | 2799 const MachineOperand &MO1 = Phi.getOperand(I + 1); in checkPHIOps() local
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| /openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 463 auto MO1 = *MI1.memoperands_begin(); in memOpsHaveSameBasePtr() local
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| /openbsd/gnu/llvm/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 1299 MachineOperand &MO1 = MI.getOperand(1); in narrowScalar() local
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