| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/M68k/GlSel/ |
| H A D | M68kCallLowering.h | 30 public: in M68kCallLowering()
31 M68kCallLowering(const M68kTargetLowering &TLI); in M68kCallLowering()
35 Register SwiftErrorVReg) const override; in assignValueToReg()
44 bool enableBigEndian() const override;
47 M68kIncomingValueHandler(MachineIRBuilder &MIRBuilder, in getStackAddress()
54 void assignValueToReg(Register ValVReg, Register PhysReg,
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/M68k/GlSel/ |
| H A D | M68kCallLowering.cpp | 30 struct OutgoingArgHandler : public CallLowering::OutgoingValueHandler { struct
31 OutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in OutgoingArgHandler() function
35 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
42 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, in assignValueToAddress()
47 Register getStackAddress(uint64_t Size, int64_t Offset, in getStackAddress()
75 OutgoingArgHandler ArgHandler(MIRBuilder, MRI, MIB); in lowerReturn() argument
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/M68k/GlSel/ |
| H A D | M68kCallLowering.cpp | 30 struct OutgoingArgHandler : public CallLowering::OutgoingValueHandler { struct
31 OutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in OutgoingArgHandler() argument
35 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
42 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, in assignValueToAddress()
47 Register getStackAddress(uint64_t Size, int64_t Offset, in getStackAddress()
75 OutgoingArgHandler ArgHandler(MIRBuilder, MRI, MIB); in lowerReturn() argument
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/M68k/GlSel/ |
| H A D | M68kCallLowering.cpp | 30 struct OutgoingArgHandler : public CallLowering::OutgoingValueHandler { struct
31 OutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in OutgoingArgHandler() function
35 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
42 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, in assignValueToAddress()
47 Register getStackAddress(uint64_t Size, int64_t Offset, in getStackAddress()
75 OutgoingArgHandler ArgHandler(MIRBuilder, MRI, MIB); in lowerReturn() argument
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/M68k/GlSel/ |
| H A D | M68kCallLowering.cpp | 30 struct OutgoingArgHandler : public CallLowering::OutgoingValueHandler { struct
31 OutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in OutgoingArgHandler() argument
35 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
42 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, in assignValueToAddress()
47 Register getStackAddress(uint64_t Size, int64_t Offset, in getStackAddress()
75 OutgoingArgHandler ArgHandler(MIRBuilder, MRI, MIB); in lowerReturn() argument
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/M68k/GlSel/ |
| H A D | M68kCallLowering.cpp | 30 struct OutgoingArgHandler : public CallLowering::OutgoingValueHandler { struct
31 OutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in OutgoingArgHandler() function
35 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
42 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, in assignValueToAddress()
47 Register getStackAddress(uint64_t Size, int64_t Offset, in getStackAddress()
75 OutgoingArgHandler ArgHandler(MIRBuilder, MRI, MIB); in lowerReturn() argument
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64CallLowering.cpp | 129 struct OutgoingArgHandler : public CallLowering::ValueHandler { struct
130 OutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in OutgoingArgHandler() function
136 Register getStackAddress(uint64_t Size, int64_t Offset, in getStackAddress()
153 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
160 void assignValueToAddress(Register ValVReg, Register Addr, uint64_t Size, in assignValueToAddress()
173 bool assignArg(unsigned ValNo, MVT ValVT, MVT LocVT, in assignArg()
187 MachineInstrBuilder MIB;
188 CCAssignFn *AssignFnVarArg;
189 uint64_t StackSize;
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64CallLowering.cpp | 125 struct OutgoingArgHandler : public CallLowering::ValueHandler { struct
126 OutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in OutgoingArgHandler() argument
132 unsigned getStackAddress(uint64_t Size, int64_t Offset, in getStackAddress()
149 void assignValueToReg(unsigned ValVReg, unsigned PhysReg, in assignValueToReg()
156 void assignValueToAddress(unsigned ValVReg, unsigned Addr, uint64_t Size, in assignValueToAddress()
169 bool assignArg(unsigned ValNo, MVT ValVT, MVT LocVT, in assignArg()
183 MachineInstrBuilder MIB;
184 CCAssignFn *AssignFnVarArg;
185 uint64_t StackSize;
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64CallLowering.cpp | 125 struct OutgoingArgHandler : public CallLowering::ValueHandler { struct
126 OutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in OutgoingArgHandler() function
132 unsigned getStackAddress(uint64_t Size, int64_t Offset, in getStackAddress()
149 void assignValueToReg(unsigned ValVReg, unsigned PhysReg, in assignValueToReg()
156 void assignValueToAddress(unsigned ValVReg, unsigned Addr, uint64_t Size, in assignValueToAddress()
169 bool assignArg(unsigned ValNo, MVT ValVT, MVT LocVT, in assignArg()
183 MachineInstrBuilder MIB;
184 CCAssignFn *AssignFnVarArg;
185 uint64_t StackSize;
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 129 struct OutgoingArgHandler : public CallLowering::ValueHandler { struct
130 OutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in OutgoingArgHandler() argument
140 Register getStackAddress(uint64_t Size, int64_t Offset, in getStackAddress()
165 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
201 bool assignArg(unsigned ValNo, MVT ValVT, MVT LocVT, in assignArg()
216 MachineInstrBuilder MIB;
217 CCAssignFn *AssignFnVarArg;
218 bool IsTailCall;
222 int FPDiff;
223 uint64_t StackSize;
[all …]
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 134 struct OutgoingArgHandler : public CallLowering::ValueHandler { struct
135 OutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in OutgoingArgHandler() argument
145 Register getStackAddress(uint64_t Size, int64_t Offset, in getStackAddress()
170 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
206 bool assignArg(unsigned ValNo, MVT ValVT, MVT LocVT, in assignArg()
221 MachineInstrBuilder MIB;
222 CCAssignFn *AssignFnVarArg;
223 bool IsTailCall;
227 int FPDiff;
228 uint64_t StackSize;
[all …]
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 132 struct OutgoingArgHandler : public CallLowering::OutgoingValueHandler { struct
133 OutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in OutgoingArgHandler() function
141 Register getStackAddress(uint64_t Size, int64_t Offset, in getStackAddress()
166 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
204 bool assignArg(unsigned ValNo, MVT ValVT, MVT LocVT, in assignArg()
219 MachineInstrBuilder MIB;
220 CCAssignFn *AssignFnVarArg;
221 bool IsTailCall;
225 int FPDiff;
226 uint64_t StackSize;
[all …]
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 132 struct OutgoingArgHandler : public CallLowering::OutgoingValueHandler { struct
133 OutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in OutgoingArgHandler() argument
141 Register getStackAddress(uint64_t Size, int64_t Offset, in getStackAddress()
166 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
204 bool assignArg(unsigned ValNo, MVT ValVT, MVT LocVT, in assignArg()
219 MachineInstrBuilder MIB;
220 CCAssignFn *AssignFnVarArg;
221 bool IsTailCall;
225 int FPDiff;
226 uint64_t StackSize;
[all …]
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 132 struct OutgoingArgHandler : public CallLowering::OutgoingValueHandler { struct
133 OutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in OutgoingArgHandler() function
141 Register getStackAddress(uint64_t Size, int64_t Offset, in getStackAddress()
166 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
204 bool assignArg(unsigned ValNo, MVT ValVT, MVT LocVT, in assignArg()
219 MachineInstrBuilder MIB;
220 CCAssignFn *AssignFnVarArg;
221 bool IsTailCall;
225 int FPDiff;
226 uint64_t StackSize;
[all …]
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64CallLowering.cpp | 130 struct OutgoingArgHandler : public CallLowering::ValueHandler { struct
131 OutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in OutgoingArgHandler() function
139 bool isIncomingArgumentHandler() const override { return false; } in isIncomingArgumentHandler()
141 Register getStackAddress(uint64_t Size, int64_t Offset, in getStackAddress()
169 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
189 bool assignArg(unsigned ValNo, MVT ValVT, MVT LocVT, in assignArg()
204 MachineInstrBuilder MIB;
205 CCAssignFn *AssignFnVarArg;
206 bool IsTailCall;
210 int FPDiff;
[all …]
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64CallLowering.cpp | 130 struct OutgoingArgHandler : public CallLowering::ValueHandler { struct
131 OutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in OutgoingArgHandler() function
139 bool isIncomingArgumentHandler() const override { return false; } in isIncomingArgumentHandler()
141 Register getStackAddress(uint64_t Size, int64_t Offset, in getStackAddress()
169 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
189 bool assignArg(unsigned ValNo, MVT ValVT, MVT LocVT, in assignArg()
204 MachineInstrBuilder MIB;
205 CCAssignFn *AssignFnVarArg;
206 bool IsTailCall;
210 int FPDiff;
[all …]
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64CallLowering.cpp | 130 struct OutgoingArgHandler : public CallLowering::ValueHandler { struct
131 OutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in OutgoingArgHandler() function
139 bool isIncomingArgumentHandler() const override { return false; } in isIncomingArgumentHandler()
141 Register getStackAddress(uint64_t Size, int64_t Offset, in getStackAddress()
169 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
189 bool assignArg(unsigned ValNo, MVT ValVT, MVT LocVT, in assignArg()
204 MachineInstrBuilder MIB;
205 CCAssignFn *AssignFnVarArg;
206 bool IsTailCall;
210 int FPDiff;
[all …]
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 33 struct OutgoingArgHandler : public CallLowering::ValueHandler { struct
34 OutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in OutgoingArgHandler() argument
38 MachineInstrBuilder MIB;
40 Register getStackAddress(uint64_t Size, int64_t Offset, in getStackAddress()
45 void assignValueToAddress(Register ValVReg, Register Addr, uint64_t Size, in assignValueToAddress()
50 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
56 bool assignArg(unsigned ValNo, MVT ValVT, MVT LocVT, in assignArg()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 225 struct OutgoingArgHandler : public CallLowering::OutgoingValueHandler { struct
226 OutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in OutgoingArgHandler() argument
233 Register getStackAddress(uint64_t Size, int64_t Offset, in getStackAddress()
265 LLT getStackValueStoreType(const DataLayout &DL, const CCValAssign &VA, in getStackValueStoreType()
272 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
279 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, in assignValueToAddress()
315 MachineInstrBuilder MIB;
317 bool IsTailCall;
321 int FPDiff;
324 Register SPReg;
[all …]
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 225 struct OutgoingArgHandler : public CallLowering::OutgoingValueHandler { struct
226 OutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in OutgoingArgHandler() argument
233 Register getStackAddress(uint64_t Size, int64_t Offset, in getStackAddress()
265 LLT getStackValueStoreType(const DataLayout &DL, const CCValAssign &VA, in getStackValueStoreType()
272 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
279 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, in assignValueToAddress()
315 MachineInstrBuilder MIB;
317 bool IsTailCall;
321 int FPDiff;
324 Register SPReg;
[all …]
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 225 struct OutgoingArgHandler : public CallLowering::OutgoingValueHandler { struct
226 OutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in OutgoingArgHandler() argument
233 Register getStackAddress(uint64_t Size, int64_t Offset, in getStackAddress()
265 LLT getStackValueStoreType(const DataLayout &DL, const CCValAssign &VA, in getStackValueStoreType()
272 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
279 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, in assignValueToAddress()
315 MachineInstrBuilder MIB;
317 bool IsTailCall;
321 int FPDiff;
324 Register SPReg;
[all …]
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 225 struct OutgoingArgHandler : public CallLowering::OutgoingValueHandler { struct
226 OutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in OutgoingArgHandler() function
233 Register getStackAddress(uint64_t Size, int64_t Offset, in getStackAddress()
265 LLT getStackValueStoreType(const DataLayout &DL, const CCValAssign &VA, in getStackValueStoreType()
272 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
279 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, in assignValueToAddress()
315 MachineInstrBuilder MIB;
317 bool IsTailCall;
321 int FPDiff;
324 Register SPReg;
[all …]
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 225 struct OutgoingArgHandler : public CallLowering::OutgoingValueHandler { struct
226 OutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in OutgoingArgHandler() function
233 Register getStackAddress(uint64_t Size, int64_t Offset, in getStackAddress()
265 LLT getStackValueStoreType(const DataLayout &DL, const CCValAssign &VA, in getStackValueStoreType()
272 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
279 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, in assignValueToAddress()
315 MachineInstrBuilder MIB;
317 bool IsTailCall;
321 int FPDiff;
324 Register SPReg;
[all …]
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 236 struct OutgoingArgHandler : public CallLowering::OutgoingValueHandler { struct
237 OutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in OutgoingArgHandler() argument
244 Register getStackAddress(uint64_t Size, int64_t Offset, in getStackAddress()
276 LLT getStackValueStoreType(const DataLayout &DL, const CCValAssign &VA, in getStackValueStoreType()
283 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
290 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, in assignValueToAddress()
326 MachineInstrBuilder MIB;
328 bool IsTailCall;
332 int FPDiff;
335 Register SPReg;
[all …]
|