/dports/multimedia/libv4l/linux-5.13-rc2/drivers/clk/x86/ |
H A D | clk-lgm.c | 112 #define PLL_DIV(x) ((x) + 0x04) macro
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf527/ |
H A D | BF522_def.h | 14 #define PLL_DIV 0xFFC00004 /* PLL Divide Register */ macro
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H A D | BF523_def.h | 14 #define PLL_DIV 0xFFC00004 /* PLL Divide Register */ macro
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf527/ |
H A D | BF523_def.h | 14 #define PLL_DIV 0xFFC00004 /* PLL Divide Register */ macro
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H A D | BF522_def.h | 14 #define PLL_DIV 0xFFC00004 /* PLL Divide Register */ macro
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf527/ |
H A D | BF522_def.h | 14 #define PLL_DIV 0xFFC00004 /* PLL Divide Register */ macro
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H A D | BF523_def.h | 14 #define PLL_DIV 0xFFC00004 /* PLL Divide Register */ macro
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/clk/x86/ |
H A D | clk-lgm.c | 112 #define PLL_DIV(x) ((x) + 0x04) macro
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/clk/ |
H A D | clk-sparx5.c | 19 #define PLL_DIV GENMASK(7, 0) macro
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/clk/ |
H A D | clk-sparx5.c | 19 #define PLL_DIV GENMASK(7, 0) macro
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/clk/x86/ |
H A D | clk-lgm.c | 112 #define PLL_DIV(x) ((x) + 0x04) macro
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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf527/ |
H A D | BF522_def.h | 14 #define PLL_DIV 0xFFC00004 /* PLL Divide Register */ macro
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H A D | BF523_def.h | 14 #define PLL_DIV 0xFFC00004 /* PLL Divide Register */ macro
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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/clk/ |
H A D | clk-sparx5.c | 19 #define PLL_DIV GENMASK(7, 0) macro
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf527/ |
H A D | BF522_def.h | 14 #define PLL_DIV 0xFFC00004 /* PLL Divide Register */ macro
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H A D | BF523_def.h | 14 #define PLL_DIV 0xFFC00004 /* PLL Divide Register */ macro
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/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf527/ |
H A D | BF522_def.h | 14 #define PLL_DIV 0xFFC00004 /* PLL Divide Register */ macro
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H A D | BF523_def.h | 14 #define PLL_DIV 0xFFC00004 /* PLL Divide Register */ macro
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/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf527/ |
H A D | BF522_def.h | 14 #define PLL_DIV 0xFFC00004 /* PLL Divide Register */ macro
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H A D | BF523_def.h | 14 #define PLL_DIV 0xFFC00004 /* PLL Divide Register */ macro
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/clk/at91/ |
H A D | clk-pll.c | 19 #define PLL_DIV(reg) ((reg) & PLL_DIV_MASK) macro
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/clk/at91/ |
H A D | clk-pll.c | 19 #define PLL_DIV(reg) ((reg) & PLL_DIV_MASK) macro
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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/clk/at91/ |
H A D | clk-pll.c | 19 #define PLL_DIV(reg) ((reg) & PLL_DIV_MASK) macro
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/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/mips/ar7/ |
H A D | clock.c | 54 #define PLL_DIV 0x00000002 macro
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/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/mips/ar7/ |
H A D | clock.c | 54 #define PLL_DIV 0x00000002 macro
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