| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | A15SDOptimizer.cpp | 133 const TargetRegisterClass *TRC) { in usesRegClass()
269 const TargetRegisterClass *TRC = in optimizeSDPattern() local
432 const TargetRegisterClass *TRC) { in createExtractSubreg()
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| H A D | ARMLoadStoreOptimizer.cpp | 2428 const TargetRegisterClass *TRC = TII->getRegClass(MCID, 0, TRI, *MF); in RescheduleOps() local
3023 const TargetRegisterClass *TRC = TII->getRegClass(MCID, BaseOp, TRI, *MF); in AdjustBaseAndOffset() local
3080 const TargetRegisterClass *TRC = TII->getRegClass(MCID, 0, TRI, *MF); in createPostIncLoadStore() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyAsmPrinter.cpp | 63 const TargetRegisterClass *TRC = MRI->getRegClass(RegNo); in getRegType() local
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| H A D | WebAssemblyISelLowering.cpp | 559 const TargetRegisterClass *TRC = MRI.getRegClass(Reg); in LowerCallResults() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | InstrEmitter.cpp | 499 const TargetRegisterClass *TRC = in EmitSubregNode() local
655 const TargetRegisterClass *TRC = MRI->getRegClass(SubReg); in EmitRegSequence() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86AvoidStoreForwardingBlocks.cpp | 557 const auto *TRC = TII->getRegClass(TII->get(LoadInst->getOpcode()), 0, TRI, in getRegSizeInBytes() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineRegisterInfo.cpp | 500 const TargetRegisterClass &TRC = *getRegClass(Reg); in getMaxLaneMaskForVReg() local
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| H A D | LiveDebugVariables.cpp | 1542 const TargetRegisterClass *TRC = MRI.getRegClass(VirtReg); in rewriteLocations() local
1854 const TargetRegisterClass *TRC = MRI.getRegClass(Reg); in emitDebugValues() local
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| H A D | RegAllocPBQP.cpp | 617 const TargetRegisterClass *TRC = MRI.getRegClass(VReg); in initializeGraph() local
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| H A D | MachinePipeliner.cpp | 1278 for (const TargetRegisterClass *TRC : TRI->regclasses()) { in computePressureSetLimit() local
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| /freebsd/usr.sbin/lpr/lpd/ |
| H A D | printjob.c | 1488 #define TRC(q) (((q)-' ')&0177) macro
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| /freebsd/contrib/llvm-project/clang/include/clang/AST/ |
| H A D | ASTNodeTraverser.h | 440 if (const Expr *TRC = D->getTrailingRequiresClause()) in VisitFunctionDecl() local
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| H A D | Decl.h | 2629 if (auto *TRC = getTrailingRequiresClause()) in getAssociatedConstraints() local
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| /freebsd/contrib/llvm-project/clang/lib/Sema/ |
| H A D | SemaTemplateVariadic.cpp | 976 if (Expr *TRC = D.getTrailingRequiresClause()) in containsUnexpandedParameterPacks() local
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| H A D | SemaLambda.cpp | 1457 if (Expr *TRC = Method->getTrailingRequiresClause()) { in ActOnStartOfLambdaDefinition() local
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| H A D | SemaLookup.cpp | 5495 TypoDiagnosticGenerator TDG, TypoRecoveryCallback TRC, CorrectTypoKind Mode, in CorrectTypoDelayed()
5860 TypoRecoveryCallback TRC, in createDelayedTypo()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCMIPeephole.cpp | 1152 const TargetRegisterClass *TRC = MI.getOpcode() == PPC::ADD8 in simplifyCode() local
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.h | 80 DstOp(const TargetRegisterClass *TRC) : RC(TRC), Ty(DstType::Ty_RC) {} in DstOp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.h | 1378 const TargetRegisterClass &TRC, in isOfRegClass()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 4116 const TargetRegisterClass *TRC = ::getRegClass(MI, Reg); in isHForm() local
4130 const TargetRegisterClass *TRC = ::getRegClass(MI, Reg); in isQForm() local
4175 const TargetRegisterClass *TRC = ::getRegClass(MI, Reg); in isFpOrNEON() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelDAGToDAG.cpp | 1794 const TargetRegisterClass *TRC = in SelectInlineAsmMemoryOperand() local
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| /freebsd/contrib/llvm-project/clang/lib/AST/ |
| H A D | DeclTemplate.cpp | 274 if (const Expr *TRC = FD->getTrailingRequiresClause()) in getAssociatedConstraints() local
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| /freebsd/contrib/llvm-project/clang/include/clang/Sema/ |
| H A D | DeclSpec.h | 2548 void setTrailingRequiresClause(Expr *TRC) { in setTrailingRequiresClause()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 2102 const TargetRegisterClass *TRC; in createVR() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/LiveDebugValues/ |
| H A D | InstrRefBasedImpl.cpp | 1529 const TargetRegisterClass *TRC = nullptr; in getValueForInstrRef() local
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