/dragonfly/sys/dev/drm/i915/ |
H A D | intel_dpll_mgr.c | 687 hsw_ddi_calculate_wrpll(int clock /* in Hz */, in hsw_ddi_calculate_wrpll() 811 int clock = crtc_state->port_clock; in hsw_get_dpll() local 1289 int clock) in skl_ddi_hdmi_pll_dividers() 1325 skl_ddi_dp_set_dpll_hw_state(int clock, in skl_ddi_dp_set_dpll_hw_state() 1366 int clock = crtc_state->port_clock; in skl_get_dpll() local 1647 int clock; member 1782 bxt_ddi_dp_set_dpll_hw_state(int clock, in bxt_ddi_dp_set_dpll_hw_state() 1813 int i, clock = crtc_state->port_clock; in bxt_get_dpll() local 2266 int clock) in cnl_ddi_hdmi_pll_dividers() 2296 cnl_ddi_dp_set_dpll_hw_state(int clock, in cnl_ddi_dp_set_dpll_hw_state() [all …]
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H A D | intel_audio.c | 68 int clock; member 119 int clock; member 139 int clock; member
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H A D | intel_panel.c | 1360 u32 mul, clock; in lpt_hz_to_pwm() local 1397 int clock; in i9xx_hz_to_pwm() local 1415 int clock; in i965_hz_to_pwm() local 1433 int mul, clock; in vlv_hz_to_pwm() local
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/dragonfly/sys/dev/drm/amd/amdgpu/ |
H A D | amdgpu_afmt.c | 51 static void amdgpu_afmt_calc_cts(uint32_t clock, int *CTS, int *N, int freq) in amdgpu_afmt_calc_cts() 88 struct amdgpu_afmt_acr amdgpu_afmt_acr(uint32_t clock) in amdgpu_afmt_acr()
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H A D | atombios_crtc.c | 317 u32 clock = mode->clock; in amdgpu_atombios_crtc_adjust_pll() local 581 u32 clock, in amdgpu_atombios_crtc_program_pll() 825 u32 clock = mode->clock; in amdgpu_atombios_crtc_set_pll() local
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H A D | amdgpu_i2c.c | 129 static void amdgpu_i2c_set_clock(void *i2c_priv, int clock) in amdgpu_i2c_set_clock()
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/dragonfly/sys/dev/drm/amd/powerplay/hwmgr/ |
H A D | smu8_hwmgr.c | 69 uint32_t clock, uint32_t msg) in smu8_get_eclk_level() 100 uint32_t clock, uint32_t msg) in smu8_get_sclk_level() 130 uint32_t clock, uint32_t msg) in smu8_get_uvd_level() 559 unsigned long clock = 0, level; in smu8_init_sclk_limit() local 585 unsigned long clock = 0, level; in smu8_init_uvd_limit() local 612 unsigned long clock = 0, level; in smu8_init_vce_limit() local 639 unsigned long clock = 0, level; in smu8_init_acp_limit() local 684 unsigned long clock = 0; in smu8_update_sclk_limit() local 1142 unsigned long clock = 0, level; in smu8_phm_unforce_dpm_levels() local
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H A D | vega12_hwmgr.c | 489 PPCLK_e clkID, uint32_t index, uint32_t *clock) in vega12_get_dpm_frequency_by_index() 876 PPCLK_e clkid, struct vega12_clock_range *clock) in vega12_get_all_clock_ranges_helper() 1610 uint32_t *clock, in vega12_get_clock_ranges() 1652 uint32_t clock) in vega12_get_mem_latency()
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H A D | smu10_hwmgr.c | 214 static int smu10_set_deep_sleep_dcefclk(struct pp_hwmgr *hwmgr, uint32_t clock) in smu10_set_deep_sleep_dcefclk() 943 uint32_t clock) in smu10_get_mem_latency()
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H A D | hardwaremanager.c | 452 struct pp_display_clock_request *clock) in phm_display_clock_voltage_request()
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/dragonfly/sys/dev/drm/radeon/ |
H A D | radeon_audio.c | 501 static void radeon_audio_set_dto(struct drm_encoder *encoder, unsigned int clock) in radeon_audio_set_dto() 559 static void radeon_audio_calc_cts(unsigned int clock, int *CTS, int *N, int freq) in radeon_audio_calc_cts() 596 static const struct radeon_hdmi_acr* radeon_audio_acr(unsigned int clock) in radeon_audio_acr() 632 static void radeon_audio_update_acr(struct drm_encoder *encoder, unsigned int clock) in radeon_audio_update_acr()
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H A D | dce6_afmt.c | 284 struct radeon_crtc *crtc, unsigned int clock) in dce6_hdmi_audio_set_dto() 305 struct radeon_crtc *crtc, unsigned int clock) in dce6_dp_audio_set_dto()
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H A D | evergreen_hdmi.c | 245 struct radeon_crtc *crtc, unsigned int clock) in dce4_hdmi_audio_set_dto() 290 struct radeon_crtc *crtc, unsigned int clock) in dce4_dp_audio_set_dto()
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H A D | dce3_1_afmt.c | 125 struct radeon_crtc *crtc, unsigned int clock) in dce3_2_audio_set_dto()
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H A D | atombios_crtc.c | 567 u32 clock = mode->clock; in atombios_adjust_pll() local 825 u32 clock, in atombios_crtc_program_pll() 1068 u32 clock = mode->clock; in atombios_crtc_set_pll() local
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H A D | rv6xx_dpm.c | 140 u32 clock, struct rv6xx_sclk_stepping *step) in rv6xx_convert_clock_to_stepping() 298 u32 clock, u32 index) in rv6xx_generate_single_step() 550 u32 clock, enum r600_power_level level) in rv6xx_program_engine_spread_spectrum() 599 u32 entry, u32 clock) in rv6xx_program_mclk_stepping_entry()
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/dragonfly/lib/libc/gen/ |
H A D | clock.c | 45 clock(void) in clock() function
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/dragonfly/include/rpcsvc/ |
H A D | spray.x | 54 spraytimeval clock; member
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/dragonfly/sys/dev/drm/amd/powerplay/smumgr/ |
H A D | vegam_smumgr.c | 602 uint32_t clock, SMU_VoltageLevel *voltage, uint32_t *mvdd) in vegam_get_dependency_volt_by_clk() 720 uint32_t clock, SMU_SclkSetting *sclk_setting) in vegam_calculate_sclk_params() 790 static uint8_t vegam_get_sleep_divider_id_from_clock(uint32_t clock, in vegam_get_sleep_divider_id_from_clock() 810 uint32_t clock, struct SMU75_Discrete_GraphicsLevel *level) in vegam_populate_single_graphic_level() 964 uint32_t clock, struct SMU75_Discrete_MemoryLevel *mem_level) in vegam_calculate_mclk_params() 982 uint32_t clock, struct SMU75_Discrete_MemoryLevel *mem_level) in vegam_populate_single_memory_level()
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H A D | fiji_smumgr.c | 366 uint32_t clock, uint32_t *voltage, uint32_t *mvdd) in fiji_get_dependency_volt_by_clk() 868 uint32_t clock, struct SMU73_Discrete_GraphicsLevel *sclk) in fiji_calculate_sclk_params() 949 uint32_t clock, struct SMU73_Discrete_GraphicsLevel *level) in fiji_populate_single_graphic_level() 1157 uint32_t clock, struct SMU73_Discrete_MemoryLevel *mclk) in fiji_calculate_mclk_params() 1176 uint32_t clock, struct SMU73_Discrete_MemoryLevel *mem_level) in fiji_populate_single_memory_level()
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H A D | polaris10_smumgr.c | 353 uint32_t clock, SMU_VoltageLevel *voltage, uint32_t *mvdd) in polaris10_get_dependency_volt_by_clk() 841 uint32_t clock, SMU_SclkSetting *sclk_setting) in polaris10_calculate_sclk_params() 906 uint32_t clock, struct SMU74_Discrete_GraphicsLevel *level) in polaris10_populate_single_graphic_level() 1071 uint32_t clock, struct SMU74_Discrete_MemoryLevel *mem_level) in polaris10_populate_single_memory_level()
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H A D | ci_smumgr.c | 277 uint32_t clock, uint32_t *vol) in ci_get_dependency_volt_by_clk() 296 uint32_t clock, struct SMU7_Discrete_GraphicsLevel *sclk) in ci_calculate_sclk_params() 386 static uint8_t ci_get_sleep_divider_id_from_clock(uint32_t clock, in ci_get_sleep_divider_id_from_clock() 407 uint32_t clock, struct SMU7_Discrete_GraphicsLevel *level) in ci_populate_single_graphic_level()
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/dragonfly/sys/dev/disk/sdhci/ |
H A D | sdhci.c | 176 uint32_t clock; in sdhci_reset() local 252 sdhci_set_clock(struct sdhci_slot *slot, uint32_t clock) in sdhci_set_clock() 1885 uint32_t clock, max_clock; in sdhci_generic_write_ivar() local
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/dragonfly/usr.sbin/cron/lib/ |
H A D | misc.c | 599 arpadate(time_t *clock) in arpadate()
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/dragonfly/sys/dev/drm/amd/display/amdgpu_dm/ |
H A D | amdgpu_dm_pp_smu.c | 486 struct pp_display_clock_request clock = {0}; in pp_rv_set_display_requirement() local
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