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Searched defs:clock (Results 1 – 25 of 77) sorted by relevance

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/dragonfly/sys/dev/drm/i915/
H A Dintel_dpll_mgr.c687 hsw_ddi_calculate_wrpll(int clock /* in Hz */, in hsw_ddi_calculate_wrpll()
811 int clock = crtc_state->port_clock; in hsw_get_dpll() local
1289 int clock) in skl_ddi_hdmi_pll_dividers()
1325 skl_ddi_dp_set_dpll_hw_state(int clock, in skl_ddi_dp_set_dpll_hw_state()
1366 int clock = crtc_state->port_clock; in skl_get_dpll() local
1647 int clock; member
1782 bxt_ddi_dp_set_dpll_hw_state(int clock, in bxt_ddi_dp_set_dpll_hw_state()
1813 int i, clock = crtc_state->port_clock; in bxt_get_dpll() local
2266 int clock) in cnl_ddi_hdmi_pll_dividers()
2296 cnl_ddi_dp_set_dpll_hw_state(int clock, in cnl_ddi_dp_set_dpll_hw_state()
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H A Dintel_audio.c68 int clock; member
119 int clock; member
139 int clock; member
H A Dintel_panel.c1360 u32 mul, clock; in lpt_hz_to_pwm() local
1397 int clock; in i9xx_hz_to_pwm() local
1415 int clock; in i965_hz_to_pwm() local
1433 int mul, clock; in vlv_hz_to_pwm() local
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Damdgpu_afmt.c51 static void amdgpu_afmt_calc_cts(uint32_t clock, int *CTS, int *N, int freq) in amdgpu_afmt_calc_cts()
88 struct amdgpu_afmt_acr amdgpu_afmt_acr(uint32_t clock) in amdgpu_afmt_acr()
H A Datombios_crtc.c317 u32 clock = mode->clock; in amdgpu_atombios_crtc_adjust_pll() local
581 u32 clock, in amdgpu_atombios_crtc_program_pll()
825 u32 clock = mode->clock; in amdgpu_atombios_crtc_set_pll() local
H A Damdgpu_i2c.c129 static void amdgpu_i2c_set_clock(void *i2c_priv, int clock) in amdgpu_i2c_set_clock()
/dragonfly/sys/dev/drm/amd/powerplay/hwmgr/
H A Dsmu8_hwmgr.c69 uint32_t clock, uint32_t msg) in smu8_get_eclk_level()
100 uint32_t clock, uint32_t msg) in smu8_get_sclk_level()
130 uint32_t clock, uint32_t msg) in smu8_get_uvd_level()
559 unsigned long clock = 0, level; in smu8_init_sclk_limit() local
585 unsigned long clock = 0, level; in smu8_init_uvd_limit() local
612 unsigned long clock = 0, level; in smu8_init_vce_limit() local
639 unsigned long clock = 0, level; in smu8_init_acp_limit() local
684 unsigned long clock = 0; in smu8_update_sclk_limit() local
1142 unsigned long clock = 0, level; in smu8_phm_unforce_dpm_levels() local
H A Dvega12_hwmgr.c489 PPCLK_e clkID, uint32_t index, uint32_t *clock) in vega12_get_dpm_frequency_by_index()
876 PPCLK_e clkid, struct vega12_clock_range *clock) in vega12_get_all_clock_ranges_helper()
1610 uint32_t *clock, in vega12_get_clock_ranges()
1652 uint32_t clock) in vega12_get_mem_latency()
H A Dsmu10_hwmgr.c214 static int smu10_set_deep_sleep_dcefclk(struct pp_hwmgr *hwmgr, uint32_t clock) in smu10_set_deep_sleep_dcefclk()
943 uint32_t clock) in smu10_get_mem_latency()
H A Dhardwaremanager.c452 struct pp_display_clock_request *clock) in phm_display_clock_voltage_request()
/dragonfly/sys/dev/drm/radeon/
H A Dradeon_audio.c501 static void radeon_audio_set_dto(struct drm_encoder *encoder, unsigned int clock) in radeon_audio_set_dto()
559 static void radeon_audio_calc_cts(unsigned int clock, int *CTS, int *N, int freq) in radeon_audio_calc_cts()
596 static const struct radeon_hdmi_acr* radeon_audio_acr(unsigned int clock) in radeon_audio_acr()
632 static void radeon_audio_update_acr(struct drm_encoder *encoder, unsigned int clock) in radeon_audio_update_acr()
H A Ddce6_afmt.c284 struct radeon_crtc *crtc, unsigned int clock) in dce6_hdmi_audio_set_dto()
305 struct radeon_crtc *crtc, unsigned int clock) in dce6_dp_audio_set_dto()
H A Devergreen_hdmi.c245 struct radeon_crtc *crtc, unsigned int clock) in dce4_hdmi_audio_set_dto()
290 struct radeon_crtc *crtc, unsigned int clock) in dce4_dp_audio_set_dto()
H A Ddce3_1_afmt.c125 struct radeon_crtc *crtc, unsigned int clock) in dce3_2_audio_set_dto()
H A Datombios_crtc.c567 u32 clock = mode->clock; in atombios_adjust_pll() local
825 u32 clock, in atombios_crtc_program_pll()
1068 u32 clock = mode->clock; in atombios_crtc_set_pll() local
H A Drv6xx_dpm.c140 u32 clock, struct rv6xx_sclk_stepping *step) in rv6xx_convert_clock_to_stepping()
298 u32 clock, u32 index) in rv6xx_generate_single_step()
550 u32 clock, enum r600_power_level level) in rv6xx_program_engine_spread_spectrum()
599 u32 entry, u32 clock) in rv6xx_program_mclk_stepping_entry()
/dragonfly/lib/libc/gen/
H A Dclock.c45 clock(void) in clock() function
/dragonfly/include/rpcsvc/
H A Dspray.x54 spraytimeval clock; member
/dragonfly/sys/dev/drm/amd/powerplay/smumgr/
H A Dvegam_smumgr.c602 uint32_t clock, SMU_VoltageLevel *voltage, uint32_t *mvdd) in vegam_get_dependency_volt_by_clk()
720 uint32_t clock, SMU_SclkSetting *sclk_setting) in vegam_calculate_sclk_params()
790 static uint8_t vegam_get_sleep_divider_id_from_clock(uint32_t clock, in vegam_get_sleep_divider_id_from_clock()
810 uint32_t clock, struct SMU75_Discrete_GraphicsLevel *level) in vegam_populate_single_graphic_level()
964 uint32_t clock, struct SMU75_Discrete_MemoryLevel *mem_level) in vegam_calculate_mclk_params()
982 uint32_t clock, struct SMU75_Discrete_MemoryLevel *mem_level) in vegam_populate_single_memory_level()
H A Dfiji_smumgr.c366 uint32_t clock, uint32_t *voltage, uint32_t *mvdd) in fiji_get_dependency_volt_by_clk()
868 uint32_t clock, struct SMU73_Discrete_GraphicsLevel *sclk) in fiji_calculate_sclk_params()
949 uint32_t clock, struct SMU73_Discrete_GraphicsLevel *level) in fiji_populate_single_graphic_level()
1157 uint32_t clock, struct SMU73_Discrete_MemoryLevel *mclk) in fiji_calculate_mclk_params()
1176 uint32_t clock, struct SMU73_Discrete_MemoryLevel *mem_level) in fiji_populate_single_memory_level()
H A Dpolaris10_smumgr.c353 uint32_t clock, SMU_VoltageLevel *voltage, uint32_t *mvdd) in polaris10_get_dependency_volt_by_clk()
841 uint32_t clock, SMU_SclkSetting *sclk_setting) in polaris10_calculate_sclk_params()
906 uint32_t clock, struct SMU74_Discrete_GraphicsLevel *level) in polaris10_populate_single_graphic_level()
1071 uint32_t clock, struct SMU74_Discrete_MemoryLevel *mem_level) in polaris10_populate_single_memory_level()
H A Dci_smumgr.c277 uint32_t clock, uint32_t *vol) in ci_get_dependency_volt_by_clk()
296 uint32_t clock, struct SMU7_Discrete_GraphicsLevel *sclk) in ci_calculate_sclk_params()
386 static uint8_t ci_get_sleep_divider_id_from_clock(uint32_t clock, in ci_get_sleep_divider_id_from_clock()
407 uint32_t clock, struct SMU7_Discrete_GraphicsLevel *level) in ci_populate_single_graphic_level()
/dragonfly/sys/dev/disk/sdhci/
H A Dsdhci.c176 uint32_t clock; in sdhci_reset() local
252 sdhci_set_clock(struct sdhci_slot *slot, uint32_t clock) in sdhci_set_clock()
1885 uint32_t clock, max_clock; in sdhci_generic_write_ivar() local
/dragonfly/usr.sbin/cron/lib/
H A Dmisc.c599 arpadate(time_t *clock) in arpadate()
/dragonfly/sys/dev/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_pp_smu.c486 struct pp_display_clock_request clock = {0}; in pp_rv_set_display_requirement() local

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