1 /*
2 Yamaha YMF271-F "OPX" emulator v0.1
3 By R. Belmont.
4 Based in part on YMF278B emulator by R. Belmont and O. Galibert.
5 12June04 update by Toshiaki Nijiura
6 Copyright R. Belmont.
7
8 This software is dual-licensed: it may be used in MAME and properly licensed
9 MAME derivatives under the terms of the MAME license. For use outside of
10 MAME and properly licensed derivatives, it is available under the
11 terms of the GNU Lesser General Public License (LGPL), version 2.1.
12 You may read the LGPL at http://www.gnu.org/licenses/lgpl.html
13
14 TODO:
15 - A/L bit (alternate loop)
16 - EN and EXT Out bits
17 - Src B and Src NOTE bits
18 - statusreg Busy and End bits
19 - timer register 0x11
20 - ch2/ch3 (4 speakers)
21 - PFM (FM using external PCM waveform)
22 - detune (should be same as on other Yamaha chips)
23 - Acc On bit (some sound effects in viprp1?). The documentation says
24 "determines if slot output is accumulated(1), or output directly(0)"
25 - Is memory handling 100% correct? At the moment, seibuspi.c is the only
26 hardware currently emulated that uses external handlers.
27 */
28
29 #include <math.h>
30 #include "mamedef.h"
31 //#include "sndintrf.h"
32 //#include "streams.h"
33 #ifdef _DEBUG
34 #include <stdio.h>
35 #endif
36 #include <stdlib.h>
37 #include <memory.h>
38 #include "ymf271.h"
39
40 #ifndef __cplusplus // C++ already has the bool-type
41 #define false 0x00
42 #define true 0x01
43 typedef unsigned char bool;
44 #endif // !__cplusplus
45
46 #define NULL ((void *)0)
47
48 //#define DEVCB_NULL { DEVCB_TYPE_NULL }
49 #define DEVCB_NULL DEVCB_TYPE_NULL
50 #define DEVCB_TYPE_NULL (0)
51
52 #define VERBOSE (1)
53
54 #define STD_CLOCK (16934400)
55
56 #define MAXOUT (+32767)
57 #define MINOUT (-32768)
58
59 #define SIN_BITS 10
60 #define SIN_LEN (1<<SIN_BITS)
61 #define SIN_MASK (SIN_LEN-1)
62
63 #define LFO_LENGTH 256
64 #define LFO_SHIFT 8
65 #define PLFO_MAX (+1.0)
66 #define PLFO_MIN (-1.0)
67 #define ALFO_MAX (+65536)
68 #define ALFO_MIN (0)
69
70 #define ENV_ATTACK 0
71 #define ENV_DECAY1 1
72 #define ENV_DECAY2 2
73 #define ENV_RELEASE 3
74
75 #define OP_INPUT_FEEDBACK -1
76 #define OP_INPUT_NONE -2
77
78 #define ENV_VOLUME_SHIFT 16
79
80 #define INF -1.0
81
82 static const double ARTime[64] =
83 {
84 INF, INF, INF, INF, 6188.12, 4980.68, 4144.76, 3541.04,
85 3094.06, 2490.34, 2072.38, 1770.52, 1547.03, 1245.17, 1036.19, 885.26,
86 773.51, 622.59, 518.10, 441.63, 386.76, 311.29, 259.05, 221.32,
87 193.38, 155.65, 129.52, 110.66, 96.69, 77.82, 64.76, 55.33,
88 48.34, 38.91, 32.38, 27.66, 24.17, 19.46, 16.19, 13.83,
89 12.09, 9.73, 8.10, 6.92, 6.04, 4.86, 4.05, 3.46,
90 3.02, 2.47, 2.14, 1.88, 1.70, 1.38, 1.16, 1.02,
91 0.88, 0.70, 0.57, 0.48, 0.43, 0.43, 0.43, 0.07
92 };
93
94 static const double DCTime[64] =
95 {
96 INF, INF, INF, INF, 93599.64, 74837.91, 62392.02, 53475.56,
97 46799.82, 37418.96, 31196.01, 26737.78, 23399.91, 18709.48, 15598.00, 13368.89,
98 11699.95, 9354.74, 7799.00, 6684.44, 5849.98, 4677.37, 3899.50, 3342.22,
99 2924.99, 2338.68, 1949.75, 1671.11, 1462.49, 1169.34, 974.88, 835.56,
100 731.25, 584.67, 487.44, 417.78, 365.62, 292.34, 243.72, 208.89,
101 182.81, 146.17, 121.86, 104.44, 91.41, 73.08, 60.93, 52.22,
102 45.69, 36.55, 33.85, 26.09, 22.83, 18.28, 15.22, 13.03,
103 11.41, 9.12, 7.60, 6.51, 5.69, 5.69, 5.69, 5.69
104 };
105
106 /* Notes about the LFO Frequency Table below:
107
108 There are 2 known errors in the LFO table listed in the original manual.
109
110 Both 201 & 202 are listed as 3.74490. 202 has been computed/corrected to 3.91513
111 232 was listed as 13.35547 but has been replaced with the correct value of 14.35547.
112
113 Corrections are computed values based on formulas by Olivier Galibert & Nicola Salmoria listed below:
114
115 LFO period seems easy to compute:
116
117 Olivier Galibert's version Nicola Salmoria's version
118
119 int lfo_period(int entry) or int calc_lfo_period(int entry)
120 { {
121 int ma, ex; entry = 256 - entry;
122 entry = 256-entry;
123 ma = entry & 15; if (entry < 16)
124 {
125 ex = entry >> 4; return (entry & 0x0f) << 7;
126 if(ex) }
127 return (ma | 16) << (ex+6); else
128 else {
129 return ma << 7; int shift = 6 + (entry >> 4);
130 } return (0x10 + (entry & 0x0f)) << shift;
131 }
132 lfo_freq = 44100 / lfo_period }
133
134 */
135
136 static const double LFO_frequency_table[256] =
137 {
138 0.00066, 0.00068, 0.00070, 0.00073, 0.00075, 0.00078, 0.00081, 0.00084,
139 0.00088, 0.00091, 0.00096, 0.00100, 0.00105, 0.00111, 0.00117, 0.00124,
140 0.00131, 0.00136, 0.00140, 0.00145, 0.00150, 0.00156, 0.00162, 0.00168,
141 0.00175, 0.00183, 0.00191, 0.00200, 0.00210, 0.00221, 0.00234, 0.00247,
142 0.00263, 0.00271, 0.00280, 0.00290, 0.00300, 0.00312, 0.00324, 0.00336,
143 0.00350, 0.00366, 0.00382, 0.00401, 0.00421, 0.00443, 0.00467, 0.00495,
144 0.00526, 0.00543, 0.00561, 0.00580, 0.00601, 0.00623, 0.00647, 0.00673,
145 0.00701, 0.00731, 0.00765, 0.00801, 0.00841, 0.00885, 0.00935, 0.00990,
146 0.01051, 0.01085, 0.01122, 0.01160, 0.01202, 0.01246, 0.01294, 0.01346,
147 0.01402, 0.01463, 0.01529, 0.01602, 0.01682, 0.01771, 0.01869, 0.01979,
148 0.02103, 0.02171, 0.02243, 0.02320, 0.02403, 0.02492, 0.02588, 0.02692,
149 0.02804, 0.02926, 0.03059, 0.03204, 0.03365, 0.03542, 0.03738, 0.03958,
150 0.04206, 0.04341, 0.04486, 0.04641, 0.04807, 0.04985, 0.05176, 0.05383,
151 0.05608, 0.05851, 0.06117, 0.06409, 0.06729, 0.07083, 0.07477, 0.07917,
152 0.08411, 0.08683, 0.08972, 0.09282, 0.09613, 0.09969, 0.10353, 0.10767,
153 0.11215, 0.11703, 0.12235, 0.12817, 0.13458, 0.14167, 0.14954, 0.15833,
154 0.16823, 0.17365, 0.17944, 0.18563, 0.19226, 0.19938, 0.20705, 0.21533,
155 0.22430, 0.23406, 0.24470, 0.25635, 0.26917, 0.28333, 0.29907, 0.31666,
156 0.33646, 0.34731, 0.35889, 0.37126, 0.38452, 0.39876, 0.41410, 0.43066,
157 0.44861, 0.46811, 0.48939, 0.51270, 0.53833, 0.56666, 0.59814, 0.63333,
158 0.67291, 0.69462, 0.71777, 0.74252, 0.76904, 0.79753, 0.82820, 0.86133,
159 0.89722, 0.93623, 0.97878, 1.02539, 1.07666, 1.13333, 1.19629, 1.26666,
160 1.34583, 1.38924, 1.43555, 1.48505, 1.53809, 1.59509, 1.65640, 1.72266,
161 1.79443, 1.87245, 1.95756, 2.05078, 2.15332, 2.26665, 2.39258, 2.53332,
162 2.69165, 2.77848, 2.87109, 2.97010, 3.07617, 3.19010, 3.31280, 3.44531,
163 3.58887, 3.74490, 3.91513, 4.10156, 4.30664, 4.53331, 4.78516, 5.06664,
164 5.38330, 5.55696, 5.74219, 5.94019, 6.15234, 6.38021, 6.62560, 6.89062,
165 7.17773, 7.48981, 7.83026, 8.20312, 8.61328, 9.06661, 9.57031, 10.13327,
166 10.76660, 11.11391, 11.48438, 11.88039, 12.30469, 12.76042, 13.25120, 13.78125,
167 14.35547, 14.97962, 15.66051, 16.40625, 17.22656, 18.13322, 19.14062, 20.26654,
168 21.53320, 22.96875, 24.60938, 26.50240, 28.71094, 31.32102, 34.45312, 38.28125,
169 43.06641, 49.21875, 57.42188, 68.90625, 86.13281, 114.84375, 172.26562, 344.53125
170 };
171
172 static const int RKS_Table[32][8] =
173 {
174 { 0, 0, 0, 0, 0, 2, 4, 8 },
175 { 0, 0, 0, 0, 1, 3, 5, 9 },
176 { 0, 0, 0, 1, 2, 4, 6, 10 },
177 { 0, 0, 0, 1, 3, 5, 7, 11 },
178 { 0, 0, 1, 2, 4, 6, 8, 12 },
179 { 0, 0, 1, 2, 5, 7, 9, 13 },
180 { 0, 0, 1, 3, 6, 8, 10, 14 },
181 { 0, 0, 1, 3, 7, 9, 11, 15 },
182 { 0, 1, 2, 4, 8, 10, 12, 16 },
183 { 0, 1, 2, 4, 9, 11, 13, 17 },
184 { 0, 1, 2, 5, 10, 12, 14, 18 },
185 { 0, 1, 2, 5, 11, 13, 15, 19 },
186 { 0, 1, 3, 6, 12, 14, 16, 20 },
187 { 0, 1, 3, 6, 13, 15, 17, 21 },
188 { 0, 1, 3, 7, 14, 16, 18, 22 },
189 { 0, 1, 3, 7, 15, 17, 19, 23 },
190 { 0, 2, 4, 8, 16, 18, 20, 24 },
191 { 0, 2, 4, 8, 17, 19, 21, 25 },
192 { 0, 2, 4, 9, 18, 20, 22, 26 },
193 { 0, 2, 4, 9, 19, 21, 23, 27 },
194 { 0, 2, 5, 10, 20, 22, 24, 28 },
195 { 0, 2, 5, 10, 21, 23, 25, 29 },
196 { 0, 2, 5, 11, 22, 24, 26, 30 },
197 { 0, 2, 5, 11, 23, 25, 27, 31 },
198 { 0, 3, 6, 12, 24, 26, 28, 31 },
199 { 0, 3, 6, 12, 25, 27, 29, 31 },
200 { 0, 3, 6, 13, 26, 28, 30, 31 },
201 { 0, 3, 6, 13, 27, 29, 31, 31 },
202 { 0, 3, 7, 14, 28, 30, 31, 31 },
203 { 0, 3, 7, 14, 29, 31, 31, 31 },
204 { 0, 3, 7, 15, 30, 31, 31, 31 },
205 { 0, 3, 7, 15, 31, 31, 31, 31 },
206 };
207
208 static const double multiple_table[16] = { 0.5, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 };
209
210 static const double pow_table[16] = { 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 0.5, 1, 2, 4, 8, 16, 32, 64 };
211
212 static const double fs_frequency[4] = { 1.0/1.0, 1.0/2.0, 1.0/4.0, 1.0/8.0 };
213
214 static const double channel_attenuation_table[16] =
215 {
216 0.0, 2.5, 6.0, 8.5, 12.0, 14.5, 18.1, 20.6, 24.1, 26.6, 30.1, 32.6, 36.1, 96.1, 96.1, 96.1
217 };
218
219 static const int modulation_level[8] = { 16, 8, 4, 2, 1, 32, 64, 128 };
220
221 // feedback_level * 16
222 static const int feedback_level[8] = { 0, 1, 2, 4, 8, 16, 32, 64 };
223
224 // slot mapping assists
225 static const int fm_tab[16] = { 0, 1, 2, -1, 3, 4, 5, -1, 6, 7, 8, -1, 9, 10, 11, -1 };
226 static const int pcm_tab[16] = { 0, 4, 8, -1, 12, 16, 20, -1, 24, 28, 32, -1, 36, 40, 44, -1 };
227
228
229 typedef struct
230 {
231 UINT8 ext_en;
232 UINT8 ext_out;
233 UINT8 lfoFreq;
234 UINT8 lfowave;
235 UINT8 pms, ams;
236 UINT8 detune;
237 UINT8 multiple;
238 UINT8 tl;
239 UINT8 keyscale;
240 UINT8 ar;
241 UINT8 decay1rate, decay2rate;
242 UINT8 decay1lvl;
243 UINT8 relrate;
244 UINT8 block;
245 UINT8 fns_hi;
246 UINT32 fns;
247 UINT8 feedback;
248 UINT8 waveform;
249 UINT8 accon;
250 UINT8 algorithm;
251 UINT8 ch0_level, ch1_level, ch2_level, ch3_level;
252
253 UINT32 startaddr;
254 UINT32 loopaddr;
255 UINT32 endaddr;
256 UINT8 altloop;
257 UINT8 fs;
258 UINT8 srcnote, srcb;
259
260 UINT32 step;
261 UINT64 stepptr;
262
263 UINT8 active;
264 UINT8 bits;
265
266 // envelope generator
267 INT32 volume;
268 INT32 env_state;
269 INT32 env_attack_step; // volume increase step in attack state
270 INT32 env_decay1_step;
271 INT32 env_decay2_step;
272 INT32 env_release_step;
273
274 INT64 feedback_modulation0;
275 INT64 feedback_modulation1;
276
277 INT32 lfo_phase, lfo_step;
278 INT32 lfo_amplitude;
279 double lfo_phasemod;
280 } YMF271Slot;
281
282 typedef struct
283 {
284 UINT8 sync, pfm;
285 UINT8 Muted;
286 } YMF271Group;
287
288 typedef struct
289 {
290 // lookup tables
291 INT16 *lut_waves[8];
292 double *lut_plfo[4][8];
293 int *lut_alfo[4];
294 double lut_ar[64];
295 double lut_dc[64];
296 double lut_lfo[256];
297 int lut_attenuation[16];
298 int lut_total_level[128];
299 int lut_env_volume[256];
300
301 YMF271Slot slots[48];
302 YMF271Group groups[12];
303
304 UINT8 regs_main[0x10];
305
306 UINT32 timerA, timerB;
307 UINT32 timerAVal, timerBVal;
308 UINT32 irqstate;
309 UINT8 status;
310 UINT8 enable;
311
312 UINT32 ext_address;
313 UINT8 ext_rw;
314 UINT8 ext_readlatch;
315
316 UINT8 *mem_base;
317 UINT32 mem_size;
318 UINT32 clock;
319
320 //emu_timer *timA, *timB;
321 //sound_stream * stream;
322 INT32 *mix_buffer;
323 //const device_config *device;
324
325 //devcb_resolved_read8 ext_mem_read;
326 //devcb_resolved_write8 ext_mem_write;
327 //void (*irq_callback)(const device_config *, int);
328 //void (*irq_callback)(int);
329 } YMF271Chip;
330
331
332 /*INLINE YMF271Chip *get_safe_token(const device_config *device)
333 {
334 assert(device != NULL);
335 assert(device->token != NULL);
336 assert(device->type == SOUND);
337 assert(sound_get_type(device) == SOUND_YMF271);
338 return (YMF271Chip *)device->token;
339 }*/
340
341 static UINT8 ymf271_read_memory(YMF271Chip *chip, UINT32 offset);
342
343
calculate_step(YMF271Slot * slot)344 INLINE void calculate_step(YMF271Slot *slot)
345 {
346 double st;
347
348 if (slot->waveform == 7)
349 {
350 // external waveform (PCM)
351 st = (double)(2 * (slot->fns | 2048)) * pow_table[slot->block] * fs_frequency[slot->fs];
352 st = st * multiple_table[slot->multiple];
353
354 // LFO phase modulation
355 st *= slot->lfo_phasemod;
356
357 st /= (double)(524288/65536); // pre-multiply with 65536
358
359 slot->step = (UINT32)st;
360 }
361 else
362 {
363 // internal waveform (FM)
364 st = (double)(2 * slot->fns) * pow_table[slot->block];
365 st = st * multiple_table[slot->multiple] * (double)(SIN_LEN);
366
367 // LFO phase modulation
368 st *= slot->lfo_phasemod;
369
370 st /= (double)(536870912/65536); // pre-multiply with 65536
371
372 slot->step = (UINT32)st;
373 }
374 }
375
check_envelope_end(YMF271Slot * slot)376 INLINE bool check_envelope_end(YMF271Slot *slot)
377 {
378 if (slot->volume <= 0)
379 {
380 slot->active = 0;
381 slot->volume = 0;
382 return true;
383 }
384 return false;
385 }
386
update_envelope(YMF271Slot * slot)387 static void update_envelope(YMF271Slot *slot)
388 {
389 switch (slot->env_state)
390 {
391 case ENV_ATTACK:
392 {
393 slot->volume += slot->env_attack_step;
394
395 if (slot->volume >= (255 << ENV_VOLUME_SHIFT))
396 {
397 slot->volume = (255 << ENV_VOLUME_SHIFT);
398 slot->env_state = ENV_DECAY1;
399 }
400 break;
401 }
402
403 case ENV_DECAY1:
404 {
405 int decay_level = 255 - (slot->decay1lvl << 4);
406 slot->volume -= slot->env_decay1_step;
407
408 if (!check_envelope_end(slot) && (slot->volume >> ENV_VOLUME_SHIFT) <= decay_level)
409 {
410 slot->env_state = ENV_DECAY2;
411 }
412 break;
413 }
414
415 case ENV_DECAY2:
416 {
417 slot->volume -= slot->env_decay2_step;
418 check_envelope_end(slot);
419 break;
420 }
421
422 case ENV_RELEASE:
423 {
424 slot->volume -= slot->env_release_step;
425 check_envelope_end(slot);
426 break;
427 }
428 }
429 }
430
get_keyscaled_rate(int rate,int keycode,int keyscale)431 INLINE int get_keyscaled_rate(int rate, int keycode, int keyscale)
432 {
433 int newrate = rate + RKS_Table[keycode][keyscale];
434
435 if (newrate > 63)
436 {
437 newrate = 63;
438 }
439 if (newrate < 0)
440 {
441 newrate = 0;
442 }
443 return newrate;
444 }
445
get_internal_keycode(int block,int fns)446 INLINE int get_internal_keycode(int block, int fns)
447 {
448 int n43;
449 if (fns < 0x780)
450 {
451 n43 = 0;
452 }
453 else if (fns < 0x900)
454 {
455 n43 = 1;
456 }
457 else if (fns < 0xa80)
458 {
459 n43 = 2;
460 }
461 else
462 {
463 n43 = 3;
464 }
465
466 return ((block & 7) * 4) + n43;
467 }
468
get_external_keycode(int block,int fns)469 INLINE int get_external_keycode(int block, int fns)
470 {
471 int n43;
472 if (fns < 0x100)
473 {
474 n43 = 0;
475 }
476 else if (fns < 0x300)
477 {
478 n43 = 1;
479 }
480 else if (fns < 0x500)
481 {
482 n43 = 2;
483 }
484 else
485 {
486 n43 = 3;
487 }
488
489 return ((block & 7) * 4) + n43;
490 }
491
init_envelope(YMF271Chip * chip,YMF271Slot * slot)492 static void init_envelope(YMF271Chip *chip, YMF271Slot *slot)
493 {
494 int keycode, rate;
495 int decay_level = 255 - (slot->decay1lvl << 4);
496
497 if (slot->waveform != 7)
498 {
499 keycode = get_internal_keycode(slot->block, slot->fns);
500 }
501 else
502 {
503 keycode = get_external_keycode(slot->block, slot->fns & 0x7ff);
504 /* keycode = (keycode + slot->srcb * 4 + slot->srcnote) / 2; */ // not sure
505 }
506
507 // init attack state
508 rate = get_keyscaled_rate(slot->ar * 2, keycode, slot->keyscale);
509 slot->env_attack_step = (rate < 4) ? 0 : (int)(((double)(255-0) / chip->lut_ar[rate]) * 65536.0);
510
511 // init decay1 state
512 rate = get_keyscaled_rate(slot->decay1rate * 2, keycode, slot->keyscale);
513 slot->env_decay1_step = (rate < 4) ? 0 : (int)(((double)(255-decay_level) / chip->lut_dc[rate]) * 65536.0);
514
515 // init decay2 state
516 rate = get_keyscaled_rate(slot->decay2rate * 2, keycode, slot->keyscale);
517 slot->env_decay2_step = (rate < 4) ? 0 : (int)(((double)(255-0) / chip->lut_dc[rate]) * 65536.0);
518
519 // init release state
520 rate = get_keyscaled_rate(slot->relrate * 4, keycode, slot->keyscale);
521 slot->env_release_step = (rate < 4) ? 0 : (int)(((double)(255-0) / chip->lut_ar[rate]) * 65536.0);
522
523 slot->volume = (255-160) << ENV_VOLUME_SHIFT; // -60db
524 slot->env_state = ENV_ATTACK;
525 }
526
init_lfo(YMF271Chip * chip,YMF271Slot * slot)527 static void init_lfo(YMF271Chip *chip, YMF271Slot *slot)
528 {
529 slot->lfo_phase = 0;
530 slot->lfo_amplitude = 0;
531 slot->lfo_phasemod = 0;
532
533 slot->lfo_step = (int)((((double)LFO_LENGTH * chip->lut_lfo[slot->lfoFreq]) / 44100.0) * 256.0);
534 }
535
update_lfo(YMF271Chip * chip,YMF271Slot * slot)536 INLINE void update_lfo(YMF271Chip *chip, YMF271Slot *slot)
537 {
538 slot->lfo_phase += slot->lfo_step;
539
540 slot->lfo_amplitude = chip->lut_alfo[slot->lfowave][(slot->lfo_phase >> LFO_SHIFT) & (LFO_LENGTH-1)];
541 slot->lfo_phasemod = chip->lut_plfo[slot->lfowave][slot->pms][(slot->lfo_phase >> LFO_SHIFT) & (LFO_LENGTH-1)];
542
543 calculate_step(slot);
544 }
545
calculate_slot_volume(YMF271Chip * chip,YMF271Slot * slot)546 INLINE int calculate_slot_volume(YMF271Chip *chip, YMF271Slot *slot)
547 {
548 // Note: Actually everyone of these stores only INT32 (16.16 fixed point),
549 // but the calculations need INT64.
550 INT32 volume;
551 INT64 env_volume;
552 INT64 lfo_volume = 65536;
553
554 switch (slot->ams)
555 {
556 case 0: lfo_volume = 65536; break; // 0dB
557 case 1: lfo_volume = 65536 - ((slot->lfo_amplitude * 33124) >> 16); break; // 5.90625dB
558 case 2: lfo_volume = 65536 - ((slot->lfo_amplitude * 16742) >> 16); break; // 11.8125dB
559 case 3: lfo_volume = 65536 - ((slot->lfo_amplitude * 4277) >> 16); break; // 23.625dB
560 }
561
562 env_volume = (chip->lut_env_volume[255 - (slot->volume >> ENV_VOLUME_SHIFT)] * lfo_volume) >> 16;
563
564 volume = (env_volume * chip->lut_total_level[slot->tl]) >> 16;
565
566 return volume;
567 }
568
update_pcm(YMF271Chip * chip,int slotnum,INT32 * mixp,int length)569 static void update_pcm(YMF271Chip *chip, int slotnum, INT32 *mixp, int length)
570 {
571 int i;
572 INT64 final_volume;
573 INT16 sample;
574 INT64 ch0_vol, ch1_vol; //, ch2_vol, ch3_vol;
575
576 YMF271Slot *slot = &chip->slots[slotnum];
577
578 if (!slot->active)
579 {
580 return;
581 }
582
583 #ifdef _DEBUG
584 if (slot->waveform != 7)
585 {
586 logerror("Waveform %d in update_pcm !!!\n", slot->waveform);
587 }
588 #endif
589
590 for (i = 0; i < length; i++)
591 {
592 // loop
593 if ((slot->stepptr>>16) > slot->endaddr)
594 {
595 slot->stepptr = slot->stepptr - ((UINT64)slot->endaddr<<16) + ((UINT64)slot->loopaddr<<16);
596 if ((slot->stepptr>>16) > slot->endaddr)
597 {
598 // overflow
599 slot->stepptr &= 0xffff;
600 slot->stepptr |= ((UINT64)slot->loopaddr<<16);
601 if ((slot->stepptr>>16) > slot->endaddr)
602 {
603 // still overflow? (triggers in rdft2, rarely)
604 slot->stepptr &= 0xffff;
605 slot->stepptr |= ((UINT64)slot->endaddr<<16);
606 }
607 }
608 }
609
610 if (slot->bits == 8)
611 {
612 // 8bit
613 sample = ymf271_read_memory(chip, slot->startaddr + (slot->stepptr>>16))<<8;
614 }
615 else
616 {
617 // 12bit
618 if (slot->stepptr & 0x10000)
619 sample = ymf271_read_memory(chip, slot->startaddr + (slot->stepptr>>17)*3 + 2)<<8 | ((ymf271_read_memory(chip, slot->startaddr + (slot->stepptr>>17)*3 + 1) << 4) & 0xf0);
620 else
621 sample = ymf271_read_memory(chip, slot->startaddr + (slot->stepptr>>17)*3)<<8 | (ymf271_read_memory(chip, slot->startaddr + (slot->stepptr>>17)*3 + 1) & 0xf0);
622 }
623
624 update_envelope(slot);
625 update_lfo(chip, slot);
626
627 final_volume = calculate_slot_volume(chip, slot);
628
629 ch0_vol = (final_volume * chip->lut_attenuation[slot->ch0_level]) >> 16;
630 ch1_vol = (final_volume * chip->lut_attenuation[slot->ch1_level]) >> 16;
631 // ch2_vol = (final_volume * chip->lut_attenuation[slot->ch2_level]) >> 16;
632 // ch3_vol = (final_volume * chip->lut_attenuation[slot->ch3_level]) >> 16;
633
634 if (ch0_vol > 65536) ch0_vol = 65536;
635 if (ch1_vol > 65536) ch1_vol = 65536;
636
637 *mixp++ += (sample * ch0_vol) >> 16;
638 *mixp++ += (sample * ch1_vol) >> 16;
639
640 // go to next step
641 slot->stepptr += slot->step;
642 }
643 }
644
645 // calculates the output of one FM operator
calculate_op(YMF271Chip * chip,int slotnum,INT64 inp)646 static INT64 calculate_op(YMF271Chip *chip, int slotnum, INT64 inp)
647 {
648 YMF271Slot *slot = &chip->slots[slotnum];
649 INT64 env, slot_output, slot_input = 0;
650
651 update_envelope(slot);
652 update_lfo(chip, slot);
653 env = calculate_slot_volume(chip, slot);
654
655 if (inp == OP_INPUT_FEEDBACK)
656 {
657 // from own feedback
658 slot_input = (slot->feedback_modulation0 + slot->feedback_modulation1) / 2;
659 slot->feedback_modulation0 = slot->feedback_modulation1;
660 }
661 else if (inp != OP_INPUT_NONE)
662 {
663 // from previous slot output
664 slot_input = ((inp << (SIN_BITS-2)) * modulation_level[slot->feedback]);
665 }
666
667 slot_output = chip->lut_waves[slot->waveform][((slot->stepptr + slot_input) >> 16) & SIN_MASK];
668 slot_output = (slot_output * env) >> 16;
669 slot->stepptr += slot->step;
670
671 return slot_output;
672 }
673
set_feedback(YMF271Chip * chip,int slotnum,INT64 inp)674 static void set_feedback(YMF271Chip *chip, int slotnum, INT64 inp)
675 {
676 YMF271Slot *slot = &chip->slots[slotnum];
677 slot->feedback_modulation1 = (((inp << (SIN_BITS-2)) * feedback_level[slot->feedback]) / 16);
678 }
679
680 //static STREAM_UPDATE( ymf271_update )
ymf271_update(void * param,stream_sample_t ** outputs,int samples)681 void ymf271_update(void *param, stream_sample_t **outputs, int samples)
682 {
683 int i, j;
684 int op;
685 INT32 *mixp;
686 YMF271Chip *chip = (YMF271Chip *)param;
687
688 memset(chip->mix_buffer, 0, sizeof(chip->mix_buffer[0])*samples*2);
689
690 for (j = 0; j < 12; j++)
691 {
692 YMF271Group *slot_group = &chip->groups[j];
693 mixp = &chip->mix_buffer[0];
694
695 if (slot_group->Muted)
696 continue;
697
698 #ifdef _DEBUG
699 if (slot_group->pfm && slot_group->sync != 3)
700 {
701 logerror("ymf271 Group %d: PFM, Sync = %d, Waveform Slot1 = %d, Slot2 = %d, Slot3 = %d, Slot4 = %d\n",
702 j, slot_group->sync, chip->slots[j+0].waveform, chip->slots[j+12].waveform, chip->slots[j+24].waveform, chip->slots[j+36].waveform);
703 }
704 #endif
705
706 switch (slot_group->sync)
707 {
708 // 4 operator FM
709 case 0:
710 {
711 int slot1 = j + (0*12);
712 int slot2 = j + (1*12);
713 int slot3 = j + (2*12);
714 int slot4 = j + (3*12);
715 //mixp = chip->mix_buffer;
716
717 if (chip->slots[slot1].active)
718 {
719 for (i = 0; i < samples; i++)
720 {
721 INT64 output1 = 0, output2 = 0, output3 = 0, output4 = 0;
722 INT64 phase_mod1 = 0, phase_mod2 = 0, phase_mod3 = 0;
723 switch (chip->slots[slot1].algorithm)
724 {
725 // <--------|
726 // +--[S1]--|--+--[S3]--+--[S2]--+--[S4]-->
727 case 0:
728 phase_mod1 = calculate_op(chip, slot1, OP_INPUT_FEEDBACK);
729 set_feedback(chip, slot1, phase_mod1);
730 phase_mod3 = calculate_op(chip, slot3, phase_mod1);
731 phase_mod2 = calculate_op(chip, slot2, phase_mod3);
732 output4 = calculate_op(chip, slot4, phase_mod2);
733 break;
734
735 // <-----------------|
736 // +--[S1]--+--[S3]--|--+--[S2]--+--[S4]-->
737 case 1:
738 phase_mod1 = calculate_op(chip, slot1, OP_INPUT_FEEDBACK);
739 phase_mod3 = calculate_op(chip, slot3, phase_mod1);
740 set_feedback(chip, slot1, phase_mod3);
741 phase_mod2 = calculate_op(chip, slot2, phase_mod3);
742 output4 = calculate_op(chip, slot4, phase_mod2);
743 break;
744
745 // <--------|
746 // +--[S1]--|
747 // |
748 // --[S3]--+--[S2]--+--[S4]-->
749 case 2:
750 phase_mod1 = calculate_op(chip, slot1, OP_INPUT_FEEDBACK);
751 set_feedback(chip, slot1, phase_mod1);
752 phase_mod3 = calculate_op(chip, slot3, OP_INPUT_NONE);
753 phase_mod2 = calculate_op(chip, slot2, (phase_mod1 + phase_mod3) / 1);
754 output4 = calculate_op(chip, slot4, phase_mod2);
755 break;
756
757 // <--------|
758 // +--[S1]--|
759 // |
760 // --[S3]--+--[S2]--+--[S4]-->
761 case 3:
762 phase_mod1 = calculate_op(chip, slot1, OP_INPUT_FEEDBACK);
763 set_feedback(chip, slot1, phase_mod1);
764 phase_mod3 = calculate_op(chip, slot3, OP_INPUT_NONE);
765 phase_mod2 = calculate_op(chip, slot2, phase_mod3);
766 output4 = calculate_op(chip, slot4, (phase_mod1 + phase_mod2) / 1);
767 break;
768
769 // --[S2]--|
770 // <--------| |
771 // +--[S1]--|--+--[S3]--+--[S4]-->
772 case 4:
773 phase_mod1 = calculate_op(chip, slot1, OP_INPUT_FEEDBACK);
774 set_feedback(chip, slot1, phase_mod1);
775 phase_mod3 = calculate_op(chip, slot3, phase_mod1);
776 phase_mod2 = calculate_op(chip, slot2, OP_INPUT_NONE);
777 output4 = calculate_op(chip, slot4, (phase_mod3 + phase_mod2) / 1);
778 break;
779
780 // --[S2]-----|
781 // <-----------------| |
782 // +--[S1]--+--[S3]--|--+--[S4]-->
783 case 5:
784 phase_mod1 = calculate_op(chip, slot1, OP_INPUT_FEEDBACK);
785 phase_mod3 = calculate_op(chip, slot3, phase_mod1);
786 set_feedback(chip, slot1, phase_mod3);
787 phase_mod2 = calculate_op(chip, slot2, OP_INPUT_NONE);
788 output4 = calculate_op(chip, slot4, (phase_mod3 + phase_mod2) / 1);
789 break;
790
791 // --[S2]-----+--[S4]--|
792 // |
793 // <--------| |
794 // +--[S1]--|--+--[S3]--+-->
795 case 6:
796 phase_mod1 = calculate_op(chip, slot1, OP_INPUT_FEEDBACK);
797 set_feedback(chip, slot1, phase_mod1);
798 output3 = calculate_op(chip, slot3, phase_mod1);
799 phase_mod2 = calculate_op(chip, slot2, OP_INPUT_NONE);
800 output4 = calculate_op(chip, slot4, phase_mod2);
801 break;
802
803 // --[S2]--+--[S4]-----|
804 // |
805 // <-----------------| |
806 // +--[S1]--+--[S3]--|--+-->
807 case 7:
808 phase_mod1 = calculate_op(chip, slot1, OP_INPUT_FEEDBACK);
809 phase_mod3 = calculate_op(chip, slot3, phase_mod1);
810 set_feedback(chip, slot1, phase_mod3);
811 output3 = phase_mod3;
812 phase_mod2 = calculate_op(chip, slot2, OP_INPUT_NONE);
813 output4 = calculate_op(chip, slot4, phase_mod2);
814 break;
815
816 // --[S3]--+--[S2]--+--[S4]--|
817 // |
818 // <--------| |
819 // +--[S1]--|-----------------+-->
820 case 8:
821 phase_mod1 = calculate_op(chip, slot1, OP_INPUT_FEEDBACK);
822 set_feedback(chip, slot1, phase_mod1);
823 output1 = phase_mod1;
824 phase_mod3 = calculate_op(chip, slot3, OP_INPUT_NONE);
825 phase_mod2 = calculate_op(chip, slot2, phase_mod3);
826 output4 = calculate_op(chip, slot4, phase_mod2);
827 break;
828
829 // <--------|
830 // +--[S1]--|
831 // |
832 // --[S3]--| |
833 // --[S2]--+--[S4]--+-->
834 case 9:
835 phase_mod1 = calculate_op(chip, slot1, OP_INPUT_FEEDBACK);
836 set_feedback(chip, slot1, phase_mod1);
837 output1 = phase_mod1;
838 phase_mod3 = calculate_op(chip, slot3, OP_INPUT_NONE);
839 phase_mod2 = calculate_op(chip, slot2, OP_INPUT_NONE);
840 output4 = calculate_op(chip, slot4, (phase_mod3 + phase_mod2) / 1);
841 break;
842
843 // --[S4]--|
844 // --[S2]--|
845 // <--------| |
846 // +--[S1]--|--+--[S3]--+-->
847 case 10:
848 phase_mod1 = calculate_op(chip, slot1, OP_INPUT_FEEDBACK);
849 set_feedback(chip, slot1, phase_mod1);
850 output3 = calculate_op(chip, slot3, phase_mod1);
851 output2 = calculate_op(chip, slot2, OP_INPUT_NONE);
852 output4 = calculate_op(chip, slot4, OP_INPUT_NONE);
853 break;
854
855 // --[S4]-----|
856 // --[S2]-----|
857 // <-----------------| |
858 // +--[S1]--+--[S3]--|--+-->
859 case 11:
860 phase_mod1 = calculate_op(chip, slot1, OP_INPUT_FEEDBACK);
861 phase_mod3 = calculate_op(chip, slot3, phase_mod1);
862 set_feedback(chip, slot1, phase_mod3);
863 output3 = phase_mod3;
864 output2 = calculate_op(chip, slot2, OP_INPUT_NONE);
865 output4 = calculate_op(chip, slot4, OP_INPUT_NONE);
866 break;
867
868 // |--+--[S4]--|
869 // <--------| |--+--[S3]--|
870 // +--[S1]--|--|--+--[S2]--+-->
871 case 12:
872 phase_mod1 = calculate_op(chip, slot1, OP_INPUT_FEEDBACK);
873 set_feedback(chip, slot1, phase_mod1);
874 output3 = calculate_op(chip, slot3, phase_mod1);
875 output2 = calculate_op(chip, slot2, phase_mod1);
876 output4 = calculate_op(chip, slot4, phase_mod1);
877 break;
878
879 // --[S3]--+--[S2]--|
880 // |
881 // --[S4]-----------|
882 // <--------| |
883 // +--[S1]--|--------+-->
884 case 13:
885 phase_mod1 = calculate_op(chip, slot1, OP_INPUT_FEEDBACK);
886 set_feedback(chip, slot1, phase_mod1);
887 output1 = phase_mod1;
888 phase_mod3 = calculate_op(chip, slot3, OP_INPUT_NONE);
889 output2 = calculate_op(chip, slot2, phase_mod3);
890 output4 = calculate_op(chip, slot4, OP_INPUT_NONE);
891 break;
892
893 // --[S2]-----+--[S4]--|
894 // |
895 // <--------| +--[S3]--|
896 // +--[S1]--|--|--------+-->
897 case 14:
898 phase_mod1 = calculate_op(chip, slot1, OP_INPUT_FEEDBACK);
899 set_feedback(chip, slot1, phase_mod1);
900 output1 = phase_mod1;
901 output3 = calculate_op(chip, slot3, phase_mod1);
902 phase_mod2 = calculate_op(chip, slot2, OP_INPUT_NONE);
903 output4 = calculate_op(chip, slot4, phase_mod2);
904 break;
905
906 // --[S4]-----|
907 // --[S2]-----|
908 // --[S3]-----|
909 // <--------| |
910 // +--[S1]--|--+-->
911 case 15:
912 phase_mod1 = calculate_op(chip, slot1, OP_INPUT_FEEDBACK);
913 set_feedback(chip, slot1, phase_mod1);
914 output1 = phase_mod1;
915 output3 = calculate_op(chip, slot3, OP_INPUT_NONE);
916 output2 = calculate_op(chip, slot2, OP_INPUT_NONE);
917 output4 = calculate_op(chip, slot4, OP_INPUT_NONE);
918 break;
919 }
920
921 *mixp++ += ((output1 * chip->lut_attenuation[chip->slots[slot1].ch0_level]) +
922 (output2 * chip->lut_attenuation[chip->slots[slot2].ch0_level]) +
923 (output3 * chip->lut_attenuation[chip->slots[slot3].ch0_level]) +
924 (output4 * chip->lut_attenuation[chip->slots[slot4].ch0_level])) >> 16;
925 *mixp++ += ((output1 * chip->lut_attenuation[chip->slots[slot1].ch1_level]) +
926 (output2 * chip->lut_attenuation[chip->slots[slot2].ch1_level]) +
927 (output3 * chip->lut_attenuation[chip->slots[slot3].ch1_level]) +
928 (output4 * chip->lut_attenuation[chip->slots[slot4].ch1_level])) >> 16;
929 }
930 }
931 break;
932 }
933
934 // 2x 2 operator FM
935 case 1:
936 {
937 for (op = 0; op < 2; op++)
938 {
939 int slot1 = j + ((op + 0) * 12);
940 int slot3 = j + ((op + 2) * 12);
941
942 mixp = chip->mix_buffer;
943 if (chip->slots[slot1].active)
944 {
945 for (i = 0; i < samples; i++)
946 {
947 INT64 output1 = 0, output3 = 0;
948 INT64 phase_mod1, phase_mod3 = 0;
949 switch (chip->slots[slot1].algorithm & 3)
950 {
951 // <--------|
952 // +--[S1]--|--+--[S3]-->
953 case 0:
954 phase_mod1 = calculate_op(chip, slot1, OP_INPUT_FEEDBACK);
955 set_feedback(chip, slot1, phase_mod1);
956 output3 = calculate_op(chip, slot3, phase_mod1);
957 break;
958
959 // <-----------------|
960 // +--[S1]--+--[S3]--|-->
961 case 1:
962 phase_mod1 = calculate_op(chip, slot1, OP_INPUT_FEEDBACK);
963 phase_mod3 = calculate_op(chip, slot3, phase_mod1);
964 set_feedback(chip, slot1, phase_mod3);
965 output3 = phase_mod3;
966 break;
967
968 // --[S3]-----|
969 // <--------| |
970 // +--[S1]--|--+-->
971 case 2:
972 phase_mod1 = calculate_op(chip, slot1, OP_INPUT_FEEDBACK);
973 set_feedback(chip, slot1, phase_mod1);
974 output1 = phase_mod1;
975 output3 = calculate_op(chip, slot3, OP_INPUT_NONE);
976 break;
977 //
978 // <--------| +--[S3]--|
979 // +--[S1]--|--|--------+-->
980 case 3:
981 phase_mod1 = calculate_op(chip, slot1, OP_INPUT_FEEDBACK);
982 set_feedback(chip, slot1, phase_mod1);
983 output1 = phase_mod1;
984 output3 = calculate_op(chip, slot3, phase_mod1);
985 break;
986 }
987
988 *mixp++ += ((output1 * chip->lut_attenuation[chip->slots[slot1].ch0_level]) +
989 (output3 * chip->lut_attenuation[chip->slots[slot3].ch0_level])) >> 16;
990 *mixp++ += ((output1 * chip->lut_attenuation[chip->slots[slot1].ch1_level]) +
991 (output3 * chip->lut_attenuation[chip->slots[slot3].ch1_level])) >> 16;
992 }
993 }
994 }
995 break;
996 }
997
998 // 3 operator FM + PCM
999 case 2:
1000 {
1001 int slot1 = j + (0*12);
1002 int slot2 = j + (1*12);
1003 int slot3 = j + (2*12);
1004 //mixp = chip->mix_buffer;
1005
1006 if (chip->slots[slot1].active)
1007 {
1008 for (i = 0; i < samples; i++)
1009 {
1010 INT64 output1 = 0, output2 = 0, output3 = 0;
1011 INT64 phase_mod1 = 0, phase_mod3 = 0;
1012 switch (chip->slots[slot1].algorithm & 7)
1013 {
1014 // <--------|
1015 // +--[S1]--|--+--[S3]--+--[S2]-->
1016 case 0:
1017 phase_mod1 = calculate_op(chip, slot1, OP_INPUT_FEEDBACK);
1018 set_feedback(chip, slot1, phase_mod1);
1019 phase_mod3 = calculate_op(chip, slot3, phase_mod1);
1020 output2 = calculate_op(chip, slot2, phase_mod3);
1021 break;
1022
1023 // <-----------------|
1024 // +--[S1]--+--[S3]--|--+--[S2]-->
1025 case 1:
1026 phase_mod1 = calculate_op(chip, slot1, OP_INPUT_FEEDBACK);
1027 phase_mod3 = calculate_op(chip, slot3, phase_mod1);
1028 set_feedback(chip, slot1, phase_mod3);
1029 output2 = calculate_op(chip, slot2, phase_mod3);
1030 break;
1031
1032 // --[S3]-----|
1033 // <--------| |
1034 // +--[S1]--|--+--[S2]-->
1035 case 2:
1036 phase_mod1 = calculate_op(chip, slot1, OP_INPUT_FEEDBACK);
1037 set_feedback(chip, slot1, phase_mod1);
1038 phase_mod3 = calculate_op(chip, slot3, OP_INPUT_NONE);
1039 output2 = calculate_op(chip, slot2, (phase_mod1 + phase_mod3) / 1);
1040 break;
1041
1042 // --[S3]--+--[S2]--|
1043 // <--------| |
1044 // +--[S1]--|--------+-->
1045 case 3:
1046 phase_mod1 = calculate_op(chip, slot1, OP_INPUT_FEEDBACK);
1047 set_feedback(chip, slot1, phase_mod1);
1048 output1 = phase_mod1;
1049 phase_mod3 = calculate_op(chip, slot3, OP_INPUT_NONE);
1050 output2 = calculate_op(chip, slot2, phase_mod3);
1051 break;
1052
1053 // --[S2]--|
1054 // <--------| |
1055 // +--[S1]--|--+--[S3]--+-->
1056 case 4:
1057 phase_mod1 = calculate_op(chip, slot1, OP_INPUT_FEEDBACK);
1058 set_feedback(chip, slot1, phase_mod1);
1059 output3 = calculate_op(chip, slot3, phase_mod1);
1060 output2 = calculate_op(chip, slot2, OP_INPUT_NONE);
1061 break;
1062
1063 // --[S2]--|
1064 // <-----------------| |
1065 // +--[S1]--+--[S3]--|--+-->
1066 case 5:
1067 phase_mod1 = calculate_op(chip, slot1, OP_INPUT_FEEDBACK);
1068 phase_mod3 = calculate_op(chip, slot3, phase_mod1);
1069 set_feedback(chip, slot1, phase_mod3);
1070 output3 = phase_mod3;
1071 output2 = calculate_op(chip, slot2, OP_INPUT_NONE);
1072 break;
1073
1074 // --[S2]-----|
1075 // --[S3]-----|
1076 // <--------| |
1077 // +--[S1]--|--+-->
1078 case 6:
1079 phase_mod1 = calculate_op(chip, slot1, OP_INPUT_FEEDBACK);
1080 set_feedback(chip, slot1, phase_mod1);
1081 output1 = phase_mod1;
1082 output3 = calculate_op(chip, slot3, OP_INPUT_NONE);
1083 output2 = calculate_op(chip, slot2, OP_INPUT_NONE);
1084 break;
1085
1086 // --[S2]--|
1087 // <--------| +--[S3]--|
1088 // +--[S1]--|--|--------+-->
1089 case 7:
1090 phase_mod1 = calculate_op(chip, slot1, OP_INPUT_FEEDBACK);
1091 set_feedback(chip, slot1, phase_mod1);
1092 output1 = phase_mod1;
1093 output3 = calculate_op(chip, slot3, phase_mod1);
1094 output2 = calculate_op(chip, slot2, OP_INPUT_NONE);
1095 break;
1096 }
1097
1098 *mixp++ += ((output1 * chip->lut_attenuation[chip->slots[slot1].ch0_level]) +
1099 (output2 * chip->lut_attenuation[chip->slots[slot2].ch0_level]) +
1100 (output3 * chip->lut_attenuation[chip->slots[slot3].ch0_level])) >> 16;
1101 *mixp++ += ((output1 * chip->lut_attenuation[chip->slots[slot1].ch1_level]) +
1102 (output2 * chip->lut_attenuation[chip->slots[slot2].ch1_level]) +
1103 (output3 * chip->lut_attenuation[chip->slots[slot3].ch1_level])) >> 16;
1104 }
1105 }
1106
1107 mixp = chip->mix_buffer;
1108 update_pcm(chip, j + (3*12), mixp, samples);
1109 break;
1110 }
1111
1112 // PCM
1113 case 3:
1114 {
1115 update_pcm(chip, j + (0*12), mixp, samples);
1116 update_pcm(chip, j + (1*12), mixp, samples);
1117 update_pcm(chip, j + (2*12), mixp, samples);
1118 update_pcm(chip, j + (3*12), mixp, samples);
1119 break;
1120 }
1121 }
1122 }
1123
1124 mixp = chip->mix_buffer;
1125 for (i = 0; i < samples; i++)
1126 {
1127 outputs[0][i] = (*mixp++)>>2;
1128 outputs[1][i] = (*mixp++)>>2;
1129 }
1130 }
1131
write_register(YMF271Chip * chip,int slotnum,int reg,UINT8 data)1132 static void write_register(YMF271Chip *chip, int slotnum, int reg, UINT8 data)
1133 {
1134 YMF271Slot *slot = &chip->slots[slotnum];
1135
1136 switch (reg)
1137 {
1138 case 0x0:
1139 slot->ext_en = (data & 0x80) ? 1 : 0;
1140 slot->ext_out = (data>>3)&0xf;
1141
1142 if (data & 1)
1143 {
1144 // key on
1145 slot->step = 0;
1146 slot->stepptr = 0;
1147
1148 slot->active = 1;
1149
1150 calculate_step(slot);
1151 init_envelope(chip, slot);
1152 init_lfo(chip, slot);
1153 slot->feedback_modulation0 = 0;
1154 slot->feedback_modulation1 = 0;
1155 }
1156 else
1157 {
1158 if (slot->active)
1159 {
1160 slot->env_state = ENV_RELEASE;
1161 }
1162 }
1163 break;
1164
1165 case 0x1:
1166 slot->lfoFreq = data;
1167 break;
1168
1169 case 0x2:
1170 slot->lfowave = data & 3;
1171 slot->pms = (data >> 3) & 0x7;
1172 slot->ams = (data >> 6) & 0x3;
1173 break;
1174
1175 case 0x3:
1176 slot->multiple = data & 0xf;
1177 slot->detune = (data >> 4) & 0x7;
1178 break;
1179
1180 case 0x4:
1181 slot->tl = data & 0x7f;
1182 break;
1183
1184 case 0x5:
1185 slot->ar = data & 0x1f;
1186 slot->keyscale = (data >> 5) & 0x7;
1187 break;
1188
1189 case 0x6:
1190 slot->decay1rate = data & 0x1f;
1191 break;
1192
1193 case 0x7:
1194 slot->decay2rate = data & 0x1f;
1195 break;
1196
1197 case 0x8:
1198 slot->relrate = data & 0xf;
1199 slot->decay1lvl = (data >> 4) & 0xf;
1200 break;
1201
1202 case 0x9:
1203 // write frequency and block here
1204 slot->fns = (slot->fns_hi << 8 & 0x0f00) | data;
1205 slot->block = slot->fns_hi >> 4 & 0xf;
1206 break;
1207
1208 case 0xa:
1209 slot->fns_hi = data;
1210 break;
1211
1212 case 0xb:
1213 slot->waveform = data & 0x7;
1214 slot->feedback = (data >> 4) & 0x7;
1215 slot->accon = (data & 0x80) ? 1 : 0;
1216 break;
1217
1218 case 0xc:
1219 slot->algorithm = data & 0xf;
1220 break;
1221
1222 case 0xd:
1223 slot->ch0_level = data >> 4;
1224 slot->ch1_level = data & 0xf;
1225 break;
1226
1227 case 0xe:
1228 slot->ch2_level = data >> 4;
1229 slot->ch3_level = data & 0xf;
1230 break;
1231
1232 default:
1233 break;
1234 }
1235 }
1236
ymf271_write_fm(YMF271Chip * chip,int bank,UINT8 address,UINT8 data)1237 static void ymf271_write_fm(YMF271Chip *chip, int bank, UINT8 address, UINT8 data)
1238 {
1239 int groupnum = fm_tab[address & 0xf];
1240 int reg = (address >> 4) & 0xf;
1241 int sync_reg;
1242 int sync_mode;
1243
1244 if (groupnum == -1)
1245 {
1246 logerror("ymf271_write_fm invalid group %02X %02X\n", address, data);
1247 return;
1248 }
1249
1250 // check if the register is a synchronized register
1251 sync_reg = 0;
1252 switch (reg)
1253 {
1254 case 0:
1255 case 9:
1256 case 10:
1257 case 12:
1258 case 13:
1259 case 14:
1260 sync_reg = 1;
1261 break;
1262
1263 default:
1264 break;
1265 }
1266
1267 // check if the slot is key on slot for synchronizing
1268 sync_mode = 0;
1269 switch (chip->groups[groupnum].sync)
1270 {
1271 // 4 slot mode
1272 case 0:
1273 if (bank == 0)
1274 sync_mode = 1;
1275 break;
1276
1277 // 2x 2 slot mode
1278 case 1:
1279 if (bank == 0 || bank == 1)
1280 sync_mode = 1;
1281 break;
1282
1283 // 3 slot + 1 slot mode
1284 case 2:
1285 if (bank == 0)
1286 sync_mode = 1;
1287 break;
1288
1289 default:
1290 break;
1291 }
1292
1293 // key-on slot & synced register
1294 if (sync_mode && sync_reg)
1295 {
1296 switch (chip->groups[groupnum].sync)
1297 {
1298 // 4 slot mode
1299 case 0:
1300 write_register(chip, (12 * 0) + groupnum, reg, data);
1301 write_register(chip, (12 * 1) + groupnum, reg, data);
1302 write_register(chip, (12 * 2) + groupnum, reg, data);
1303 write_register(chip, (12 * 3) + groupnum, reg, data);
1304 break;
1305
1306 // 2x 2 slot mode
1307 case 1:
1308 if (bank == 0)
1309 {
1310 // Slot 1 - Slot 3
1311 write_register(chip, (12 * 0) + groupnum, reg, data);
1312 write_register(chip, (12 * 2) + groupnum, reg, data);
1313 }
1314 else
1315 {
1316 // Slot 2 - Slot 4
1317 write_register(chip, (12 * 1) + groupnum, reg, data);
1318 write_register(chip, (12 * 3) + groupnum, reg, data);
1319 }
1320 break;
1321
1322 // 3 slot + 1 slot mode (1 slot is handled normally)
1323 case 2:
1324 write_register(chip, (12 * 0) + groupnum, reg, data);
1325 write_register(chip, (12 * 1) + groupnum, reg, data);
1326 write_register(chip, (12 * 2) + groupnum, reg, data);
1327 break;
1328 }
1329 }
1330 else
1331 {
1332 // write register normally
1333 write_register(chip, (12 * bank) + groupnum, reg, data);
1334 }
1335 }
1336
ymf271_write_pcm(YMF271Chip * chip,UINT8 address,UINT8 data)1337 static void ymf271_write_pcm(YMF271Chip *chip, UINT8 address, UINT8 data)
1338 {
1339 int slotnum = pcm_tab[address & 0xf];
1340 YMF271Slot *slot;
1341 if (slotnum == -1)
1342 {
1343 logerror("ymf271_write_pcm invalid slot %02X %02X\n", address, data);
1344 return;
1345 }
1346 slot = &chip->slots[slotnum];
1347
1348 switch ((address >> 4) & 0xf)
1349 {
1350 case 0x0:
1351 slot->startaddr &= ~0xff;
1352 slot->startaddr |= data;
1353 break;
1354
1355 case 0x1:
1356 slot->startaddr &= ~0xff00;
1357 slot->startaddr |= data<<8;
1358 break;
1359
1360 case 0x2:
1361 slot->startaddr &= ~0xff0000;
1362 slot->startaddr |= (data & 0x7f)<<16;
1363 slot->altloop = (data & 0x80) ? 1 : 0;
1364 //if (slot->altloop)
1365 // popmessage("ymf271 A/L, contact MAMEdev");
1366 break;
1367
1368 case 0x3:
1369 slot->endaddr &= ~0xff;
1370 slot->endaddr |= data;
1371 break;
1372
1373 case 0x4:
1374 slot->endaddr &= ~0xff00;
1375 slot->endaddr |= data<<8;
1376 break;
1377
1378 case 0x5:
1379 slot->endaddr &= ~0xff0000;
1380 slot->endaddr |= (data & 0x7f)<<16;
1381 break;
1382
1383 case 0x6:
1384 slot->loopaddr &= ~0xff;
1385 slot->loopaddr |= data;
1386 break;
1387
1388 case 0x7:
1389 slot->loopaddr &= ~0xff00;
1390 slot->loopaddr |= data<<8;
1391 break;
1392
1393 case 0x8:
1394 slot->loopaddr &= ~0xff0000;
1395 slot->loopaddr |= (data & 0x7f)<<16;
1396 break;
1397
1398 case 0x9:
1399 slot->fs = data & 0x3;
1400 slot->bits = (data & 0x4) ? 12 : 8;
1401 slot->srcnote = (data >> 3) & 0x3;
1402 slot->srcb = (data >> 5) & 0x7;
1403 break;
1404
1405 default:
1406 break;
1407 }
1408 }
1409
1410 /*static TIMER_CALLBACK( ymf271_timer_a_tick )
1411 {
1412 YMF271Chip *chip = (YMF271Chip *)ptr;
1413
1414 chip->status |= 1;
1415
1416 if (chip->enable & 4)
1417 {
1418 chip->irqstate |= 1;
1419 if (chip->irq_callback) chip->irq_callback(chip->device, 1);
1420 }
1421 }
1422
1423 static TIMER_CALLBACK( ymf271_timer_b_tick )
1424 {
1425 YMF271Chip *chip = (YMF271Chip *)ptr;
1426
1427 chip->status |= 2;
1428
1429 if (chip->enable & 8)
1430 {
1431 chip->irqstate |= 2;
1432 if (chip->irq_callback) chip->irq_callback(chip->device, 1);
1433 }
1434 }*/
1435
ymf271_read_memory(YMF271Chip * chip,UINT32 offset)1436 static UINT8 ymf271_read_memory(YMF271Chip *chip, UINT32 offset)
1437 {
1438 /*if (m_ext_read_handler.isnull())
1439 {
1440 if (offset < chip->mem_size)
1441 return chip->mem_base[offset];
1442
1443 // 8MB chip limit (shouldn't happen)
1444 else if (offset > 0x7fffff)
1445 return chip->mem_base[offset & 0x7fffff];
1446
1447 else
1448 return 0;
1449 }
1450 else
1451 return m_ext_read_handler(offset);*/
1452
1453 offset &= 0x7FFFFF;
1454 if (offset < chip->mem_size)
1455 return chip->mem_base[offset];
1456 else
1457 return 0;
1458 }
1459
ymf271_write_timer(YMF271Chip * chip,UINT8 address,UINT8 data)1460 static void ymf271_write_timer(YMF271Chip *chip, UINT8 address, UINT8 data)
1461 {
1462 if ((address & 0xf0) == 0)
1463 {
1464 int groupnum = fm_tab[address & 0xf];
1465 YMF271Group *group;
1466 if (groupnum == -1)
1467 {
1468 logerror("ymf271_write_timer invalid group %02X %02X\n", address, data);
1469 return;
1470 }
1471 group = &chip->groups[groupnum];
1472
1473 group->sync = data & 0x3;
1474 group->pfm = data >> 7;
1475 }
1476 else
1477 {
1478 switch (address)
1479 {
1480 case 0x10:
1481 chip->timerA = data;
1482 break;
1483
1484 case 0x11:
1485 // According to Yamaha's documentation, this sets timer A upper 2 bits
1486 // (it says timer A is 10 bits). But, PCB audio recordings proves
1487 // otherwise: it doesn't affect timer A frequency. (see ms32.c tetrisp)
1488 // Does this register have another function regarding timer A/B?
1489 break;
1490
1491 case 0x12:
1492 chip->timerB = data;
1493 break;
1494
1495 case 0x13:
1496 // timer A load
1497 if (~chip->enable & data & 1)
1498 {
1499 //attotime period = attotime::from_hz(chip->clock) * (384 * 4 * (256 - chip->timerA));
1500 //chip->timA->adjust((data & 1) ? period : attotime::never, 0);
1501 }
1502
1503 // timer B load
1504 if (~chip->enable & data & 2)
1505 {
1506 //attotime period = attotime::from_hz(chip->clock) * (384 * 16 * (256 - chip->timerB));
1507 //chip->timB->adjust((data & 2) ? period : attotime::never, 0);
1508 }
1509
1510 // timer A reset
1511 if (data & 0x10)
1512 {
1513 chip->irqstate &= ~1;
1514 chip->status &= ~1;
1515
1516 //if (!chip->irq_handler.isnull() && ~chip->irqstate & 2)
1517 // chip->irq_handler(0);
1518 }
1519
1520 // timer B reset
1521 if (data & 0x20)
1522 {
1523 chip->irqstate &= ~2;
1524 chip->status &= ~2;
1525
1526 //if (!chip->irq_handler.isnull() && ~chip->irqstate & 1)
1527 // chip->irq_handler(0);
1528 }
1529
1530 chip->enable = data;
1531 break;
1532
1533 case 0x14:
1534 chip->ext_address &= ~0xff;
1535 chip->ext_address |= data;
1536 break;
1537 case 0x15:
1538 chip->ext_address &= ~0xff00;
1539 chip->ext_address |= data << 8;
1540 break;
1541 case 0x16:
1542 chip->ext_address &= ~0xff0000;
1543 chip->ext_address |= (data & 0x7f) << 16;
1544 chip->ext_rw = (data & 0x80) ? 1 : 0;
1545 break;
1546 case 0x17:
1547 chip->ext_address = (chip->ext_address + 1) & 0x7fffff;
1548 //if (!chip->ext_rw && !chip->ext_write_handler.isnull())
1549 // chip->ext_write_handler(chip->ext_address, data);
1550 break;
1551 }
1552 }
1553 }
1554
1555 //WRITE8_DEVICE_HANDLER( ymf271_w )
ymf271_w(void * _info,offs_t offset,UINT8 data)1556 void ymf271_w(void *_info, offs_t offset, UINT8 data)
1557 {
1558 //YMF271Chip *chip = get_safe_token(device);
1559 YMF271Chip *chip = (YMF271Chip *)_info;
1560
1561 chip->regs_main[offset & 0xf] = data;
1562
1563 switch (offset & 0xf)
1564 {
1565 case 0x0:
1566 case 0x2:
1567 case 0x4:
1568 case 0x6:
1569 case 0x8:
1570 case 0xc:
1571 // address regs
1572 break;
1573
1574 case 0x1:
1575 ymf271_write_fm(chip, 0, chip->regs_main[0x0], data);
1576 break;
1577
1578 case 0x3:
1579 ymf271_write_fm(chip, 1, chip->regs_main[0x2], data);
1580 break;
1581
1582 case 0x5:
1583 ymf271_write_fm(chip, 2, chip->regs_main[0x4], data);
1584 break;
1585
1586 case 0x7:
1587 ymf271_write_fm(chip, 3, chip->regs_main[0x6], data);
1588 break;
1589
1590 case 0x9:
1591 ymf271_write_pcm(chip, chip->regs_main[0x8], data);
1592 break;
1593
1594 case 0xd:
1595 ymf271_write_timer(chip, chip->regs_main[0xc], data);
1596 break;
1597
1598 default:
1599 break;
1600 }
1601 }
1602
1603 //READ8_DEVICE_HANDLER( ymf271_r )
ymf271_r(void * _info,offs_t offset)1604 UINT8 ymf271_r(void *_info, offs_t offset)
1605 {
1606 //YMF271Chip *chip = get_safe_token(device);
1607 YMF271Chip *chip = (YMF271Chip *)_info;
1608
1609 switch (offset & 0xf)
1610 {
1611 case 0x0:
1612 return chip->status;
1613
1614 case 0x1:
1615 // statusreg 2
1616 return 0;
1617
1618 case 0x2:
1619 {
1620 UINT8 ret;
1621 if (!chip->ext_rw)
1622 return 0xff;
1623
1624 ret = chip->ext_readlatch;
1625 chip->ext_address = (chip->ext_address + 1) & 0x7fffff;
1626 chip->ext_readlatch = ymf271_read_memory(chip, chip->ext_address);
1627 return ret;
1628 }
1629
1630 default:
1631 break;
1632 }
1633
1634 return 0xff;
1635 }
1636
init_tables(YMF271Chip * chip)1637 static void init_tables(YMF271Chip *chip)
1638 {
1639 int i,j;
1640 double clock_correction;
1641
1642 for (i = 0; i < 8; i++)
1643 chip->lut_waves[i] = (INT16*)malloc(sizeof(INT16) * SIN_LEN);
1644
1645 for (i = 0; i < 4*8; i++)
1646 chip->lut_plfo[i>>3][i&7] = (double*)malloc(sizeof(double) * LFO_LENGTH);
1647
1648 for (i = 0; i < 4; i++)
1649 chip->lut_alfo[i] = (int*)malloc(sizeof(int) * LFO_LENGTH);
1650
1651 for (i=0; i < SIN_LEN; i++)
1652 {
1653 double m = sin( ((i*2)+1) * M_PI / SIN_LEN );
1654 double m2 = sin( ((i*4)+1) * M_PI / SIN_LEN );
1655
1656 // Waveform 0: sin(wt) (0 <= wt <= 2PI)
1657 chip->lut_waves[0][i] = (INT16)(m * MAXOUT);
1658
1659 // Waveform 1: sin?(wt) (0 <= wt <= PI) -sin?(wt) (PI <= wt <= 2PI)
1660 chip->lut_waves[1][i] = (i < (SIN_LEN/2)) ? (INT16)((m * m) * MAXOUT) : (INT16)((m * m) * MINOUT);
1661
1662 // Waveform 2: sin(wt) (0 <= wt <= PI) -sin(wt) (PI <= wt <= 2PI)
1663 chip->lut_waves[2][i] = (i < (SIN_LEN/2)) ? (INT16)(m * MAXOUT) : (INT16)(-m * MAXOUT);
1664
1665 // Waveform 3: sin(wt) (0 <= wt <= PI) 0
1666 chip->lut_waves[3][i] = (i < (SIN_LEN/2)) ? (INT16)(m * MAXOUT) : 0;
1667
1668 // Waveform 4: sin(2wt) (0 <= wt <= PI) 0
1669 chip->lut_waves[4][i] = (i < (SIN_LEN/2)) ? (INT16)(m2 * MAXOUT) : 0;
1670
1671 // Waveform 5: |sin(2wt)| (0 <= wt <= PI) 0
1672 chip->lut_waves[5][i] = (i < (SIN_LEN/2)) ? (INT16)(fabs(m2) * MAXOUT) : 0;
1673
1674 // Waveform 6: 1 (0 <= wt <= 2PI)
1675 chip->lut_waves[6][i] = (INT16)(1 * MAXOUT);
1676
1677 chip->lut_waves[7][i] = 0;
1678 }
1679
1680 for (i = 0; i < LFO_LENGTH; i++)
1681 {
1682 int tri_wave;
1683 double ftri_wave, fsaw_wave;
1684 double plfo[4];
1685
1686 // LFO phase modulation
1687 plfo[0] = 0;
1688
1689 fsaw_wave = ((i % (LFO_LENGTH/2)) * PLFO_MAX) / (double)((LFO_LENGTH/2)-1);
1690 plfo[1] = (i < (LFO_LENGTH/2)) ? fsaw_wave : fsaw_wave - PLFO_MAX;
1691
1692 plfo[2] = (i < (LFO_LENGTH/2)) ? PLFO_MAX : PLFO_MIN;
1693
1694 ftri_wave = ((i % (LFO_LENGTH/4)) * PLFO_MAX) / (double)(LFO_LENGTH/4);
1695 switch (i / (LFO_LENGTH/4))
1696 {
1697 case 0: plfo[3] = ftri_wave; break;
1698 case 1: plfo[3] = PLFO_MAX - ftri_wave; break;
1699 case 2: plfo[3] = 0 - ftri_wave; break;
1700 case 3: plfo[3] = 0 - (PLFO_MAX - ftri_wave); break;
1701 default: plfo[3] = 0; /*assert(0);*/ break;
1702 }
1703
1704 for (j = 0; j < 4; j++)
1705 {
1706 chip->lut_plfo[j][0][i] = pow(2.0, 0.0);
1707 chip->lut_plfo[j][1][i] = pow(2.0, (3.378 * plfo[j]) / 1200.0);
1708 chip->lut_plfo[j][2][i] = pow(2.0, (5.0646 * plfo[j]) / 1200.0);
1709 chip->lut_plfo[j][3][i] = pow(2.0, (6.7495 * plfo[j]) / 1200.0);
1710 chip->lut_plfo[j][4][i] = pow(2.0, (10.1143 * plfo[j]) / 1200.0);
1711 chip->lut_plfo[j][5][i] = pow(2.0, (20.1699 * plfo[j]) / 1200.0);
1712 chip->lut_plfo[j][6][i] = pow(2.0, (40.1076 * plfo[j]) / 1200.0);
1713 chip->lut_plfo[j][7][i] = pow(2.0, (79.307 * plfo[j]) / 1200.0);
1714 }
1715
1716 // LFO amplitude modulation
1717 chip->lut_alfo[0][i] = 0;
1718
1719 chip->lut_alfo[1][i] = ALFO_MAX - ((i * ALFO_MAX) / LFO_LENGTH);
1720
1721 chip->lut_alfo[2][i] = (i < (LFO_LENGTH/2)) ? ALFO_MAX : ALFO_MIN;
1722
1723 tri_wave = ((i % (LFO_LENGTH/2)) * ALFO_MAX) / (LFO_LENGTH/2);
1724 chip->lut_alfo[3][i] = (i < (LFO_LENGTH/2)) ? ALFO_MAX-tri_wave : tri_wave;
1725 }
1726
1727 for (i = 0; i < 256; i++)
1728 {
1729 chip->lut_env_volume[i] = (int)(65536.0 / pow(10.0, ((double)i / (256.0 / 96.0)) / 20.0));
1730 }
1731
1732 for (i = 0; i < 16; i++)
1733 {
1734 chip->lut_attenuation[i] = (int)(65536.0 / pow(10.0, channel_attenuation_table[i] / 20.0));
1735 }
1736 for (i = 0; i < 128; i++)
1737 {
1738 double db = 0.75 * (double)i;
1739 chip->lut_total_level[i] = (int)(65536.0 / pow(10.0, db / 20.0));
1740 }
1741
1742 // timing may use a non-standard XTAL
1743 clock_correction = (double)(STD_CLOCK) / (double)(chip->clock);
1744 for (i = 0; i < 256; i++)
1745 {
1746 chip->lut_lfo[i] = LFO_frequency_table[i] * clock_correction;
1747 }
1748
1749 for (i = 0; i < 64; i++)
1750 {
1751 // attack/release rate in number of samples
1752 chip->lut_ar[i] = (ARTime[i] * clock_correction * 44100.0) / 1000.0;
1753 }
1754 for (i = 0; i < 64; i++)
1755 {
1756 // decay rate in number of samples
1757 chip->lut_dc[i] = (DCTime[i] * clock_correction * 44100.0) / 1000.0;
1758 }
1759 }
1760
1761 /*static void init_state(YMF271Chip *chip, const device_config *device)
1762 {
1763 int i;
1764
1765 for (i = 0; i < ARRAY_LENGTH(chip->slots); i++)
1766 {
1767 state_save_register_device_item(device, i, chip->slots[i].ext_out);
1768 state_save_register_device_item(device, i, chip->slots[i].lfoFreq);
1769 state_save_register_device_item(device, i, chip->slots[i].pms);
1770 state_save_register_device_item(device, i, chip->slots[i].ams);
1771 state_save_register_device_item(device, i, chip->slots[i].detune);
1772 state_save_register_device_item(device, i, chip->slots[i].multiple);
1773 state_save_register_device_item(device, i, chip->slots[i].tl);
1774 state_save_register_device_item(device, i, chip->slots[i].keyscale);
1775 state_save_register_device_item(device, i, chip->slots[i].ar);
1776 state_save_register_device_item(device, i, chip->slots[i].decay1rate);
1777 state_save_register_device_item(device, i, chip->slots[i].decay2rate);
1778 state_save_register_device_item(device, i, chip->slots[i].decay1lvl);
1779 state_save_register_device_item(device, i, chip->slots[i].relrate);
1780 state_save_register_device_item(device, i, chip->slots[i].fns);
1781 state_save_register_device_item(device, i, chip->slots[i].block);
1782 state_save_register_device_item(device, i, chip->slots[i].feedback);
1783 state_save_register_device_item(device, i, chip->slots[i].waveform);
1784 state_save_register_device_item(device, i, chip->slots[i].accon);
1785 state_save_register_device_item(device, i, chip->slots[i].algorithm);
1786 state_save_register_device_item(device, i, chip->slots[i].ch0_level);
1787 state_save_register_device_item(device, i, chip->slots[i].ch1_level);
1788 state_save_register_device_item(device, i, chip->slots[i].ch2_level);
1789 state_save_register_device_item(device, i, chip->slots[i].ch3_level);
1790 state_save_register_device_item(device, i, chip->slots[i].startaddr);
1791 state_save_register_device_item(device, i, chip->slots[i].loopaddr);
1792 state_save_register_device_item(device, i, chip->slots[i].endaddr);
1793 state_save_register_device_item(device, i, chip->slots[i].fs);
1794 state_save_register_device_item(device, i, chip->slots[i].srcnote);
1795 state_save_register_device_item(device, i, chip->slots[i].srcb);
1796 state_save_register_device_item(device, i, chip->slots[i].step);
1797 state_save_register_device_item(device, i, chip->slots[i].stepptr);
1798 state_save_register_device_item(device, i, chip->slots[i].active);
1799 state_save_register_device_item(device, i, chip->slots[i].bits);
1800 state_save_register_device_item(device, i, chip->slots[i].volume);
1801 state_save_register_device_item(device, i, chip->slots[i].env_state);
1802 state_save_register_device_item(device, i, chip->slots[i].env_attack_step);
1803 state_save_register_device_item(device, i, chip->slots[i].env_decay1_step);
1804 state_save_register_device_item(device, i, chip->slots[i].env_decay2_step);
1805 state_save_register_device_item(device, i, chip->slots[i].env_release_step);
1806 state_save_register_device_item(device, i, chip->slots[i].feedback_modulation0);
1807 state_save_register_device_item(device, i, chip->slots[i].feedback_modulation1);
1808 state_save_register_device_item(device, i, chip->slots[i].lfo_phase);
1809 state_save_register_device_item(device, i, chip->slots[i].lfo_step);
1810 state_save_register_device_item(device, i, chip->slots[i].lfo_amplitude);
1811 }
1812
1813 for (i = 0; i < sizeof(chip->groups) / sizeof(chip->groups[0]); i++)
1814 {
1815 state_save_register_device_item(device, i, chip->groups[i].sync);
1816 state_save_register_device_item(device, i, chip->groups[i].pfm);
1817 }
1818
1819 state_save_register_device_item(device, 0, chip->timerA);
1820 state_save_register_device_item(device, 0, chip->timerB);
1821 state_save_register_device_item(device, 0, chip->timerAVal);
1822 state_save_register_device_item(device, 0, chip->timerBVal);
1823 state_save_register_device_item(device, 0, chip->irqstate);
1824 state_save_register_device_item(device, 0, chip->status);
1825 state_save_register_device_item(device, 0, chip->enable);
1826 state_save_register_device_item(device, 0, chip->reg0);
1827 state_save_register_device_item(device, 0, chip->reg1);
1828 state_save_register_device_item(device, 0, chip->reg2);
1829 state_save_register_device_item(device, 0, chip->reg3);
1830 state_save_register_device_item(device, 0, chip->pcmreg);
1831 state_save_register_device_item(device, 0, chip->timerreg);
1832 state_save_register_device_item(device, 0, chip->ext_address);
1833 state_save_register_device_item(device, 0, chip->ext_read);
1834 }*/
1835
1836 //static DEVICE_START( ymf271 )
device_start_ymf271(void ** _info,int clock)1837 int device_start_ymf271(void **_info, int clock)
1838 {
1839 //static const ymf271_interface defintrf = { DEVCB_NULL };
1840 //const ymf271_interface *intf;
1841 int i;
1842 //YMF271Chip *chip = get_safe_token(device);
1843 YMF271Chip *chip;
1844
1845 chip = (YMF271Chip *) calloc(1, sizeof(YMF271Chip));
1846 *_info = (void *) chip;
1847
1848 //chip->device = device;
1849 chip->clock = clock;
1850
1851 //intf = (device->static_config != NULL) ? (const ymf271_interface *)device->static_config : &defintrf;
1852
1853 chip->mem_size = 0x00;
1854 chip->mem_base = NULL;
1855
1856 init_tables(chip);
1857 //init_state(chip);
1858 //chip->stream = stream_create(device, 0, 2, device->clock/384, chip, ymf271_update);
1859
1860 //chip->mix_buffer = auto_alloc_array(machine, INT32, 44100*2);
1861 chip->mix_buffer = (INT32*)malloc(44100*2 * sizeof(INT32));
1862
1863 for (i = 0; i < 12; i ++)
1864 chip->groups[i].Muted = 0x00;
1865
1866 return clock/384;
1867 }
1868
1869 //static DEVICE_STOP( ymf271 )
device_stop_ymf271(void * _info)1870 void device_stop_ymf271(void *_info)
1871 {
1872 int i;
1873 YMF271Chip *chip = (YMF271Chip *)_info;
1874
1875 free(chip->mem_base); chip->mem_base = NULL;
1876
1877 for (i=0; i < 8; i++)
1878 {
1879 free(chip->lut_waves[i]);
1880 chip->lut_waves[i] = NULL;
1881 }
1882 for (i = 0; i < 4*8; i++)
1883 {
1884 free(chip->lut_plfo[i>>3][i&7]);
1885 chip->lut_plfo[i>>3][i&7] = NULL;
1886 }
1887
1888 for (i = 0; i < 4; i++)
1889 {
1890 free(chip->lut_alfo[i]);
1891 chip->lut_alfo[i] = NULL;
1892 }
1893
1894 free(chip->mix_buffer);
1895 chip->mix_buffer = NULL;
1896
1897 free(chip);
1898
1899 return;
1900 }
1901
1902 //static DEVICE_RESET( ymf271 )
device_reset_ymf271(void * _info)1903 void device_reset_ymf271(void *_info)
1904 {
1905 int i;
1906 //YMF271Chip *chip = get_safe_token(device);
1907 YMF271Chip *chip = (YMF271Chip *)_info;
1908
1909 for (i = 0; i < 48; i++)
1910 {
1911 chip->slots[i].active = 0;
1912 chip->slots[i].volume = 0;
1913 }
1914
1915 // reset timers and IRQ
1916 //chip->timA->reset();
1917 //chip->timB->reset();
1918
1919 chip->irqstate = 0;
1920 chip->status = 0;
1921 chip->enable = 0;
1922
1923 //if (!chip->irq_handler.isnull())
1924 // chip->irq_handler(0);
1925 }
1926
ymf271_write_rom(void * _info,offs_t ROMSize,offs_t DataStart,offs_t DataLength,const UINT8 * ROMData)1927 void ymf271_write_rom(void *_info, offs_t ROMSize, offs_t DataStart, offs_t DataLength,
1928 const UINT8* ROMData)
1929 {
1930 YMF271Chip *chip = (YMF271Chip *)_info;
1931
1932 if (chip->mem_size != ROMSize)
1933 {
1934 chip->mem_base = (UINT8*)realloc(chip->mem_base, ROMSize);
1935 chip->mem_size = ROMSize;
1936 memset(chip->mem_base, 0xFF, ROMSize);
1937 }
1938 if (DataStart > ROMSize)
1939 return;
1940 if (DataStart + DataLength > ROMSize)
1941 DataLength = ROMSize - DataStart;
1942
1943 memcpy(chip->mem_base + DataStart, ROMData, DataLength);
1944
1945 return;
1946 }
1947
ymf271_set_mute_mask(void * _info,UINT32 MuteMask)1948 void ymf271_set_mute_mask(void *_info, UINT32 MuteMask)
1949 {
1950 YMF271Chip *chip = (YMF271Chip *)_info;
1951 UINT8 CurChn;
1952
1953 for (CurChn = 0; CurChn < 12; CurChn ++)
1954 chip->groups[CurChn].Muted = (MuteMask >> CurChn) & 0x01;
1955
1956 return;
1957 }
1958
1959 /**************************************************************************
1960 * Generic get_info
1961 **************************************************************************/
1962
1963 /*DEVICE_GET_INFO( ymf271 )
1964 {
1965 switch (state)
1966 {
1967 // --- the following bits of info are returned as 64-bit signed integers ---
1968 case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(YMF271Chip); break;
1969
1970 // --- the following bits of info are returned as pointers to data or functions
1971 case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( ymf271 ); break;
1972 case DEVINFO_FCT_STOP: // Nothing break;
1973 case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME( ymf271 ); break;
1974
1975 // --- the following bits of info are returned as NULL-terminated strings ---
1976 case DEVINFO_STR_NAME: strcpy(info->s, "YMF271"); break;
1977 case DEVINFO_STR_FAMILY: strcpy(info->s, "Yamaha FM"); break;
1978 case DEVINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
1979 case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
1980 case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
1981 }
1982 }*/
1983