| /dragonfly/sys/dev/drm/radeon/ |
| H A D | radeon_clocks.c | 69 uint32_t fb_div, ref_div, post_div, mclk; in radeon_legacy_get_memory_clock() local
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| H A D | ci_dpm.c | 836 u32 sclk, mclk; in ci_apply_state_adjust_rules() local
2341 static int ci_populate_mvdd_value(struct radeon_device *rdev, u32 mclk, in ci_populate_mvdd_value()
2432 u32 mclk, in ci_populate_phase_value_based_on_mclk()
2558 u32 mclk, in ci_populate_memory_timing_parameters()
2824 SMU7_Discrete_MemoryLevel *mclk, in ci_calculate_mclk_params()
3897 u32 mclk = state->performance_levels[state->performance_level_count-1].mclk; in ci_find_dpm_states_clocks_in_dpm_table() local
3934 u32 mclk = state->performance_levels[state->performance_level_count-1].mclk; in ci_populate_and_upload_sclk_mclk_dpm_levels() local
5648 u32 sclk, mclk; in ci_parse_power_table() local
5963 u32 mclk = ci_get_average_mclk_freq(rdev); in ci_dpm_debugfs_print_current_performance_level() local
5998 u32 mclk = ci_get_average_mclk_freq(rdev); in ci_dpm_get_current_mclk() local
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| H A D | rv740_dpm.c | 189 RV7XX_SMC_MCLK_VALUE *mclk) in rv740_populate_mclk_value()
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| H A D | cypress_dpm.c | 423 u8 cypress_get_strobe_mode_settings(struct radeon_device *rdev, u32 mclk) in cypress_get_strobe_mode_settings()
475 RV7XX_SMC_MCLK_VALUE *mclk, in cypress_populate_mclk_value()
652 u32 mclk, in cypress_populate_mvdd_value()
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| H A D | rv730_dpm.c | 121 LPRV7XX_SMC_MCLK_VALUE mclk) in rv730_populate_mclk_value()
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| H A D | rv6xx_dpm.h | 81 u32 mclk; member
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| H A D | si_dpm.c | 2973 u32 mclk, sclk; in si_apply_state_adjust_rules() local
3858 static u8 si_get_strobe_mode_settings(struct radeon_device *rdev, u32 mclk) in si_get_strobe_mode_settings()
4129 static int si_populate_mvdd_value(struct radeon_device *rdev, u32 mclk, in si_populate_mvdd_value()
4209 u16 voltage, u32 sclk, u32 mclk, in si_populate_phase_shedding_value()
4874 SISLANDS_SMC_MCLK_VALUE *mclk, in si_populate_mclk_value()
6880 u32 sclk, mclk; in si_parse_power_table() local
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| H A D | rv770_dpm.c | 392 RV7XX_SMC_MCLK_VALUE *mclk) in rv770_populate_mclk_value()
596 int rv770_populate_mvdd_value(struct radeon_device *rdev, u32 mclk, in rv770_populate_mvdd_value()
2185 u32 sclk, mclk; in rv7xx_parse_pplib_clock_info() local
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| H A D | btc_dpm.c | 1241 u32 *sclk, u32 *mclk) in btc_skip_blacklist_clocks()
2098 u32 mclk, sclk; in btc_apply_state_adjust_rules() local
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| H A D | rv770_smc.h | 109 RV7XX_SMC_MCLK_VALUE mclk; member
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| H A D | ni_dpm.c | 791 u32 mclk; in ni_apply_state_adjust_rules() local
1321 u32 mclk, in ni_populate_mvdd_value()
2161 NISLANDS_SMC_MCLK_VALUE *mclk, in ni_populate_mclk_value()
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| H A D | radeon_device.c | 751 u32 mclk = rdev->pm.current_mclk; in radeon_update_bandwidth_info() local
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| H A D | rv770_dpm.h | 143 u32 mclk; member
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| /dragonfly/sys/dev/drm/amd/amdgpu/ |
| H A D | amdgpu_atombios.h | 96 u32 mclk[MAX_AC_TIMING_ENTRIES]; member
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| H A D | amdgpu_dpm.h | 93 u32 mclk; member
99 u32 mclk; member
139 u32 mclk; member
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| H A D | si_dpm.c | 3432 u32 mclk, sclk; in si_apply_state_adjust_rules() local
4324 static u8 si_get_strobe_mode_settings(struct amdgpu_device *adev, u32 mclk) in si_get_strobe_mode_settings()
4592 static int si_populate_mvdd_value(struct amdgpu_device *adev, u32 mclk, in si_populate_mvdd_value()
4672 u16 voltage, u32 sclk, u32 mclk, in si_populate_phase_shedding_value()
5337 SISLANDS_SMC_MCLK_VALUE *mclk, in si_populate_mclk_value()
7287 u32 sclk, mclk; in si_parse_power_table() local
7987 uint32_t sclk, mclk; in si_dpm_read_sensor() local
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| /dragonfly/sys/dev/drm/amd/powerplay/smumgr/ |
| H A D | fiji_smumgr.c | 1157 uint32_t clock, struct SMU73_Discrete_MemoryLevel *mclk) in fiji_calculate_mclk_params()
1285 uint32_t mclk, SMIO_Pattern *smio_pat) in fiji_populate_mvdd_value()
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| H A D | iceland_smumgr.c | 1047 SMU71_Discrete_MemoryLevel *mclk, in iceland_calculate_mclk_params()
1394 static int iceland_populate_mvdd_value(struct pp_hwmgr *hwmgr, uint32_t mclk, in iceland_populate_mvdd_value()
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| H A D | tonga_smumgr.c | 780 SMU72_Discrete_MemoryLevel *mclk, in tonga_calculate_mclk_params()
1134 uint32_t mclk, SMIO_Pattern *smio_pattern) in tonga_populate_mvdd_value()
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| H A D | ci_smumgr.c | 1024 SMU7_Discrete_MemoryLevel *mclk, in ci_calculate_mclk_params()
1347 static int ci_populate_mvdd_value(struct pp_hwmgr *hwmgr, uint32_t mclk, in ci_populate_mvdd_value()
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| /dragonfly/sys/dev/drm/amd/powerplay/inc/ |
| H A D | power_state.h | 171 unsigned long mclk; member
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| /dragonfly/sys/dev/drm/amd/include/ |
| H A D | kgd_pp_interface.h | 35 u32 mclk; member
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| /dragonfly/sys/dev/drm/amd/powerplay/hwmgr/ |
| H A D | smu10_hwmgr.c | 1087 uint32_t sclk, mclk; in smu10_read_sensor() local
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| H A D | smu7_hwmgr.c | 2892 uint32_t mclk; in smu7_apply_state_adjust_rules() local
3528 uint32_t sclk, mclk, activity_percent; in smu7_read_sensor() local
3601 uint32_t mclk = smu7_ps->performance_levels in smu7_find_dpm_states_clocks_in_dpm_table() local
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| /dragonfly/sys/dev/drm/amd/display/dc/ |
| H A D | dm_services_types.h | 64 struct dm_pp_clock_range mclk; member
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