| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/include/asm/arch-sunxi/ |
| H A D | lcdc.h | 14 struct sunxi_lcdc_reg { struct
15 u32 ctrl; /* 0x00 */
16 u32 int0; /* 0x04 */
17 u32 int1; /* 0x08 */
18 u8 res0[0x04]; /* 0x0c */
22 u8 res1[4]; /* 0x3c */
23 u32 tcon0_ctrl; /* 0x40 */
24 u32 tcon0_dclk; /* 0x44 */
30 u8 res2[0x04]; /* 0x5c */
50 u8 res3[0x44]; /* 0xac */
[all …]
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | lcdc.h | 14 struct sunxi_lcdc_reg { struct
15 u32 ctrl; /* 0x00 */
16 u32 int0; /* 0x04 */
17 u32 int1; /* 0x08 */
18 u8 res0[0x04]; /* 0x0c */
22 u8 res1[4]; /* 0x3c */
23 u32 tcon0_ctrl; /* 0x40 */
24 u32 tcon0_dclk; /* 0x44 */
30 u8 res2[0x04]; /* 0x5c */
50 u8 res3[0x44]; /* 0xac */
[all …]
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | lcdc.h | 14 struct sunxi_lcdc_reg { struct
15 u32 ctrl; /* 0x00 */
16 u32 int0; /* 0x04 */
17 u32 int1; /* 0x08 */
18 u8 res0[0x04]; /* 0x0c */
22 u8 res1[4]; /* 0x3c */
23 u32 tcon0_ctrl; /* 0x40 */
24 u32 tcon0_dclk; /* 0x44 */
30 u8 res2[0x04]; /* 0x5c */
50 u8 res3[0x44]; /* 0xac */
[all …]
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | lcdc.h | 14 struct sunxi_lcdc_reg { struct
15 u32 ctrl; /* 0x00 */
16 u32 int0; /* 0x04 */
17 u32 int1; /* 0x08 */
18 u8 res0[0x04]; /* 0x0c */
22 u8 res1[4]; /* 0x3c */
23 u32 tcon0_ctrl; /* 0x40 */
24 u32 tcon0_dclk; /* 0x44 */
30 u8 res2[0x04]; /* 0x5c */
50 u8 res3[0x44]; /* 0xac */
[all …]
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | lcdc.h | 14 struct sunxi_lcdc_reg { struct
15 u32 ctrl; /* 0x00 */
16 u32 int0; /* 0x04 */
17 u32 int1; /* 0x08 */
18 u8 res0[0x04]; /* 0x0c */
22 u8 res1[4]; /* 0x3c */
23 u32 tcon0_ctrl; /* 0x40 */
24 u32 tcon0_dclk; /* 0x44 */
30 u8 res2[0x04]; /* 0x5c */
50 u8 res3[0x44]; /* 0xac */
[all …]
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | lcdc.h | 14 struct sunxi_lcdc_reg { struct
15 u32 ctrl; /* 0x00 */
16 u32 int0; /* 0x04 */
17 u32 int1; /* 0x08 */
18 u8 res0[0x04]; /* 0x0c */
22 u8 res1[4]; /* 0x3c */
23 u32 tcon0_ctrl; /* 0x40 */
24 u32 tcon0_dclk; /* 0x44 */
30 u8 res2[0x04]; /* 0x5c */
50 u8 res3[0x44]; /* 0xac */
[all …]
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | lcdc.h | 14 struct sunxi_lcdc_reg { struct
15 u32 ctrl; /* 0x00 */
16 u32 int0; /* 0x04 */
17 u32 int1; /* 0x08 */
18 u8 res0[0x04]; /* 0x0c */
22 u8 res1[4]; /* 0x3c */
23 u32 tcon0_ctrl; /* 0x40 */
24 u32 tcon0_dclk; /* 0x44 */
30 u8 res2[0x04]; /* 0x5c */
50 u8 res3[0x44]; /* 0xac */
[all …]
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | lcdc.h | 14 struct sunxi_lcdc_reg { struct
15 u32 ctrl; /* 0x00 */
16 u32 int0; /* 0x04 */
17 u32 int1; /* 0x08 */
18 u8 res0[0x04]; /* 0x0c */
22 u8 res1[4]; /* 0x3c */
23 u32 tcon0_ctrl; /* 0x40 */
24 u32 tcon0_dclk; /* 0x44 */
30 u8 res2[0x04]; /* 0x5c */
50 u8 res3[0x44]; /* 0xac */
[all …]
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | lcdc.h | 14 struct sunxi_lcdc_reg { struct
15 u32 ctrl; /* 0x00 */
16 u32 int0; /* 0x04 */
17 u32 int1; /* 0x08 */
18 u8 res0[0x04]; /* 0x0c */
22 u8 res1[4]; /* 0x3c */
23 u32 tcon0_ctrl; /* 0x40 */
24 u32 tcon0_dclk; /* 0x44 */
30 u8 res2[0x04]; /* 0x5c */
50 u8 res3[0x44]; /* 0xac */
[all …]
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | lcdc.h | 14 struct sunxi_lcdc_reg { struct
15 u32 ctrl; /* 0x00 */
16 u32 int0; /* 0x04 */
17 u32 int1; /* 0x08 */
18 u8 res0[0x04]; /* 0x0c */
22 u8 res1[4]; /* 0x3c */
23 u32 tcon0_ctrl; /* 0x40 */
24 u32 tcon0_dclk; /* 0x44 */
30 u8 res2[0x04]; /* 0x5c */
50 u8 res3[0x44]; /* 0xac */
[all …]
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | lcdc.h | 14 struct sunxi_lcdc_reg { struct
15 u32 ctrl; /* 0x00 */
16 u32 int0; /* 0x04 */
17 u32 int1; /* 0x08 */
18 u8 res0[0x04]; /* 0x0c */
22 u8 res1[4]; /* 0x3c */
23 u32 tcon0_ctrl; /* 0x40 */
24 u32 tcon0_dclk; /* 0x44 */
30 u8 res2[0x04]; /* 0x5c */
50 u8 res3[0x44]; /* 0xac */
[all …]
|
| /dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | lcdc.h | 14 struct sunxi_lcdc_reg { struct
15 u32 ctrl; /* 0x00 */
16 u32 int0; /* 0x04 */
17 u32 int1; /* 0x08 */
18 u8 res0[0x04]; /* 0x0c */
22 u8 res1[4]; /* 0x3c */
23 u32 tcon0_ctrl; /* 0x40 */
24 u32 tcon0_dclk; /* 0x44 */
30 u8 res2[0x04]; /* 0x5c */
50 u8 res3[0x44]; /* 0xac */
[all …]
|
| /dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | lcdc.h | 14 struct sunxi_lcdc_reg { struct
15 u32 ctrl; /* 0x00 */
16 u32 int0; /* 0x04 */
17 u32 int1; /* 0x08 */
18 u8 res0[0x04]; /* 0x0c */
22 u8 res1[4]; /* 0x3c */
23 u32 tcon0_ctrl; /* 0x40 */
24 u32 tcon0_dclk; /* 0x44 */
30 u8 res2[0x04]; /* 0x5c */
50 u8 res3[0x44]; /* 0xac */
[all …]
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | lcdc.h | 14 struct sunxi_lcdc_reg { struct
15 u32 ctrl; /* 0x00 */
16 u32 int0; /* 0x04 */
17 u32 int1; /* 0x08 */
18 u8 res0[0x04]; /* 0x0c */
22 u8 res1[4]; /* 0x3c */
23 u32 tcon0_ctrl; /* 0x40 */
24 u32 tcon0_dclk; /* 0x44 */
30 u8 res2[0x04]; /* 0x5c */
50 u8 res3[0x44]; /* 0xac */
[all …]
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/include/asm/arch-sunxi/ |
| H A D | lcdc.h | 14 struct sunxi_lcdc_reg { struct
15 u32 ctrl; /* 0x00 */
16 u32 int0; /* 0x04 */
17 u32 int1; /* 0x08 */
18 u8 res0[0x04]; /* 0x0c */
22 u8 res1[4]; /* 0x3c */
23 u32 tcon0_ctrl; /* 0x40 */
24 u32 tcon0_dclk; /* 0x44 */
30 u8 res2[0x04]; /* 0x5c */
50 u8 res3[0x44]; /* 0xac */
[all …]
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | lcdc.h | 14 struct sunxi_lcdc_reg { struct
15 u32 ctrl; /* 0x00 */
16 u32 int0; /* 0x04 */
17 u32 int1; /* 0x08 */
18 u8 res0[0x04]; /* 0x0c */
22 u8 res1[4]; /* 0x3c */
23 u32 tcon0_ctrl; /* 0x40 */
24 u32 tcon0_dclk; /* 0x44 */
30 u8 res2[0x04]; /* 0x5c */
50 u8 res3[0x44]; /* 0xac */
[all …]
|
| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | lcdc.h | 14 struct sunxi_lcdc_reg { struct
15 u32 ctrl; /* 0x00 */
16 u32 int0; /* 0x04 */
17 u32 int1; /* 0x08 */
18 u8 res0[0x04]; /* 0x0c */
22 u8 res1[4]; /* 0x3c */
23 u32 tcon0_ctrl; /* 0x40 */
24 u32 tcon0_dclk; /* 0x44 */
30 u8 res2[0x04]; /* 0x5c */
50 u8 res3[0x44]; /* 0xac */
[all …]
|
| /dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | lcdc.h | 14 struct sunxi_lcdc_reg { struct
15 u32 ctrl; /* 0x00 */
16 u32 int0; /* 0x04 */
17 u32 int1; /* 0x08 */
18 u8 res0[0x04]; /* 0x0c */
22 u8 res1[4]; /* 0x3c */
23 u32 tcon0_ctrl; /* 0x40 */
24 u32 tcon0_dclk; /* 0x44 */
30 u8 res2[0x04]; /* 0x5c */
50 u8 res3[0x44]; /* 0xac */
[all …]
|
| /dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | lcdc.h | 14 struct sunxi_lcdc_reg { struct
15 u32 ctrl; /* 0x00 */
16 u32 int0; /* 0x04 */
17 u32 int1; /* 0x08 */
18 u8 res0[0x04]; /* 0x0c */
22 u8 res1[4]; /* 0x3c */
23 u32 tcon0_ctrl; /* 0x40 */
24 u32 tcon0_dclk; /* 0x44 */
30 u8 res2[0x04]; /* 0x5c */
50 u8 res3[0x44]; /* 0xac */
[all …]
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/include/asm/arch-sunxi/ |
| H A D | lcdc.h | 14 struct sunxi_lcdc_reg { struct
15 u32 ctrl; /* 0x00 */
16 u32 int0; /* 0x04 */
17 u32 int1; /* 0x08 */
18 u8 res0[0x04]; /* 0x0c */
22 u8 res1[4]; /* 0x3c */
23 u32 tcon0_ctrl; /* 0x40 */
24 u32 tcon0_dclk; /* 0x44 */
30 u8 res2[0x04]; /* 0x5c */
50 u8 res3[0x44]; /* 0xac */
[all …]
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/include/asm/arch-sunxi/ |
| H A D | lcdc.h | 14 struct sunxi_lcdc_reg { struct
15 u32 ctrl; /* 0x00 */
16 u32 int0; /* 0x04 */
17 u32 int1; /* 0x08 */
18 u8 res0[0x04]; /* 0x0c */
22 u8 res1[4]; /* 0x3c */
23 u32 tcon0_ctrl; /* 0x40 */
24 u32 tcon0_dclk; /* 0x44 */
30 u8 res2[0x04]; /* 0x5c */
50 u8 res3[0x44]; /* 0xac */
[all …]
|
| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | lcdc.h | 14 struct sunxi_lcdc_reg { struct
15 u32 ctrl; /* 0x00 */
16 u32 int0; /* 0x04 */
17 u32 int1; /* 0x08 */
18 u8 res0[0x04]; /* 0x0c */
22 u8 res1[4]; /* 0x3c */
23 u32 tcon0_ctrl; /* 0x40 */
24 u32 tcon0_dclk; /* 0x44 */
30 u8 res2[0x04]; /* 0x5c */
50 u8 res3[0x44]; /* 0xac */
[all …]
|
| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | lcdc.h | 14 struct sunxi_lcdc_reg { struct
15 u32 ctrl; /* 0x00 */
16 u32 int0; /* 0x04 */
17 u32 int1; /* 0x08 */
18 u8 res0[0x04]; /* 0x0c */
22 u8 res1[4]; /* 0x3c */
23 u32 tcon0_ctrl; /* 0x40 */
24 u32 tcon0_dclk; /* 0x44 */
30 u8 res2[0x04]; /* 0x5c */
50 u8 res3[0x44]; /* 0xac */
[all …]
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | lcdc.h | 14 struct sunxi_lcdc_reg { struct
15 u32 ctrl; /* 0x00 */
16 u32 int0; /* 0x04 */
17 u32 int1; /* 0x08 */
18 u8 res0[0x04]; /* 0x0c */
22 u8 res1[4]; /* 0x3c */
23 u32 tcon0_ctrl; /* 0x40 */
24 u32 tcon0_dclk; /* 0x44 */
30 u8 res2[0x04]; /* 0x5c */
50 u8 res3[0x44]; /* 0xac */
[all …]
|
| /dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | lcdc.h | 14 struct sunxi_lcdc_reg { struct
15 u32 ctrl; /* 0x00 */
16 u32 int0; /* 0x04 */
17 u32 int1; /* 0x08 */
18 u8 res0[0x04]; /* 0x0c */
22 u8 res1[4]; /* 0x3c */
23 u32 tcon0_ctrl; /* 0x40 */
24 u32 tcon0_dclk; /* 0x44 */
30 u8 res2[0x04]; /* 0x5c */
50 u8 res3[0x44]; /* 0xac */
[all …]
|