Searched hist:"92 d8df2f" (Results 1 – 1 of 1) sorted by relevance
| /freebsd/sys/dev/mlx5/mlx5_core/ |
| H A D | mlx5_eq.c | 92d8df2f Thu Jul 02 10:44:45 GMT 2020 Konstantin Belousov <kib@FreeBSD.org> mlx5_core: remove unneccessary LFENCE instruction.
Use fence instead of barrier, which is optimized to take advantage of
the x86 TSO memory model.
Reviewed by: hselasky
Sponsored by: Mellanox Technologies
MFC after: 1 week
92d8df2f Thu Jul 02 10:44:45 GMT 2020 Konstantin Belousov <kib@FreeBSD.org> mlx5_core: remove unneccessary LFENCE instruction.
Use fence instead of barrier, which is optimized to take advantage of
the x86 TSO memory model.
Reviewed by: hselasky
Sponsored by: Mellanox Technologies
MFC after: 1 week
92d8df2f Thu Jul 02 10:44:45 GMT 2020 Konstantin Belousov <kib@FreeBSD.org> mlx5_core: remove unneccessary LFENCE instruction.
Use fence instead of barrier, which is optimized to take advantage of
the x86 TSO memory model.
Reviewed by: hselasky
Sponsored by: Mellanox Technologies
MFC after: 1 week
92d8df2f Thu Jul 02 10:44:45 GMT 2020 Konstantin Belousov <kib@FreeBSD.org> mlx5_core: remove unneccessary LFENCE instruction.
Use fence instead of barrier, which is optimized to take advantage of
the x86 TSO memory model.
Reviewed by: hselasky
Sponsored by: Mellanox Technologies
MFC after: 1 week
92d8df2f Thu Jul 02 10:44:45 GMT 2020 Konstantin Belousov <kib@FreeBSD.org> mlx5_core: remove unneccessary LFENCE instruction.
Use fence instead of barrier, which is optimized to take advantage of
the x86 TSO memory model.
Reviewed by: hselasky
Sponsored by: Mellanox Technologies
MFC after: 1 week
92d8df2f Thu Jul 02 10:44:45 GMT 2020 Konstantin Belousov <kib@FreeBSD.org> mlx5_core: remove unneccessary LFENCE instruction.
Use fence instead of barrier, which is optimized to take advantage of
the x86 TSO memory model.
Reviewed by: hselasky
Sponsored by: Mellanox Technologies
MFC after: 1 week
92d8df2f Thu Jul 02 10:44:45 GMT 2020 Konstantin Belousov <kib@FreeBSD.org> mlx5_core: remove unneccessary LFENCE instruction.
Use fence instead of barrier, which is optimized to take advantage of
the x86 TSO memory model.
Reviewed by: hselasky
Sponsored by: Mellanox Technologies
MFC after: 1 week
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