Searched hist:"933 f73f1" (Results 1 – 3 of 3) sorted by relevance
| /qemu/include/hw/riscv/ |
| H A D | microchip_pfsoc.h | 933f73f1 Wed Oct 28 05:30:03 GMT 2020 Bin Meng <bin.meng@windriver.com> hw/riscv: microchip_pfsoc: Connect DDR memory controller modules
Connect DDR SGMII PHY module and CFG module to the PolarFire SoC.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 1603863010-15807-4-git-send-email-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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| /qemu/hw/riscv/ |
| H A D | Kconfig | 933f73f1 Wed Oct 28 05:30:03 GMT 2020 Bin Meng <bin.meng@windriver.com> hw/riscv: microchip_pfsoc: Connect DDR memory controller modules
Connect DDR SGMII PHY module and CFG module to the PolarFire SoC.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 1603863010-15807-4-git-send-email-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
|
| H A D | microchip_pfsoc.c | 933f73f1 Wed Oct 28 05:30:03 GMT 2020 Bin Meng <bin.meng@windriver.com> hw/riscv: microchip_pfsoc: Connect DDR memory controller modules
Connect DDR SGMII PHY module and CFG module to the PolarFire SoC.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 1603863010-15807-4-git-send-email-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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