Searched hist:"9 a6d4918" (Results 1 – 3 of 3) sorted by relevance
| /qemu/include/hw/arm/ |
| H A D | xlnx-versal.h | 9a6d4918 Fri Jan 21 16:11:33 GMT 2022 Francisco Iglesias <francisco.iglesias@xilinx.com> hw/arm/xlnx-versal: 'Or' the interrupts from the BBRAM and RTC models
Add an orgate and 'or' the interrupts from the BBRAM and RTC models.
Signed-off-by: Francisco Iglesias <francisco.iglesias@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Luc Michel <luc@lmichel.fr>
Message-id: 20220121161141.14389-3-francisco.iglesias@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
| /qemu/hw/arm/ |
| H A D | xlnx-versal-virt.c | 9a6d4918 Fri Jan 21 16:11:33 GMT 2022 Francisco Iglesias <francisco.iglesias@xilinx.com> hw/arm/xlnx-versal: 'Or' the interrupts from the BBRAM and RTC models
Add an orgate and 'or' the interrupts from the BBRAM and RTC models.
Signed-off-by: Francisco Iglesias <francisco.iglesias@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Luc Michel <luc@lmichel.fr>
Message-id: 20220121161141.14389-3-francisco.iglesias@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
| H A D | xlnx-versal.c | 9a6d4918 Fri Jan 21 16:11:33 GMT 2022 Francisco Iglesias <francisco.iglesias@xilinx.com> hw/arm/xlnx-versal: 'Or' the interrupts from the BBRAM and RTC models
Add an orgate and 'or' the interrupts from the BBRAM and RTC models.
Signed-off-by: Francisco Iglesias <francisco.iglesias@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Luc Michel <luc@lmichel.fr>
Message-id: 20220121161141.14389-3-francisco.iglesias@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|