Searched hist:d650e218 (Results 1 – 8 of 8) sorted by relevance
| /dragonfly/usr.sbin/pciconf/ |
| H A D | err.c | d650e218 Mon Oct 01 18:40:23 GMT 2018 Matthew Dillon <dillon@apollo.backplane.com> pciconf - Enhance output
* Add more registers defs from FreeBSD to pcireg.h
* Bring expanded pciconf code in form FreeBSD. This code
displays more configuration data for bridges and control
registers, and fixes a broken bus error reporting conditional.
* Also normalize SLT -> SLOT naming in pcireg.h
|
| H A D | pciconf.h | d650e218 Mon Oct 01 18:40:23 GMT 2018 Matthew Dillon <dillon@apollo.backplane.com> pciconf - Enhance output
* Add more registers defs from FreeBSD to pcireg.h
* Bring expanded pciconf code in form FreeBSD. This code
displays more configuration data for bridges and control
registers, and fixes a broken bus error reporting conditional.
* Also normalize SLT -> SLOT naming in pcireg.h
|
| H A D | cap.c | d650e218 Mon Oct 01 18:40:23 GMT 2018 Matthew Dillon <dillon@apollo.backplane.com> pciconf - Enhance output
* Add more registers defs from FreeBSD to pcireg.h
* Bring expanded pciconf code in form FreeBSD. This code
displays more configuration data for bridges and control
registers, and fixes a broken bus error reporting conditional.
* Also normalize SLT -> SLOT naming in pcireg.h
|
| H A D | Makefile | d650e218 Mon Oct 01 18:40:23 GMT 2018 Matthew Dillon <dillon@apollo.backplane.com> pciconf - Enhance output
* Add more registers defs from FreeBSD to pcireg.h
* Bring expanded pciconf code in form FreeBSD. This code
displays more configuration data for bridges and control
registers, and fixes a broken bus error reporting conditional.
* Also normalize SLT -> SLOT naming in pcireg.h
|
| H A D | pciconf.c | d650e218 Mon Oct 01 18:40:23 GMT 2018 Matthew Dillon <dillon@apollo.backplane.com> pciconf - Enhance output
* Add more registers defs from FreeBSD to pcireg.h
* Bring expanded pciconf code in form FreeBSD. This code
displays more configuration data for bridges and control
registers, and fixes a broken bus error reporting conditional.
* Also normalize SLT -> SLOT naming in pcireg.h
|
| /dragonfly/sys/bus/pci/ |
| H A D | pci_pci.c | d650e218 Mon Oct 01 18:40:23 GMT 2018 Matthew Dillon <dillon@apollo.backplane.com> pciconf - Enhance output
* Add more registers defs from FreeBSD to pcireg.h
* Bring expanded pciconf code in form FreeBSD. This code
displays more configuration data for bridges and control
registers, and fixes a broken bus error reporting conditional.
* Also normalize SLT -> SLOT naming in pcireg.h
|
| H A D | pci.c | d650e218 Mon Oct 01 18:40:23 GMT 2018 Matthew Dillon <dillon@apollo.backplane.com> pciconf - Enhance output
* Add more registers defs from FreeBSD to pcireg.h
* Bring expanded pciconf code in form FreeBSD. This code
displays more configuration data for bridges and control
registers, and fixes a broken bus error reporting conditional.
* Also normalize SLT -> SLOT naming in pcireg.h
|
| H A D | pcireg.h | d650e218 Mon Oct 01 18:40:23 GMT 2018 Matthew Dillon <dillon@apollo.backplane.com> pciconf - Enhance output
* Add more registers defs from FreeBSD to pcireg.h
* Bring expanded pciconf code in form FreeBSD. This code
displays more configuration data for bridges and control
registers, and fixes a broken bus error reporting conditional.
* Also normalize SLT -> SLOT naming in pcireg.h
|