Searched hist:d6ccfc7e (Results 1 – 2 of 2) sorted by relevance
| /qemu/include/hw/arm/ |
| H A D | xlnx-versal.h | d6ccfc7e Wed Apr 06 17:43:03 GMT 2022 Edgar E. Iglesias <edgar.iglesias@amd.com> hw/arm: versal: Connect the CRL
Connect the CRL (Clock Reset LPD) to the Versal SoC.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Reviewed-by: Frederic Konrad <fkonrad@amd.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>
Message-id: 20220406174303.2022038-5-edgar.iglesias@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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| /qemu/hw/arm/ |
| H A D | xlnx-versal.c | d6ccfc7e Wed Apr 06 17:43:03 GMT 2022 Edgar E. Iglesias <edgar.iglesias@amd.com> hw/arm: versal: Connect the CRL
Connect the CRL (Clock Reset LPD) to the Versal SoC.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Reviewed-by: Frederic Konrad <fkonrad@amd.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>
Message-id: 20220406174303.2022038-5-edgar.iglesias@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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