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Searched refs:CONFIG_SYS_DDR_TIMING_3_800 (Results 151 – 175 of 231) sorted by relevance

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/dports/sysutils/u-boot-pinebookpro/u-boot-2021.07/board/freescale/p1010rdb/
H A Dddr.c26 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_800,
/dports/sysutils/u-boot-qemu-riscv64/u-boot-2021.07/board/freescale/p1010rdb/
H A Dddr.c26 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_800,
/dports/sysutils/u-boot-qemu-arm/u-boot-2021.07/board/freescale/p1010rdb/
H A Dddr.c26 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_800,
/dports/sysutils/u-boot-rpi/u-boot-2021.07/board/freescale/p1010rdb/
H A Dddr.c26 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_800,
/dports/sysutils/u-boot-rpi-arm64/u-boot-2021.07/board/freescale/p1010rdb/
H A Dddr.c26 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_800,
/dports/sysutils/u-boot-rpi2/u-boot-2021.07/board/freescale/p1010rdb/
H A Dddr.c26 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_800,
/dports/sysutils/u-boot-riotboard/u-boot-2021.07/board/freescale/p1010rdb/
H A Dddr.c26 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_800,
/dports/sysutils/u-boot-rock-pi-4/u-boot-2021.07/board/freescale/p1010rdb/
H A Dddr.c26 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_800,
/dports/sysutils/u-boot-rpi3/u-boot-2021.07/board/freescale/p1010rdb/
H A Dddr.c26 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_800,
/dports/sysutils/u-boot-rock64/u-boot-2021.07/board/freescale/p1010rdb/
H A Dddr.c26 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_800,
/dports/sysutils/u-boot-utilite/u-boot-2015.07/include/configs/
H A DBSC9131RDB.h122 #define CONFIG_SYS_DDR_TIMING_3_800 0x00030000 macro
/dports/sysutils/u-boot-tools/u-boot-2020.07/include/configs/
H A DBSC9132QDS.h136 #define CONFIG_SYS_DDR_TIMING_3_800 0x00020000 macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/include/configs/
H A DBSC9132QDS.h144 #define CONFIG_SYS_DDR_TIMING_3_800 0x00020000 macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/include/configs/
H A DBSC9132QDS.h144 #define CONFIG_SYS_DDR_TIMING_3_800 0x00020000 macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/include/configs/
H A DBSC9132QDS.h144 #define CONFIG_SYS_DDR_TIMING_3_800 0x00020000 macro
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/include/configs/
H A DBSC9132QDS.h144 #define CONFIG_SYS_DDR_TIMING_3_800 0x00020000 macro
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/include/configs/
H A DBSC9132QDS.h144 #define CONFIG_SYS_DDR_TIMING_3_800 0x00020000 macro
/dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/include/configs/
H A DP1010RDB.h232 #define CONFIG_SYS_DDR_TIMING_3_800 0x00030000 macro
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/include/configs/
H A DP1010RDB.h232 #define CONFIG_SYS_DDR_TIMING_3_800 0x00030000 macro
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/include/configs/
H A DP1010RDB.h232 #define CONFIG_SYS_DDR_TIMING_3_800 0x00030000 macro
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/include/configs/
H A DP1010RDB.h232 #define CONFIG_SYS_DDR_TIMING_3_800 0x00030000 macro
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/include/configs/
H A DP1010RDB.h232 #define CONFIG_SYS_DDR_TIMING_3_800 0x00030000 macro
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/include/configs/
H A DP1010RDB.h232 #define CONFIG_SYS_DDR_TIMING_3_800 0x00030000 macro
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/include/configs/
H A DP1010RDB.h232 #define CONFIG_SYS_DDR_TIMING_3_800 0x00030000 macro
/dports/sysutils/u-boot-sopine/u-boot-2021.07/include/configs/
H A DP1010RDB.h232 #define CONFIG_SYS_DDR_TIMING_3_800 0x00030000 macro

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