| /dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/arm/mach-imx/mx5/ |
| H A D | clock.c | 677 writel(ccsr | MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
683 writel(ccsr & ~MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
|
| /dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/arch/arm/mach-imx/mx5/ |
| H A D | clock.c | 677 writel(ccsr | MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
683 writel(ccsr & ~MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
|
| /dports/sysutils/u-boot-pcduino3/u-boot-2021.07/arch/arm/mach-imx/mx5/ |
| H A D | clock.c | 677 writel(ccsr | MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
683 writel(ccsr & ~MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
|
| /dports/sysutils/u-boot-pine-h64/u-boot-2021.07/arch/arm/mach-imx/mx5/ |
| H A D | clock.c | 677 writel(ccsr | MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
683 writel(ccsr & ~MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
|
| /dports/sysutils/u-boot-pine64/u-boot-2021.07/arch/arm/mach-imx/mx5/ |
| H A D | clock.c | 677 writel(ccsr | MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
683 writel(ccsr & ~MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
|
| /dports/sysutils/u-boot-pinebookpro/u-boot-2021.07/arch/arm/mach-imx/mx5/ |
| H A D | clock.c | 677 writel(ccsr | MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
683 writel(ccsr & ~MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
|
| /dports/sysutils/u-boot-pinebook/u-boot-2021.07/arch/arm/mach-imx/mx5/ |
| H A D | clock.c | 677 writel(ccsr | MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
683 writel(ccsr & ~MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
|
| /dports/sysutils/u-boot-pine64-lts/u-boot-2021.07/arch/arm/mach-imx/mx5/ |
| H A D | clock.c | 677 writel(ccsr | MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
683 writel(ccsr & ~MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/arm/mach-imx/mx5/ |
| H A D | clock.c | 677 writel(ccsr | MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
683 writel(ccsr & ~MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
|
| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/arch/arm/mach-imx/mx5/ |
| H A D | clock.c | 677 writel(ccsr | MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
683 writel(ccsr & ~MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
|
| /dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/arch/arm/mach-imx/mx5/ |
| H A D | clock.c | 677 writel(ccsr | MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
683 writel(ccsr & ~MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
|
| /dports/emulators/qemu/qemu-6.2.0/roms/u-boot/arch/arm/mach-imx/mx5/ |
| H A D | clock.c | 677 writel(ccsr | MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
683 writel(ccsr & ~MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
|
| /dports/sysutils/u-boot-orangepi-pc2/u-boot-2021.07/arch/arm/mach-imx/mx5/ |
| H A D | clock.c | 677 writel(ccsr | MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
683 writel(ccsr & ~MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
|
| /dports/sysutils/u-boot-orangepi-plus-2e/u-boot-2021.07/arch/arm/mach-imx/mx5/ |
| H A D | clock.c | 677 writel(ccsr | MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
683 writel(ccsr & ~MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/mach-imx/mx5/ |
| H A D | clock.c | 677 writel(ccsr | MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
683 writel(ccsr & ~MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
|
| /dports/sysutils/u-boot-orangepi-one/u-boot-2021.07/arch/arm/mach-imx/mx5/ |
| H A D | clock.c | 677 writel(ccsr | MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
683 writel(ccsr & ~MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
|
| /dports/sysutils/u-boot-orangepi-pc/u-boot-2021.07/arch/arm/mach-imx/mx5/ |
| H A D | clock.c | 677 writel(ccsr | MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
683 writel(ccsr & ~MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
|
| /dports/sysutils/u-boot-orangepi-pc-plus/u-boot-2021.07/arch/arm/mach-imx/mx5/ |
| H A D | clock.c | 677 writel(ccsr | MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
683 writel(ccsr & ~MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
|
| /dports/sysutils/u-boot-beaglebone/u-boot-2021.07/arch/arm/mach-imx/mx5/ |
| H A D | clock.c | 677 writel(ccsr | MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
683 writel(ccsr & ~MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
|
| /dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/arm/cpu/armv7/mx5/ |
| H A D | clock.c | 676 writel(ccsr | MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
682 writel(ccsr & ~MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
|
| /dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/mach-imx/mx5/ |
| H A D | clock.c | 677 writel(ccsr | MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
683 writel(ccsr & ~MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
|
| /dports/sysutils/u-boot-bananapim2/u-boot-2021.07/arch/arm/mach-imx/mx5/ |
| H A D | clock.c | 677 writel(ccsr | MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
683 writel(ccsr & ~MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
|
| /dports/sysutils/u-boot-tools/u-boot-2020.07/arch/arm/mach-imx/mx5/ |
| H A D | clock.c | 677 writel(ccsr | MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
683 writel(ccsr & ~MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/mach-imx/mx5/ |
| H A D | clock.c | 677 writel(ccsr | MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
683 writel(ccsr & ~MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
|
| /dports/sysutils/u-boot-sifive-fu540/u-boot-2021.07/arch/arm/mach-imx/mx5/ |
| H A D | clock.c | 677 writel(ccsr | MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
683 writel(ccsr & ~MXC_CCM_CCSR_PLL3_SW_CLK_SEL, in config_pll_clk()
|