| /dports/emulators/qemu42/qemu-4.2.1/roms/skiboot/doc/opal-api/ |
| H A D | opal_nx_coproc_init-167.rst | 11 with wrong offset in RxFIFO which could cause NX request failures.
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/skiboot/doc/opal-api/ |
| H A D | opal_nx_coproc_init-167.rst | 11 with wrong offset in RxFIFO which could cause NX request failures.
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/skiboot/doc/opal-api/ |
| H A D | opal_nx_coproc_init-167.rst | 11 with wrong offset in RxFIFO which could cause NX request failures.
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/skiboot/doc/opal-api/ |
| H A D | opal_nx_coproc_init-167.rst | 11 with wrong offset in RxFIFO which could cause NX request failures.
|
| /dports/emulators/qemu/qemu-6.2.0/roms/skiboot/doc/opal-api/ |
| H A D | opal_nx_coproc_init-167.rst | 11 with wrong offset in RxFIFO which could cause NX request failures.
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/skiboot/doc/opal-api/ |
| H A D | opal_nx_coproc_init-167.rst | 11 with wrong offset in RxFIFO which could cause NX request failures.
|
| /dports/devel/asl/asl-current/include/coldfire/ |
| H A D | mcf547x.inc | 865 FU cfbit PSCSR{N},9 ; This field signifies that the RxFIFO is full.
889 RXRDY_FU cffield PSCISR{N},9 ; RxFIFO over threshold/Receive data is ready.
931 PSCRFCNT{N} equ Base+$58 ; PSC RxFIFO Counter Register (16b)
935 PSCRFDR{N} equ Base+$60 ; PSC RxFIFO Data Register (32b)
936 PSCRFSR{N} equ Base+$64 ; PSC RxFIFO Status Register (16b)
937 PSCRFCR{N} equ Base+$68 ; PSC RxFIFO Control Register (16b)
938 PSCRFAR{N} equ Base+$6e ; PSC RxFIFO Alarm Register (16b)
939 PSCRFRP{N} equ Base+$72 ; PSC RxFIFO Read Pointer (16b)
940 PSCRFWP{N} equ Base+$76 ; PSC RxFIFO Write Pointer (16b)
941 PSCRLRFP{N} equ Base+$7a ; PSC RxFIFO Last Read Frame Pointer (16b)
[all …]
|
| /dports/net-mgmt/observium/observium/mibs/bintec/ |
| H A D | BIANCA-BRICK-X21-MIB | 257 32-character RxFIFO may fill up. This leads to loss of
|
| H A D | BIANCA-BRICK-E3-MIB | 305 RxFIFO may fill up. This leads to loss of data."
|
| H A D | BIANCA-BRICK-SERIAL-MIB | 435 RxFIFO may fill up. This leads to loss of data."
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/skiboot/doc/release-notes/ |
| H A D | skiboot-6.1-rc1.rst | 352 by FIFO size whenever CRB read by NX. But the index in RxFIFO has to
356 of mismatch between RxFIFO control register and VAS entries in kernel.
360 readOffset (4:11) and Queued (15:23) in RxFIFO control register.
|
| H A D | skiboot-6.1.rst | 425 by FIFO size whenever CRB read by NX. But the index in RxFIFO has to
429 of mismatch between RxFIFO control register and VAS entries in kernel.
433 readOffset (4:11) and Queued (15:23) in RxFIFO control register.
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/skiboot/doc/release-notes/ |
| H A D | skiboot-6.1-rc1.rst | 352 by FIFO size whenever CRB read by NX. But the index in RxFIFO has to
356 of mismatch between RxFIFO control register and VAS entries in kernel.
360 readOffset (4:11) and Queued (15:23) in RxFIFO control register.
|
| H A D | skiboot-6.1.rst | 425 by FIFO size whenever CRB read by NX. But the index in RxFIFO has to
429 of mismatch between RxFIFO control register and VAS entries in kernel.
433 readOffset (4:11) and Queued (15:23) in RxFIFO control register.
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/skiboot/doc/release-notes/ |
| H A D | skiboot-6.1-rc1.rst | 352 by FIFO size whenever CRB read by NX. But the index in RxFIFO has to
356 of mismatch between RxFIFO control register and VAS entries in kernel.
360 readOffset (4:11) and Queued (15:23) in RxFIFO control register.
|
| H A D | skiboot-6.1.rst | 425 by FIFO size whenever CRB read by NX. But the index in RxFIFO has to
429 of mismatch between RxFIFO control register and VAS entries in kernel.
433 readOffset (4:11) and Queued (15:23) in RxFIFO control register.
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/skiboot/doc/release-notes/ |
| H A D | skiboot-6.1-rc1.rst | 352 by FIFO size whenever CRB read by NX. But the index in RxFIFO has to
356 of mismatch between RxFIFO control register and VAS entries in kernel.
360 readOffset (4:11) and Queued (15:23) in RxFIFO control register.
|
| H A D | skiboot-6.1.rst | 425 by FIFO size whenever CRB read by NX. But the index in RxFIFO has to
429 of mismatch between RxFIFO control register and VAS entries in kernel.
433 readOffset (4:11) and Queued (15:23) in RxFIFO control register.
|
| /dports/emulators/qemu/qemu-6.2.0/roms/skiboot/doc/release-notes/ |
| H A D | skiboot-6.1-rc1.rst | 352 by FIFO size whenever CRB read by NX. But the index in RxFIFO has to
356 of mismatch between RxFIFO control register and VAS entries in kernel.
360 readOffset (4:11) and Queued (15:23) in RxFIFO control register.
|
| H A D | skiboot-6.1.rst | 425 by FIFO size whenever CRB read by NX. But the index in RxFIFO has to
429 of mismatch between RxFIFO control register and VAS entries in kernel.
433 readOffset (4:11) and Queued (15:23) in RxFIFO control register.
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/skiboot/doc/release-notes/ |
| H A D | skiboot-6.1-rc1.rst | 352 by FIFO size whenever CRB read by NX. But the index in RxFIFO has to
356 of mismatch between RxFIFO control register and VAS entries in kernel.
360 readOffset (4:11) and Queued (15:23) in RxFIFO control register.
|
| H A D | skiboot-6.1.rst | 425 by FIFO size whenever CRB read by NX. But the index in RxFIFO has to
429 of mismatch between RxFIFO control register and VAS entries in kernel.
433 readOffset (4:11) and Queued (15:23) in RxFIFO control register.
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/edk2/MdePkg/Include/IndustryStandard/ |
| H A D | Acpi50.h | 127 UINT16 RxFIFO;
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/edk2/MdePkg/Include/IndustryStandard/ |
| H A D | Acpi50.h | 126 UINT16 RxFIFO;
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/ipxe/src/include/ipxe/efi/IndustryStandard/ |
| H A D | Acpi50.h | 134 UINT16 RxFIFO;
|