/dports/lang/gcc10-devel/gcc-10-20211008/gcc/testsuite/gnat.dg/ |
H A D | bias1.adb | 26 SPR : SomePackedRecord := (R => -4, S => -5); variable
|
/dports/misc/cxx_atomics_pic/gcc-11.2.0/gcc/testsuite/gnat.dg/ |
H A D | bias1.adb | 26 SPR : SomePackedRecord := (R => -4, S => -5); variable
|
/dports/biology/biosig/biosig-2.3.3/biosig4matlab/t200_FileAccess/ |
H A D | sseek.m | 69 HDR.FILE.POS = HDR.NRec*HDR.SPR+offset; 72 elseif HDR.FILE.POS > HDR.NRec*HDR.SPR, 73 HDR.FILE.POS = HDR.NRec*HDR.SPR;
|
H A D | fltopen.m | 78 HDR.SPR = HDR.FLT.Dataformat.number_of_samples; 277 if (HDR.AS.bpb*HDR.NRec*HDR.SPR) ~= HDR.FILE.size, 284 if (HDR.AS.bpb*HDR.NRec*HDR.SPR) ~= HDR.FILE.size, 291 if (HDR.AS.bpb*HDR.NRec*HDR.SPR) ~= HDR.FILE.size, 294 …ntf(HDR.FILE.stderr,'\tFilesize:\t%i is not %i bytes\n',HDR.FILE.size,HDR.AS.bpb*HDR.NRec*HDR.SPR); 295 fprintf(HDR.FILE.stderr,'\tSamples:\t%i\n',HDR.NRec*HDR.SPR); 298 HDR.SPR = floor(HDR.AS.endpos/HDR.NRec); 373 [HDR.SPR,HDR.NS]=size(HDR.data); 376 fprintf(fid,'number_of_samples=%i\n',HDR.NRec*HDR.SPR);
|
/dports/biology/hyphy/hyphy-2.5.33/res/TemplateBatchFiles/ |
H A D | SequentialAddition.bf | 57 …"Complete SPR","Subtree pruning and regrafting is performed after EACH sequence is added. Order (s… 59 …"Global SPR","Subtree pruning and regrafting is performed after ALL the sequences have been added.… 60 …"NNI+SPR","Nearest neighbor interchange is performed after EACH sequence is added. Subtree pruning…
|
/dports/science/InsightToolkit/ITK-5.0.1/Modules/IO/Stimulate/ |
H A D | itk-module.cmake | 3 Stimulate (SDT/SPR)</a> images.")
|
/dports/science/aircraft-datcom/aircraft-datcom-ed877bb/src/ |
H A D | dflcon.f | 7 COMMON /POWR/ SPR(59) local 11 EQUIVALENCE (SPR(12),CLD),(SPR(13),CLLD),(SPR(17),CMD), 12 1 (SPR(18),CHD)
|
/dports/emulators/qemu/qemu-6.2.0/capstone/suite/synctools/tablegen/ARM/ |
H A D | ARMRegisterBanks.td | 14 def FPRRegBank : RegisterBank<"FPRB", [HPR, SPR, DPR, QPR]>;
|
/dports/emulators/qemu60/qemu-6.0.0/capstone/suite/synctools/tablegen/ARM/ |
H A D | ARMRegisterBanks.td | 14 def FPRRegBank : RegisterBank<"FPRB", [HPR, SPR, DPR, QPR]>;
|
/dports/cad/gmsh/gmsh-4.9.2-source/contrib/hxt/tetMesh/src/ |
H A D | hxt_tetOptiUtils.h | 60 } SPR; member
|
/dports/emulators/qemu5/qemu-5.2.0/capstone/suite/synctools/tablegen/ARM/ |
H A D | ARMRegisterBanks.td | 14 def FPRRegBank : RegisterBank<"FPRB", [HPR, SPR, DPR, QPR]>;
|
/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/ARM/ |
H A D | ARMRegisterBanks.td | 14 def FPRRegBank : RegisterBank<"FPRB", [HPR, SPR, DPR, QPR]>;
|
/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/ARM/ |
H A D | ARMRegisterBanks.td | 14 def FPRRegBank : RegisterBank<"FPRB", [HPR, SPR, DPR, QPR]>;
|
/dports/science/cdf/cdf33_0-dist/src/lib/ |
H A D | cdfwrite.c | 934 struct SPRstruct *SPR = va_arg (ap, struct SPRstruct *); int i; in WriteSPR() local 936 if (!Write32(fp,&(SPR->RecordSize))) return CWE; in WriteSPR() 937 if (!Write32(fp,&(SPR->RecordType))) return CWE; in WriteSPR() 938 if (!Write32(fp,&(SPR->sArraysType))) return CWE; in WriteSPR() 939 if (!Write32(fp,&(SPR->rfuA))) return CWE; in WriteSPR() 940 if (!Write32(fp,&(SPR->pCount))) return CWE; in WriteSPR() 941 for (i = 0; i < SPR->pCount; i++) { in WriteSPR() 942 if (!Write32(fp,&(SPR->sArraysParms[i]))) return CWE; in WriteSPR()
|
/dports/java/springframework31/spring-framework-3.1.4.RELEASE/projects/ |
H A D | ci-build.properties | 1 …n at http://build.springframework.org/build/admin/buildConfiguration.action?buildKey=SPR-TRUNKQUICK
|
/dports/emulators/qemu/qemu-6.2.0/target/ppc/ |
H A D | trace-events | 4 kvm_failed_spr_set(int spr, const char *msg) "Warning: Unable to set SPR %d to KVM: %s" 5 kvm_failed_spr_get(int spr, const char *msg) "Warning: Unable to retrieve SPR %d from KVM: %s"
|
/dports/biology/biosig/biosig-2.3.3/biosig4matlab/demo/ |
H A D | batch.m | 49 T = (1:HDR.SPR)/HDR.SampleRate; 81 tmp = reshape(s',[size(s,1),HDR.SPR,HDR.NRec]);
|
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/ARM/ |
H A D | ARMRegisterBanks.td | 13 def FPRRegBank : RegisterBank<"FPRB", [HPR, SPR, DPR, QPR]>;
|
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/ARM/ |
H A D | ARMRegisterBanks.td | 13 def FPRRegBank : RegisterBank<"FPRB", [HPR, SPR, DPR, QPR]>;
|
/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/ARM/ |
H A D | ARMRegisterBanks.td | 13 def FPRRegBank : RegisterBank<"FPRB", [HPR, SPR, DPR, QPR]>;
|
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMRegisterBanks.td | 13 def FPRRegBank : RegisterBank<"FPRB", [HPR, SPR, DPR, QPR]>;
|
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/ARM/ |
H A D | ARMRegisterBanks.td | 13 def FPRRegBank : RegisterBank<"FPRB", [HPR, SPR, DPR, QPR]>;
|
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMRegisterBanks.td | 13 def FPRRegBank : RegisterBank<"FPRB", [HPR, SPR, DPR, QPR]>;
|
/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/ARM/ |
H A D | ARMRegisterBanks.td | 13 def FPRRegBank : RegisterBank<"FPRB", [HPR, SPR, DPR, QPR]>;
|
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
H A D | ARMRegisterBanks.td | 13 def FPRRegBank : RegisterBank<"FPRB", [HPR, SPR, DPR, QPR]>;
|