| /dports/sysutils/u-boot-sifive-fu540/u-boot-2021.07/arch/arm/dts/ |
| H A D | sun6i-a31.dtsi | 69 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
70 <&ccu CLK_AHB1_HDMI>, <&ccu CLK_DRAM_BE0>,
71 <&ccu CLK_IEP_DRC0>, <&ccu CLK_BE0>,
72 <&ccu CLK_LCD0_CH1>, <&ccu CLK_HDMI>;
80 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
81 <&ccu CLK_DRAM_BE0>, <&ccu CLK_IEP_DRC0>,
82 <&ccu CLK_BE0>, <&ccu CLK_LCD0_CH0>;
428 clocks = <&ccu CLK_AHB1_HDMI>, <&ccu CLK_HDMI>,
912 clocks = <&ccu CLK_AHB1_SS>, <&ccu CLK_SS>;
1006 clocks = <&ccu CLK_AHB1_FE0>, <&ccu CLK_FE0>,
[all …]
|
| /dports/sysutils/u-boot-rpi4/u-boot-2021.07/arch/arm/dts/ |
| H A D | sun6i-a31.dtsi | 69 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
70 <&ccu CLK_AHB1_HDMI>, <&ccu CLK_DRAM_BE0>,
71 <&ccu CLK_IEP_DRC0>, <&ccu CLK_BE0>,
72 <&ccu CLK_LCD0_CH1>, <&ccu CLK_HDMI>;
80 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
81 <&ccu CLK_DRAM_BE0>, <&ccu CLK_IEP_DRC0>,
82 <&ccu CLK_BE0>, <&ccu CLK_LCD0_CH0>;
428 clocks = <&ccu CLK_AHB1_HDMI>, <&ccu CLK_HDMI>,
912 clocks = <&ccu CLK_AHB1_SS>, <&ccu CLK_SS>;
1006 clocks = <&ccu CLK_AHB1_FE0>, <&ccu CLK_FE0>,
[all …]
|
| /dports/sysutils/u-boot-rockpro64/u-boot-2021.07/arch/arm/dts/ |
| H A D | sun6i-a31.dtsi | 69 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
70 <&ccu CLK_AHB1_HDMI>, <&ccu CLK_DRAM_BE0>,
71 <&ccu CLK_IEP_DRC0>, <&ccu CLK_BE0>,
72 <&ccu CLK_LCD0_CH1>, <&ccu CLK_HDMI>;
80 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
81 <&ccu CLK_DRAM_BE0>, <&ccu CLK_IEP_DRC0>,
82 <&ccu CLK_BE0>, <&ccu CLK_LCD0_CH0>;
428 clocks = <&ccu CLK_AHB1_HDMI>, <&ccu CLK_HDMI>,
912 clocks = <&ccu CLK_AHB1_SS>, <&ccu CLK_SS>;
1006 clocks = <&ccu CLK_AHB1_FE0>, <&ccu CLK_FE0>,
[all …]
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/arch/arm/dts/ |
| H A D | sun6i-a31.dtsi | 69 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
70 <&ccu CLK_AHB1_HDMI>, <&ccu CLK_DRAM_BE0>,
71 <&ccu CLK_IEP_DRC0>, <&ccu CLK_BE0>,
72 <&ccu CLK_LCD0_CH1>, <&ccu CLK_HDMI>;
80 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
81 <&ccu CLK_DRAM_BE0>, <&ccu CLK_IEP_DRC0>,
82 <&ccu CLK_BE0>, <&ccu CLK_LCD0_CH0>;
428 clocks = <&ccu CLK_AHB1_HDMI>, <&ccu CLK_HDMI>,
912 clocks = <&ccu CLK_AHB1_SS>, <&ccu CLK_SS>;
1006 clocks = <&ccu CLK_AHB1_FE0>, <&ccu CLK_FE0>,
[all …]
|
| /dports/sysutils/u-boot-rpi/u-boot-2021.07/arch/arm/dts/ |
| H A D | sun6i-a31.dtsi | 69 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
70 <&ccu CLK_AHB1_HDMI>, <&ccu CLK_DRAM_BE0>,
71 <&ccu CLK_IEP_DRC0>, <&ccu CLK_BE0>,
72 <&ccu CLK_LCD0_CH1>, <&ccu CLK_HDMI>;
80 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
81 <&ccu CLK_DRAM_BE0>, <&ccu CLK_IEP_DRC0>,
82 <&ccu CLK_BE0>, <&ccu CLK_LCD0_CH0>;
428 clocks = <&ccu CLK_AHB1_HDMI>, <&ccu CLK_HDMI>,
912 clocks = <&ccu CLK_AHB1_SS>, <&ccu CLK_SS>;
1006 clocks = <&ccu CLK_AHB1_FE0>, <&ccu CLK_FE0>,
[all …]
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/dts/ |
| H A D | sun6i-a31.dtsi | 69 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
70 <&ccu CLK_AHB1_HDMI>, <&ccu CLK_DRAM_BE0>,
71 <&ccu CLK_IEP_DRC0>, <&ccu CLK_BE0>,
72 <&ccu CLK_LCD0_CH1>, <&ccu CLK_HDMI>;
80 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
81 <&ccu CLK_DRAM_BE0>, <&ccu CLK_IEP_DRC0>,
82 <&ccu CLK_BE0>, <&ccu CLK_LCD0_CH0>;
428 clocks = <&ccu CLK_AHB1_HDMI>, <&ccu CLK_HDMI>,
912 clocks = <&ccu CLK_AHB1_SS>, <&ccu CLK_SS>;
1006 clocks = <&ccu CLK_AHB1_FE0>, <&ccu CLK_FE0>,
[all …]
|
| /dports/sysutils/u-boot-qemu-arm/u-boot-2021.07/arch/arm/dts/ |
| H A D | sun6i-a31.dtsi | 69 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
70 <&ccu CLK_AHB1_HDMI>, <&ccu CLK_DRAM_BE0>,
71 <&ccu CLK_IEP_DRC0>, <&ccu CLK_BE0>,
72 <&ccu CLK_LCD0_CH1>, <&ccu CLK_HDMI>;
80 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
81 <&ccu CLK_DRAM_BE0>, <&ccu CLK_IEP_DRC0>,
82 <&ccu CLK_BE0>, <&ccu CLK_LCD0_CH0>;
428 clocks = <&ccu CLK_AHB1_HDMI>, <&ccu CLK_HDMI>,
912 clocks = <&ccu CLK_AHB1_SS>, <&ccu CLK_SS>;
1006 clocks = <&ccu CLK_AHB1_FE0>, <&ccu CLK_FE0>,
[all …]
|
| /dports/sysutils/u-boot-riotboard/u-boot-2021.07/arch/arm/dts/ |
| H A D | sun6i-a31.dtsi | 69 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
70 <&ccu CLK_AHB1_HDMI>, <&ccu CLK_DRAM_BE0>,
71 <&ccu CLK_IEP_DRC0>, <&ccu CLK_BE0>,
72 <&ccu CLK_LCD0_CH1>, <&ccu CLK_HDMI>;
80 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
81 <&ccu CLK_DRAM_BE0>, <&ccu CLK_IEP_DRC0>,
82 <&ccu CLK_BE0>, <&ccu CLK_LCD0_CH0>;
428 clocks = <&ccu CLK_AHB1_HDMI>, <&ccu CLK_HDMI>,
912 clocks = <&ccu CLK_AHB1_SS>, <&ccu CLK_SS>;
1006 clocks = <&ccu CLK_AHB1_FE0>, <&ccu CLK_FE0>,
[all …]
|
| /dports/sysutils/u-boot-rock-pi-4/u-boot-2021.07/arch/arm/dts/ |
| H A D | sun6i-a31.dtsi | 69 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
70 <&ccu CLK_AHB1_HDMI>, <&ccu CLK_DRAM_BE0>,
71 <&ccu CLK_IEP_DRC0>, <&ccu CLK_BE0>,
72 <&ccu CLK_LCD0_CH1>, <&ccu CLK_HDMI>;
80 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
81 <&ccu CLK_DRAM_BE0>, <&ccu CLK_IEP_DRC0>,
82 <&ccu CLK_BE0>, <&ccu CLK_LCD0_CH0>;
428 clocks = <&ccu CLK_AHB1_HDMI>, <&ccu CLK_HDMI>,
912 clocks = <&ccu CLK_AHB1_SS>, <&ccu CLK_SS>;
1006 clocks = <&ccu CLK_AHB1_FE0>, <&ccu CLK_FE0>,
[all …]
|
| /dports/sysutils/u-boot-rpi2/u-boot-2021.07/arch/arm/dts/ |
| H A D | sun6i-a31.dtsi | 69 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
70 <&ccu CLK_AHB1_HDMI>, <&ccu CLK_DRAM_BE0>,
71 <&ccu CLK_IEP_DRC0>, <&ccu CLK_BE0>,
72 <&ccu CLK_LCD0_CH1>, <&ccu CLK_HDMI>;
80 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
81 <&ccu CLK_DRAM_BE0>, <&ccu CLK_IEP_DRC0>,
82 <&ccu CLK_BE0>, <&ccu CLK_LCD0_CH0>;
428 clocks = <&ccu CLK_AHB1_HDMI>, <&ccu CLK_HDMI>,
912 clocks = <&ccu CLK_AHB1_SS>, <&ccu CLK_SS>;
1006 clocks = <&ccu CLK_AHB1_FE0>, <&ccu CLK_FE0>,
[all …]
|
| /dports/sysutils/u-boot-rpi-arm64/u-boot-2021.07/arch/arm/dts/ |
| H A D | sun6i-a31.dtsi | 69 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
70 <&ccu CLK_AHB1_HDMI>, <&ccu CLK_DRAM_BE0>,
71 <&ccu CLK_IEP_DRC0>, <&ccu CLK_BE0>,
72 <&ccu CLK_LCD0_CH1>, <&ccu CLK_HDMI>;
80 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
81 <&ccu CLK_DRAM_BE0>, <&ccu CLK_IEP_DRC0>,
82 <&ccu CLK_BE0>, <&ccu CLK_LCD0_CH0>;
428 clocks = <&ccu CLK_AHB1_HDMI>, <&ccu CLK_HDMI>,
912 clocks = <&ccu CLK_AHB1_SS>, <&ccu CLK_SS>;
1006 clocks = <&ccu CLK_AHB1_FE0>, <&ccu CLK_FE0>,
[all …]
|
| /dports/sysutils/u-boot-rock64/u-boot-2021.07/arch/arm/dts/ |
| H A D | sun6i-a31.dtsi | 69 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
70 <&ccu CLK_AHB1_HDMI>, <&ccu CLK_DRAM_BE0>,
71 <&ccu CLK_IEP_DRC0>, <&ccu CLK_BE0>,
72 <&ccu CLK_LCD0_CH1>, <&ccu CLK_HDMI>;
80 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
81 <&ccu CLK_DRAM_BE0>, <&ccu CLK_IEP_DRC0>,
82 <&ccu CLK_BE0>, <&ccu CLK_LCD0_CH0>;
428 clocks = <&ccu CLK_AHB1_HDMI>, <&ccu CLK_HDMI>,
912 clocks = <&ccu CLK_AHB1_SS>, <&ccu CLK_SS>;
1006 clocks = <&ccu CLK_AHB1_FE0>, <&ccu CLK_FE0>,
[all …]
|
| /dports/sysutils/u-boot-rpi3/u-boot-2021.07/arch/arm/dts/ |
| H A D | sun6i-a31.dtsi | 69 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
70 <&ccu CLK_AHB1_HDMI>, <&ccu CLK_DRAM_BE0>,
71 <&ccu CLK_IEP_DRC0>, <&ccu CLK_BE0>,
72 <&ccu CLK_LCD0_CH1>, <&ccu CLK_HDMI>;
80 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
81 <&ccu CLK_DRAM_BE0>, <&ccu CLK_IEP_DRC0>,
82 <&ccu CLK_BE0>, <&ccu CLK_LCD0_CH0>;
428 clocks = <&ccu CLK_AHB1_HDMI>, <&ccu CLK_HDMI>,
912 clocks = <&ccu CLK_AHB1_SS>, <&ccu CLK_SS>;
1006 clocks = <&ccu CLK_AHB1_FE0>, <&ccu CLK_FE0>,
[all …]
|
| /dports/sysutils/u-boot-rpi3-32/u-boot-2021.07/arch/arm/dts/ |
| H A D | sun6i-a31.dtsi | 69 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
70 <&ccu CLK_AHB1_HDMI>, <&ccu CLK_DRAM_BE0>,
71 <&ccu CLK_IEP_DRC0>, <&ccu CLK_BE0>,
72 <&ccu CLK_LCD0_CH1>, <&ccu CLK_HDMI>;
80 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
81 <&ccu CLK_DRAM_BE0>, <&ccu CLK_IEP_DRC0>,
82 <&ccu CLK_BE0>, <&ccu CLK_LCD0_CH0>;
428 clocks = <&ccu CLK_AHB1_HDMI>, <&ccu CLK_HDMI>,
912 clocks = <&ccu CLK_AHB1_SS>, <&ccu CLK_SS>;
1006 clocks = <&ccu CLK_AHB1_FE0>, <&ccu CLK_FE0>,
[all …]
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/dts/ |
| H A D | sun8i-r40.dtsi | 260 clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
273 clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
298 clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
310 clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
326 clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
340 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
356 clocks = <&ccu CLK_BUS_MMC3>, <&ccu CLK_MMC3>;
396 clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
663 clocks = <&ccu CLK_BUS_IR0>, <&ccu CLK_IR0>;
676 clocks = <&ccu CLK_BUS_IR1>, <&ccu CLK_IR1>;
[all …]
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/dts/ |
| H A D | sun8i-r40.dtsi | 260 clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
273 clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
298 clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
310 clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
326 clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
340 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
356 clocks = <&ccu CLK_BUS_MMC3>, <&ccu CLK_MMC3>;
396 clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
663 clocks = <&ccu CLK_BUS_IR0>, <&ccu CLK_IR0>;
676 clocks = <&ccu CLK_BUS_IR1>, <&ccu CLK_IR1>;
[all …]
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/dts/ |
| H A D | sun8i-r40.dtsi | 260 clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
273 clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
298 clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
310 clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
326 clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
340 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
356 clocks = <&ccu CLK_BUS_MMC3>, <&ccu CLK_MMC3>;
396 clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
663 clocks = <&ccu CLK_BUS_IR0>, <&ccu CLK_IR0>;
676 clocks = <&ccu CLK_BUS_IR1>, <&ccu CLK_IR1>;
[all …]
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/dts/ |
| H A D | sun8i-r40.dtsi | 260 clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
273 clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
298 clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
310 clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
326 clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
340 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
356 clocks = <&ccu CLK_BUS_MMC3>, <&ccu CLK_MMC3>;
396 clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
663 clocks = <&ccu CLK_BUS_IR0>, <&ccu CLK_IR0>;
676 clocks = <&ccu CLK_BUS_IR1>, <&ccu CLK_IR1>;
[all …]
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/arm/dts/ |
| H A D | sun8i-r40.dtsi | 260 clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
273 clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
298 clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
310 clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
326 clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
340 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
356 clocks = <&ccu CLK_BUS_MMC3>, <&ccu CLK_MMC3>;
396 clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
663 clocks = <&ccu CLK_BUS_IR0>, <&ccu CLK_IR0>;
676 clocks = <&ccu CLK_BUS_IR1>, <&ccu CLK_IR1>;
[all …]
|
| /dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm/boot/dts/ |
| H A D | sun8i-r40.dtsi | 260 clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
273 clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
298 clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
310 clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
326 clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
340 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
356 clocks = <&ccu CLK_BUS_MMC3>, <&ccu CLK_MMC3>;
396 clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
663 clocks = <&ccu CLK_BUS_IR0>, <&ccu CLK_IR0>;
676 clocks = <&ccu CLK_BUS_IR1>, <&ccu CLK_IR1>;
[all …]
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/dts/ |
| H A D | sun8i-r40.dtsi | 260 clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
273 clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
298 clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
310 clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
326 clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
340 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
356 clocks = <&ccu CLK_BUS_MMC3>, <&ccu CLK_MMC3>;
396 clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
663 clocks = <&ccu CLK_BUS_IR0>, <&ccu CLK_IR0>;
676 clocks = <&ccu CLK_BUS_IR1>, <&ccu CLK_IR1>;
[all …]
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/arm/dts/ |
| H A D | sun8i-r40.dtsi | 260 clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
273 clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
298 clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
310 clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
326 clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
340 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
356 clocks = <&ccu CLK_BUS_MMC3>, <&ccu CLK_MMC3>;
396 clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
663 clocks = <&ccu CLK_BUS_IR0>, <&ccu CLK_IR0>;
676 clocks = <&ccu CLK_BUS_IR1>, <&ccu CLK_IR1>;
[all …]
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/dts/ |
| H A D | sun8i-r40.dtsi | 260 clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
273 clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
298 clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
310 clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
326 clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
340 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
356 clocks = <&ccu CLK_BUS_MMC3>, <&ccu CLK_MMC3>;
396 clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
663 clocks = <&ccu CLK_BUS_IR0>, <&ccu CLK_IR0>;
676 clocks = <&ccu CLK_BUS_IR1>, <&ccu CLK_IR1>;
[all …]
|
| /dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/dts/ |
| H A D | sun8i-r40.dtsi | 260 clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
273 clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
298 clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
310 clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
326 clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
340 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
356 clocks = <&ccu CLK_BUS_MMC3>, <&ccu CLK_MMC3>;
396 clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
663 clocks = <&ccu CLK_BUS_IR0>, <&ccu CLK_IR0>;
676 clocks = <&ccu CLK_BUS_IR1>, <&ccu CLK_IR1>;
[all …]
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| /dports/sysutils/u-boot-qemu-riscv64/u-boot-2021.07/arch/arm/dts/ |
| H A D | sun8i-r40.dtsi | 260 clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
273 clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
298 clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
310 clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
326 clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
340 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
356 clocks = <&ccu CLK_BUS_MMC3>, <&ccu CLK_MMC3>;
396 clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
663 clocks = <&ccu CLK_BUS_IR0>, <&ccu CLK_IR0>;
676 clocks = <&ccu CLK_BUS_IR1>, <&ccu CLK_IR1>;
[all …]
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