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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/Mips/msa/
H A Di5-c.ll14 %1 = tail call <16 x i8> @llvm.mips.ceqi.b(<16 x i8> %0, i32 14)
16 %2 = tail call <16 x i8> @llvm.mips.ceqi.b(<16 x i8> %0, i32 -14)
38 %1 = tail call <8 x i16> @llvm.mips.ceqi.h(<8 x i16> %0, i32 14)
40 %2 = tail call <8 x i16> @llvm.mips.ceqi.h(<8 x i16> %0, i32 -14)
62 %1 = tail call <4 x i32> @llvm.mips.ceqi.w(<4 x i32> %0, i32 14)
64 %2 = tail call <4 x i32> @llvm.mips.ceqi.w(<4 x i32> %0, i32 -14)
86 %1 = tail call <2 x i64> @llvm.mips.ceqi.d(<2 x i64> %0, i32 14)
88 %2 = tail call <2 x i64> @llvm.mips.ceqi.d(<2 x i64> %0, i32 -14)
110 %1 = tail call <16 x i8> @llvm.mips.clei.s.b(<16 x i8> %0, i32 14)
134 %1 = tail call <8 x i16> @llvm.mips.clei.s.h(<8 x i16> %0, i32 14)
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/Mips/msa/
H A Di5-c.ll14 %1 = tail call <16 x i8> @llvm.mips.ceqi.b(<16 x i8> %0, i32 14)
16 %2 = tail call <16 x i8> @llvm.mips.ceqi.b(<16 x i8> %0, i32 -14)
38 %1 = tail call <8 x i16> @llvm.mips.ceqi.h(<8 x i16> %0, i32 14)
40 %2 = tail call <8 x i16> @llvm.mips.ceqi.h(<8 x i16> %0, i32 -14)
62 %1 = tail call <4 x i32> @llvm.mips.ceqi.w(<4 x i32> %0, i32 14)
64 %2 = tail call <4 x i32> @llvm.mips.ceqi.w(<4 x i32> %0, i32 -14)
86 %1 = tail call <2 x i64> @llvm.mips.ceqi.d(<2 x i64> %0, i32 14)
88 %2 = tail call <2 x i64> @llvm.mips.ceqi.d(<2 x i64> %0, i32 -14)
110 %1 = tail call <16 x i8> @llvm.mips.clei.s.b(<16 x i8> %0, i32 14)
134 %1 = tail call <8 x i16> @llvm.mips.clei.s.h(<8 x i16> %0, i32 14)
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/Mips/msa/
H A Di5-c.ll14 %1 = tail call <16 x i8> @llvm.mips.ceqi.b(<16 x i8> %0, i32 14)
16 %2 = tail call <16 x i8> @llvm.mips.ceqi.b(<16 x i8> %0, i32 -14)
38 %1 = tail call <8 x i16> @llvm.mips.ceqi.h(<8 x i16> %0, i32 14)
40 %2 = tail call <8 x i16> @llvm.mips.ceqi.h(<8 x i16> %0, i32 -14)
62 %1 = tail call <4 x i32> @llvm.mips.ceqi.w(<4 x i32> %0, i32 14)
64 %2 = tail call <4 x i32> @llvm.mips.ceqi.w(<4 x i32> %0, i32 -14)
86 %1 = tail call <2 x i64> @llvm.mips.ceqi.d(<2 x i64> %0, i32 14)
88 %2 = tail call <2 x i64> @llvm.mips.ceqi.d(<2 x i64> %0, i32 -14)
110 %1 = tail call <16 x i8> @llvm.mips.clei.s.b(<16 x i8> %0, i32 14)
134 %1 = tail call <8 x i16> @llvm.mips.clei.s.h(<8 x i16> %0, i32 14)
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/Mips/msa/
H A Di5-c.ll14 %1 = tail call <16 x i8> @llvm.mips.ceqi.b(<16 x i8> %0, i32 14)
16 %2 = tail call <16 x i8> @llvm.mips.ceqi.b(<16 x i8> %0, i32 -14)
38 %1 = tail call <8 x i16> @llvm.mips.ceqi.h(<8 x i16> %0, i32 14)
40 %2 = tail call <8 x i16> @llvm.mips.ceqi.h(<8 x i16> %0, i32 -14)
62 %1 = tail call <4 x i32> @llvm.mips.ceqi.w(<4 x i32> %0, i32 14)
64 %2 = tail call <4 x i32> @llvm.mips.ceqi.w(<4 x i32> %0, i32 -14)
86 %1 = tail call <2 x i64> @llvm.mips.ceqi.d(<2 x i64> %0, i32 14)
88 %2 = tail call <2 x i64> @llvm.mips.ceqi.d(<2 x i64> %0, i32 -14)
110 %1 = tail call <16 x i8> @llvm.mips.clei.s.b(<16 x i8> %0, i32 14)
134 %1 = tail call <8 x i16> @llvm.mips.clei.s.h(<8 x i16> %0, i32 14)
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/Mips/msa/
H A Di5-c.ll14 %1 = tail call <16 x i8> @llvm.mips.ceqi.b(<16 x i8> %0, i32 14)
16 %2 = tail call <16 x i8> @llvm.mips.ceqi.b(<16 x i8> %0, i32 -14)
38 %1 = tail call <8 x i16> @llvm.mips.ceqi.h(<8 x i16> %0, i32 14)
40 %2 = tail call <8 x i16> @llvm.mips.ceqi.h(<8 x i16> %0, i32 -14)
62 %1 = tail call <4 x i32> @llvm.mips.ceqi.w(<4 x i32> %0, i32 14)
64 %2 = tail call <4 x i32> @llvm.mips.ceqi.w(<4 x i32> %0, i32 -14)
86 %1 = tail call <2 x i64> @llvm.mips.ceqi.d(<2 x i64> %0, i32 14)
88 %2 = tail call <2 x i64> @llvm.mips.ceqi.d(<2 x i64> %0, i32 -14)
110 %1 = tail call <16 x i8> @llvm.mips.clei.s.b(<16 x i8> %0, i32 14)
134 %1 = tail call <8 x i16> @llvm.mips.clei.s.h(<8 x i16> %0, i32 14)
[all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/Mips/msa/
H A Di5-c.ll14 %1 = tail call <16 x i8> @llvm.mips.ceqi.b(<16 x i8> %0, i32 14)
16 %2 = tail call <16 x i8> @llvm.mips.ceqi.b(<16 x i8> %0, i32 -14)
38 %1 = tail call <8 x i16> @llvm.mips.ceqi.h(<8 x i16> %0, i32 14)
40 %2 = tail call <8 x i16> @llvm.mips.ceqi.h(<8 x i16> %0, i32 -14)
62 %1 = tail call <4 x i32> @llvm.mips.ceqi.w(<4 x i32> %0, i32 14)
64 %2 = tail call <4 x i32> @llvm.mips.ceqi.w(<4 x i32> %0, i32 -14)
86 %1 = tail call <2 x i64> @llvm.mips.ceqi.d(<2 x i64> %0, i32 14)
88 %2 = tail call <2 x i64> @llvm.mips.ceqi.d(<2 x i64> %0, i32 -14)
110 %1 = tail call <16 x i8> @llvm.mips.clei.s.b(<16 x i8> %0, i32 14)
134 %1 = tail call <8 x i16> @llvm.mips.clei.s.h(<8 x i16> %0, i32 14)
[all …]
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/Mips/msa/
H A Di5-c.ll14 %1 = tail call <16 x i8> @llvm.mips.ceqi.b(<16 x i8> %0, i32 14)
16 %2 = tail call <16 x i8> @llvm.mips.ceqi.b(<16 x i8> %0, i32 -14)
38 %1 = tail call <8 x i16> @llvm.mips.ceqi.h(<8 x i16> %0, i32 14)
40 %2 = tail call <8 x i16> @llvm.mips.ceqi.h(<8 x i16> %0, i32 -14)
62 %1 = tail call <4 x i32> @llvm.mips.ceqi.w(<4 x i32> %0, i32 14)
64 %2 = tail call <4 x i32> @llvm.mips.ceqi.w(<4 x i32> %0, i32 -14)
86 %1 = tail call <2 x i64> @llvm.mips.ceqi.d(<2 x i64> %0, i32 14)
88 %2 = tail call <2 x i64> @llvm.mips.ceqi.d(<2 x i64> %0, i32 -14)
110 %1 = tail call <16 x i8> @llvm.mips.clei.s.b(<16 x i8> %0, i32 14)
134 %1 = tail call <8 x i16> @llvm.mips.clei.s.h(<8 x i16> %0, i32 14)
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/Mips/msa/
H A Di5-c.ll14 %1 = tail call <16 x i8> @llvm.mips.ceqi.b(<16 x i8> %0, i32 14)
16 %2 = tail call <16 x i8> @llvm.mips.ceqi.b(<16 x i8> %0, i32 -14)
38 %1 = tail call <8 x i16> @llvm.mips.ceqi.h(<8 x i16> %0, i32 14)
40 %2 = tail call <8 x i16> @llvm.mips.ceqi.h(<8 x i16> %0, i32 -14)
62 %1 = tail call <4 x i32> @llvm.mips.ceqi.w(<4 x i32> %0, i32 14)
64 %2 = tail call <4 x i32> @llvm.mips.ceqi.w(<4 x i32> %0, i32 -14)
86 %1 = tail call <2 x i64> @llvm.mips.ceqi.d(<2 x i64> %0, i32 14)
88 %2 = tail call <2 x i64> @llvm.mips.ceqi.d(<2 x i64> %0, i32 -14)
110 %1 = tail call <16 x i8> @llvm.mips.clei.s.b(<16 x i8> %0, i32 14)
134 %1 = tail call <8 x i16> @llvm.mips.clei.s.h(<8 x i16> %0, i32 14)
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/Mips/msa/
H A Di5-c.ll14 %1 = tail call <16 x i8> @llvm.mips.ceqi.b(<16 x i8> %0, i32 14)
16 %2 = tail call <16 x i8> @llvm.mips.ceqi.b(<16 x i8> %0, i32 -14)
38 %1 = tail call <8 x i16> @llvm.mips.ceqi.h(<8 x i16> %0, i32 14)
40 %2 = tail call <8 x i16> @llvm.mips.ceqi.h(<8 x i16> %0, i32 -14)
62 %1 = tail call <4 x i32> @llvm.mips.ceqi.w(<4 x i32> %0, i32 14)
64 %2 = tail call <4 x i32> @llvm.mips.ceqi.w(<4 x i32> %0, i32 -14)
86 %1 = tail call <2 x i64> @llvm.mips.ceqi.d(<2 x i64> %0, i32 14)
88 %2 = tail call <2 x i64> @llvm.mips.ceqi.d(<2 x i64> %0, i32 -14)
110 %1 = tail call <16 x i8> @llvm.mips.clei.s.b(<16 x i8> %0, i32 14)
134 %1 = tail call <8 x i16> @llvm.mips.clei.s.h(<8 x i16> %0, i32 14)
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/Transforms/LoopUnroll/
H A Dpr33437.ll17 ; CHECK-NEXT: [[CALL593_PEEL:%.*]] = tail call zeroext i8 @patatino()
26 ; CHECK-NEXT: [[CALL593:%.*]] = tail call zeroext i8 @patatino()
41 %call593 = tail call zeroext i8 @patatino()
58 ; CHECK-NEXT: [[CALL593_PEEL:%.*]] = tail call zeroext i8 @patatino()
70 ; CHECK-NEXT: [[CALL593:%.*]] = tail call zeroext i8 @patatino()
72 ; CHECK-NEXT: [[CALL593_1:%.*]] = tail call zeroext i8 @patatino()
77 ; CHECK-NEXT: [[CALL593_2:%.*]] = tail call zeroext i8 @patatino()
79 ; CHECK-NEXT: [[CALL593_3:%.*]] = tail call zeroext i8 @patatino()
95 %call593 = tail call zeroext i8 @patatino()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/ARM/
H A Dreturned-trunc-tail-calls.ll10 tail call i16 @ret16(i16 returned %in)
18 tail call i16 @ret16(i16 returned %in)
35 tail call {i32, i8} @take_i32_i8({i32, i8} returned %callval)
46 %val = tail call {i32, {i32, i32}} @give_i32_i32_i32()
63 tail call i32 @ret32(i32 returned undef)
70 %agg = tail call {i32, {i32, i32}} @give_i32_i32_i32()
83 %val = tail call {i32, {i32, i32}} @give_i32_i32_i32()
93 %val = tail call i64 @give_i64()
101 %agg = tail call {i64, i32} @give_i64_i32()
/dports/lang/halide/Halide-release_2019_08_27-2654-g664dc4993/src/runtime/
H A Dx86_sse41.ll6 %3 = tail call <8 x i16> @llvm.x86.sse41.packusdw(<4 x i32> %1, <4 x i32> %2)
11 %1 = tail call <4 x float> @llvm.x86.sse41.round.ps(<4 x float> %x, i32 1)
18 %1 = tail call <2 x double> @llvm.x86.sse41.round.pd(<2 x double> %x, i32 1)
25 %1 = tail call <4 x float> @llvm.x86.sse41.round.ps(<4 x float> %x, i32 2)
30 %1 = tail call <2 x double> @llvm.x86.sse41.round.pd(<2 x double> %x, i32 2)
35 %1 = tail call <4 x float> @llvm.x86.sse41.round.ps(<4 x float> %x, i32 0)
40 %1 = tail call <2 x double> @llvm.x86.sse41.round.pd(<2 x double> %x, i32 0)
45 %1 = tail call <4 x float> @llvm.x86.sse41.round.ps(<4 x float> %x, i32 3)
50 %1 = tail call <2 x double> @llvm.x86.sse41.round.pd(<2 x double> %x, i32 3)
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/Hexagon/
H A Dv60-vsel1.ll15 %2 = tail call <16 x i32> @llvm.hexagon.V6.lvsplatw(i32 -1)
16 %3 = tail call <16 x i32> @llvm.hexagon.V6.lvsplatw(i32 1)
17 %4 = tail call <64 x i1> @llvm.hexagon.V6.pred.scalar2(i32 %add)
18 %5 = tail call <16 x i32> @llvm.hexagon.V6.vandqrt.acc(<16 x i32> %3, <64 x i1> %4, i32 12)
26 %6 = tail call <64 x i1> @llvm.hexagon.V6.pred.scalar2(i32 %boundary)
27 %7 = tail call <16 x i32> @llvm.hexagon.V6.vandqrt(<64 x i1> %6, i32 16843009)
28 %8 = tail call <16 x i32> @llvm.hexagon.V6.vnot(<16 x i32> %7)
42 %15 = tail call <16 x i32> @llvm.hexagon.V6.vand(<16 x i32> undef, <16 x i32> %sMask.049)
56 %17 = tail call <16 x i32> @llvm.hexagon.V6.vand(<16 x i32> %16, <16 x i32> %sMaskR.0)
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/ARM/
H A Dreturned-trunc-tail-calls.ll10 tail call i16 @ret16(i16 returned %in)
18 tail call i16 @ret16(i16 returned %in)
35 tail call {i32, i8} @take_i32_i8({i32, i8} returned %callval)
46 %val = tail call {i32, {i32, i32}} @give_i32_i32_i32()
63 tail call i32 @ret32(i32 returned undef)
70 %agg = tail call {i32, {i32, i32}} @give_i32_i32_i32()
83 %val = tail call {i32, {i32, i32}} @give_i32_i32_i32()
93 %val = tail call i64 @give_i64()
101 %agg = tail call {i64, i32} @give_i64_i32()
/dports/databases/pgloader3/named-readtables-20210124-git/src/
H A Dutils.lisp201 (destructuring-bind (name &rest tail) elt
203 (if (cdr tail)
204 (check-spec tail "optional-supplied-p parameter")
216 (destructuring-bind (var-or-kv &rest tail) elt
227 (if (cdr tail)
228 (check-spec tail "keyword-supplied-p parameter")
229 (setf tail (append tail '(nil))))
230 (setf elt (cons var-or-kv tail))))
/dports/devel/llvm11/llvm-11.0.1.src/test/Transforms/LoopUnroll/
H A Dpr33437.ll17 ; CHECK-NEXT: [[CALL593_PEEL:%.*]] = tail call zeroext i8 @patatino()
26 ; CHECK-NEXT: [[CALL593:%.*]] = tail call zeroext i8 @patatino()
41 %call593 = tail call zeroext i8 @patatino()
58 ; CHECK-NEXT: [[CALL593_PEEL:%.*]] = tail call zeroext i8 @patatino()
70 ; CHECK-NEXT: [[CALL593:%.*]] = tail call zeroext i8 @patatino()
72 ; CHECK-NEXT: [[CALL593_1:%.*]] = tail call zeroext i8 @patatino()
77 ; CHECK-NEXT: [[CALL593_2:%.*]] = tail call zeroext i8 @patatino()
79 ; CHECK-NEXT: [[CALL593_3:%.*]] = tail call zeroext i8 @patatino()
95 %call593 = tail call zeroext i8 @patatino()
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/Hexagon/
H A Dv60-vsel1.ll15 %2 = tail call <16 x i32> @llvm.hexagon.V6.lvsplatw(i32 -1)
16 %3 = tail call <16 x i32> @llvm.hexagon.V6.lvsplatw(i32 1)
17 %4 = tail call <512 x i1> @llvm.hexagon.V6.pred.scalar2(i32 %add)
18 %5 = tail call <16 x i32> @llvm.hexagon.V6.vandqrt.acc(<16 x i32> %3, <512 x i1> %4, i32 12)
26 %6 = tail call <512 x i1> @llvm.hexagon.V6.pred.scalar2(i32 %boundary)
27 %7 = tail call <16 x i32> @llvm.hexagon.V6.vandqrt(<512 x i1> %6, i32 16843009)
28 %8 = tail call <16 x i32> @llvm.hexagon.V6.vnot(<16 x i32> %7)
42 %15 = tail call <16 x i32> @llvm.hexagon.V6.vand(<16 x i32> undef, <16 x i32> %sMask.049)
56 %17 = tail call <16 x i32> @llvm.hexagon.V6.vand(<16 x i32> %16, <16 x i32> %sMaskR.0)
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/ARM/
H A Dreturned-trunc-tail-calls.ll10 tail call i16 @ret16(i16 returned %in)
18 tail call i16 @ret16(i16 returned %in)
35 tail call {i32, i8} @take_i32_i8({i32, i8} returned %callval)
46 %val = tail call {i32, {i32, i32}} @give_i32_i32_i32()
63 tail call i32 @ret32(i32 returned undef)
70 %agg = tail call {i32, {i32, i32}} @give_i32_i32_i32()
83 %val = tail call {i32, {i32, i32}} @give_i32_i32_i32()
93 %val = tail call i64 @give_i64()
101 %agg = tail call {i64, i32} @give_i64_i32()
/dports/multimedia/v4l_compat/linux-5.13-rc2/sound/core/seq/
H A Dseq_fifo.c43 f->tail = NULL; in snd_seq_fifo_new()
122 if (f->tail != NULL) in snd_seq_fifo_event_in()
123 f->tail->next = cell; in snd_seq_fifo_event_in()
124 f->tail = cell; in snd_seq_fifo_event_in()
150 if (f->tail == cell) in fifo_cell_out()
151 f->tail = NULL; in fifo_cell_out()
207 if (!f->tail) in snd_seq_fifo_cell_putback()
208 f->tail = cell; in snd_seq_fifo_cell_putback()
248 f->tail = NULL; in snd_seq_fifo_resize()
/dports/devel/9base/9base-6/mk/
H A Dparse.c14 Word *head, *tail; in parse() local
34 switch(rhead(buf->start, &head, &tail, &attr, &prog)) in parse()
37 p = wtos(tail, ' '); in parse()
50 p = wtos(tail, ' '); in parse()
71 addrules(head, tail, body, attr, hline, prog); in parse()
92 setvar(head->s, (void *) tail); in parse()
95 if((err = setshell(tail)) != nil){ in parse()
120 addrules(Word *head, Word *tail, char *body, int attr, int hline, char *prog) in addrules() argument
134 addrule(w->s, tail, body, head, attr, hline, prog); in addrules()
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/ARM/
H A Dreturned-trunc-tail-calls.ll10 tail call i16 @ret16(i16 returned %in)
18 tail call i16 @ret16(i16 returned %in)
35 tail call {i32, i8} @take_i32_i8({i32, i8} returned %callval)
46 %val = tail call {i32, {i32, i32}} @give_i32_i32_i32()
63 tail call i32 @ret32(i32 returned undef)
70 %agg = tail call {i32, {i32, i32}} @give_i32_i32_i32()
83 %val = tail call {i32, {i32, i32}} @give_i32_i32_i32()
93 %val = tail call i64 @give_i64()
101 %agg = tail call {i64, i32} @give_i64_i32()
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/Hexagon/
H A Dv60-vsel1.ll15 %2 = tail call <16 x i32> @llvm.hexagon.V6.lvsplatw(i32 -1)
16 %3 = tail call <16 x i32> @llvm.hexagon.V6.lvsplatw(i32 1)
17 %4 = tail call <64 x i1> @llvm.hexagon.V6.pred.scalar2(i32 %add)
18 %5 = tail call <16 x i32> @llvm.hexagon.V6.vandqrt.acc(<16 x i32> %3, <64 x i1> %4, i32 12)
26 %6 = tail call <64 x i1> @llvm.hexagon.V6.pred.scalar2(i32 %boundary)
27 %7 = tail call <16 x i32> @llvm.hexagon.V6.vandqrt(<64 x i1> %6, i32 16843009)
28 %8 = tail call <16 x i32> @llvm.hexagon.V6.vnot(<16 x i32> %7)
42 %15 = tail call <16 x i32> @llvm.hexagon.V6.vand(<16 x i32> undef, <16 x i32> %sMask.049)
56 %17 = tail call <16 x i32> @llvm.hexagon.V6.vand(<16 x i32> %16, <16 x i32> %sMaskR.0)
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/VE/VELIntrinsics/
H A Dlsv.ll19 %4 = tail call fast <256 x double> @llvm.ve.vl.vld.vssl(i64 8, i8* %0, i32 256)
20 %5 = tail call fast <256 x double> @llvm.ve.vl.lsv.vvss(<256 x double> %4, i32 %2, i64 %1)
21 tail call void @llvm.ve.vl.vst.vssl(<256 x double> %5, i64 8, i8* %0, i32 256)
44 %3 = tail call fast <256 x double> @llvm.ve.vl.vld.vssl(i64 8, i8* %0, i32 256)
45 %4 = tail call i64 @llvm.ve.vl.lvsl.svs(<256 x double> %3, i32 %1)
62 %3 = tail call fast <256 x double> @llvm.ve.vl.vld.vssl(i64 8, i8* %0, i32 256)
63 %4 = tail call fast double @llvm.ve.vl.lvsd.svs(<256 x double> %3, i32 %1)
80 %3 = tail call fast <256 x double> @llvm.ve.vl.vld.vssl(i64 8, i8* %0, i32 256)
81 %4 = tail call fast float @llvm.ve.vl.lvss.svs(<256 x double> %3, i32 %1)
/dports/devel/grpc134/grpc-1.34.1/src/core/lib/profiling/
H A Dbasic_timers.cc61 gpr_timer_log* tail; member
96 list->head = list->tail = log; in timer_log_push_back()
100 log->prev = list->tail; in timer_log_push_back()
102 list->tail->next = log; in timer_log_push_back()
103 list->tail = log; in timer_log_push_back()
115 list->tail = NULL; in timer_log_pop_front()
131 list->tail = log->prev; in timer_log_remove()
132 if (list->tail != NULL) { in timer_log_remove()
133 list->tail->next = NULL; in timer_log_remove()
/dports/devel/grpc/grpc-1.42.0/src/core/lib/profiling/
H A Dbasic_timers.cc63 gpr_timer_log* tail; member
98 list->head = list->tail = log; in timer_log_push_back()
102 log->prev = list->tail; in timer_log_push_back()
104 list->tail->next = log; in timer_log_push_back()
105 list->tail = log; in timer_log_push_back()
117 list->tail = NULL; in timer_log_pop_front()
133 list->tail = log->prev; in timer_log_remove()
134 if (list->tail != NULL) { in timer_log_remove()
135 list->tail->next = NULL; in timer_log_remove()

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