/qemu/hw/net/ |
H A D | pcnet.c | 1349 val = (val & 0x007f) | (s->csr[0] & 0x7f00); in pcnet_csr_writew() 1413 val = (val > 0) ? val : 512; in pcnet_csr_writew() 1424 val &= ~0x026a; val |= s->csr[4] & 0x026a; in pcnet_csr_writew() 1428 val &= ~0x0a90; val |= s->csr[5] & 0x0a90; in pcnet_csr_writew() 1447 uint32_t val; in pcnet_csr_readw() local 1452 val |= (val & 0x7800) ? 0x8000 : 0; in pcnet_csr_readw() 1471 return val; in pcnet_csr_readw() 1532 val |= (val & 0x017f & s->lnkst) ? 0x8000 : 0; in pcnet_bcr_readw() 1541 return val; in pcnet_bcr_readw() 1615 return val; in pcnet_ioport_readw() [all …]
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H A D | lasi_i82596.c | 33 uint64_t val, unsigned size) in lasi_82596_mem_write() argument 37 trace_lasi_82596_mem_writew(addr, val); in lasi_82596_mem_write() 45 uint32_t v = d->last_val | (val << 16); in lasi_82596_mem_write() 49 d->last_val = val; in lasi_82596_mem_write() 52 i82596_ioport_writew(&d->state, PORT_CA, val); in lasi_82596_mem_write() 59 address_space_write(&address_space_memory, val, in lasi_82596_mem_write() 70 uint32_t val; in lasi_82596_mem_read() local 73 val = 0xBEEFBABE; in lasi_82596_mem_read() 75 val = i82596_ioport_readw(&d->state, addr); in lasi_82596_mem_read() 77 trace_lasi_82596_mem_readw(addr, val); in lasi_82596_mem_read() [all …]
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/qemu/include/qemu/ |
H A D | timer.h | 879 int64_t val; in cpu_get_host_ticks() local 881 return val; in cpu_get_host_ticks() 889 int64_t val; in cpu_get_host_ticks() local 891 val = high; in cpu_get_host_ticks() 892 val <<= 32; in cpu_get_host_ticks() 893 val |= low; in cpu_get_host_ticks() 894 return val; in cpu_get_host_ticks() 901 int val; in cpu_get_host_ticks() local 903 return val; in cpu_get_host_ticks() 912 return val; in cpu_get_host_ticks() [all …]
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H A D | bcd.h | 5 static inline uint8_t to_bcd(uint8_t val) in to_bcd() argument 7 return ((val / 10) << 4) | (val % 10); in to_bcd() 10 static inline uint8_t from_bcd(uint8_t val) in from_bcd() argument 12 return ((val >> 4) * 10) + (val & 0x0f); in from_bcd()
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/qemu/hw/ide/ |
H A D | cmd646.c | 94 uint32_t val; in bmdma_read() local 102 val = bm->cmd; in bmdma_read() 105 val = pci_dev->config[MRDMODE]; in bmdma_read() 108 val = bm->status; in bmdma_read() 112 val = pci_dev->config[UDIDETCR0]; in bmdma_read() 118 val = 0xff; in bmdma_read() 122 trace_bmdma_read_cmd646(addr, val); in bmdma_read() 123 return val; in bmdma_read() 136 trace_bmdma_write_cmd646(addr, val); in bmdma_write() 139 bmdma_cmd_writeb(bm, val); in bmdma_write() [all …]
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H A D | trace-events | 5 …read(uint32_t addr, const char *reg, uint32_t val, void *bus, void *s) "IDE PIO rd @ 0x%"PRIx32" … 6 …rite(uint32_t addr, const char *reg, uint32_t val, void *bus, void *s) "IDE PIO wr @ 0x%"PRIx32" (… 7 …tus_read(uint32_t addr, uint32_t val, void *bus, void *s) "IDE PIO rd @ 0x%"PRIx… 8 …_write(uint32_t addr, uint32_t val, void *bus) "IDE PIO wr @ 0x%"PRIx3… 10 …ta_readw(uint32_t addr, uint32_t val, void *bus, void *s) "IDE PIO rd @ 0x%"PRI… 11 …a_writew(uint32_t addr, uint32_t val, void *bus, void *s) "IDE PIO wr @ 0x%"PRIx… 12 …ta_readl(uint32_t addr, uint32_t val, void *bus, void *s) "IDE PIO rd @ 0x%"PRI… 13 …a_writel(uint32_t addr, uint32_t val, void *bus, void *s) "IDE PIO wr @ 0x%"PRIx… 32 bmdma_cmd_writeb(uint32_t val) "val: 0x%08x" 124 …ead(void *s, void *a, uint64_t addr, uint64_t val, unsigned size) "ahci(%p): read a=%p addr=0x%"PR… [all …]
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/qemu/accel/tcg/ |
H A D | ldst_atomicity.c.inc | 589 * @val: value to store 596 qatomic_set(p, val); 602 * @val: value to store 609 qatomic_set(p, val); 615 * @val: value to store 873 stw_he_p(pv, val); 925 stl_he_p(pv, val); 1057 a = HOST_BIG_ENDIAN ? int128_gethi(val) : int128_getlo(val); 1058 b = HOST_BIG_ENDIAN ? int128_getlo(val) : int128_gethi(val); 1085 val = bswap128(val); [all …]
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/qemu/tests/tcg/i386/ |
H A D | test-i386-bmi2.c | 47 insn2q(andn, clear, "rm", val, "r") 49 insn2q(bzhi, pos, "rm", val, "r") 50 insn2q(rorx, val, "r", n, "i") 51 insn2q(sarx, val, "rm", n, "r") 52 insn2q(shlx, val, "rm", n, "r") 53 insn2q(shrx, val, "rm", n, "r") 62 insn2l(bzhi, pos, "rm", val, "r") in insn1q() 63 insn2l(rorx, val, "r", n, "i") in insn1q() 64 insn2l(sarx, val, "rm", n, "r") in insn1q() 65 insn2l(shlx, val, "rm", n, "r") in insn1q() [all …]
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/qemu/hw/pci/ |
H A D | pci_host.c | 95 PCI_FUNC(pci_dev->devfn), addr, val); in pci_host_config_write_common() 96 pci_dev->config_write(pci_dev, addr, val, MIN(len, limit - addr)); in pci_host_config_write_common() 134 config_addr, val); in pci_data_write() 139 val, len); in pci_data_write() 159 uint64_t val, unsigned len) in pci_host_config_write() argument 164 __func__, addr, len, val); in pci_host_config_write() 168 s->config_reg = val; in pci_host_config_write() 175 uint32_t val = s->config_reg; in pci_host_config_read() local 178 __func__, addr, len, val); in pci_host_config_read() 179 return val; in pci_host_config_read() [all …]
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/qemu/hw/char/ |
H A D | ipoctal232.c | 198 DPRINTF("Write CR%c %u: ", channel + 'a', val); in write_cr() 201 if (val & CR_ENABLE_RX) { in write_cr() 205 if (val & CR_DISABLE_RX) { in write_cr() 209 if (val & CR_ENABLE_TX) { in write_cr() 214 if (val & CR_DISABLE_TX) { in write_cr() 223 switch (CR_CMD(val)) { in write_cr() 252 DPRINTF2("unsupported 0x%x", CR_CMD(val)); in write_cr() 327 unsigned reg = val & 0xFF; in io_write() 375 DPRINTF("Write ACR%c 0x%x\n", block + 'A', val); in io_write() 379 DPRINTF("Write IMR%c 0x%x\n", block + 'A', val); in io_write() [all …]
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/qemu/hw/ppc/ |
H A D | pnv_core.c | 79 uint64_t val = 0; in pnv_core_power8_xscom_read() local 94 return val; in pnv_core_power8_xscom_read() 141 val = 0x0; in pnv_core_power9_xscom_read() 144 val = 0; in pnv_core_power9_xscom_read() 151 return val; in pnv_core_power9_xscom_read() 193 val = 0; in pnv_core_power10_xscom_read() 200 return val; in pnv_core_power10_xscom_read() 425 val = 0; in DEFINE_TYPES() 432 return val; in DEFINE_TYPES() 476 return val; in pnv_quad_power10_xscom_read() [all …]
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H A D | pnv_n1_chiplet.c | 34 uint64_t val = ~0ull; in pnv_n1_chiplet_pb_scom_eq_read() local 38 val = n1_chiplet->eq[0].hp_mode2_curr; in pnv_n1_chiplet_pb_scom_eq_read() 44 return val; in pnv_n1_chiplet_pb_scom_eq_read() 48 uint64_t val, unsigned size) in pnv_n1_chiplet_pb_scom_eq_write() argument 55 n1_chiplet->eq[0].hp_mode2_curr = val; in pnv_n1_chiplet_pb_scom_eq_write() 78 uint64_t val = ~0ull; in pnv_n1_chiplet_pb_scom_es_read() local 82 val = n1_chiplet->es[3].mode; in pnv_n1_chiplet_pb_scom_es_read() 88 return val; in pnv_n1_chiplet_pb_scom_es_read() 92 uint64_t val, unsigned size) in pnv_n1_chiplet_pb_scom_es_write() argument 99 n1_chiplet->es[3].mode = val; in pnv_n1_chiplet_pb_scom_es_write()
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/qemu/target/loongarch/tcg/ |
H A D | iocsr_helper.c | 43 target_ulong val) in helper_iocsrwr_b() argument 46 val, GET_MEMTXATTRS(env), NULL); in helper_iocsrwr_b() 50 target_ulong val) in helper_iocsrwr_h() argument 53 val, GET_MEMTXATTRS(env), NULL); in helper_iocsrwr_h() 57 target_ulong val) in helper_iocsrwr_w() argument 60 val, GET_MEMTXATTRS(env), NULL); in helper_iocsrwr_w() 64 target_ulong val) in helper_iocsrwr_d() argument 67 val, GET_MEMTXATTRS(env), NULL); in helper_iocsrwr_d()
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H A D | csr_helper.c | 54 target_ulong helper_csrwr_estat(CPULoongArchState *env, target_ulong val) in helper_csrwr_estat() argument 59 env->CSR_ESTAT = deposit64(env->CSR_ESTAT, 0, 2, val); in helper_csrwr_estat() 64 target_ulong helper_csrwr_asid(CPULoongArchState *env, target_ulong val) in helper_csrwr_asid() argument 69 env->CSR_ASID = deposit64(env->CSR_ASID, 0, 10, val); in helper_csrwr_asid() 76 target_ulong helper_csrwr_tcfg(CPULoongArchState *env, target_ulong val) in helper_csrwr_tcfg() argument 81 cpu_loongarch_store_constant_timer_config(cpu, val); in helper_csrwr_tcfg() 86 target_ulong helper_csrwr_ticlr(CPULoongArchState *env, target_ulong val) in helper_csrwr_ticlr() argument 91 if (val & 0x1) { in helper_csrwr_ticlr()
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/qemu/include/exec/ |
H A D | cpu_ldst.h | 154 uint32_t val, uintptr_t ra); 156 uint32_t val, uintptr_t ra); 158 uint32_t val, uintptr_t ra); 160 uint64_t val, uintptr_t ra); 162 uint32_t val, uintptr_t ra); 164 uint32_t val, uintptr_t ra); 166 uint64_t val, uintptr_t ra); 210 void cpu_stb_mmu(CPUArchState *env, abi_ptr ptr, uint8_t val, 212 void cpu_stw_mmu(CPUArchState *env, abi_ptr ptr, uint16_t val, 214 void cpu_stl_mmu(CPUArchState *env, abi_ptr ptr, uint32_t val, [all …]
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/qemu/hw/display/ |
H A D | exynos4210_fimd.c | 1086 if ((val != 0xFFFFFFFF) && ((w->wincon >> 2) & 0xF) == ((val >> 2) & 0xF)) { in exynos4210_fimd_trace_bppmode() 1383 (long long unsigned int)val, (long long unsigned int)val); in exynos4210_fimd_write() 1398 val = (val & (~FIMD_VIDCON1_ROMASK)) | in exynos4210_fimd_write() 1413 val = (val & ~FIMD_WINCON_ROMASK) | in exynos4210_fimd_write() 1425 val = (val & ~FIMD_WINCON_BUFSTAT_H) | FIMD_WINCON_BUFSTAT_L; in exynos4210_fimd_write() 1429 val = (val & ~FIMD_WINCON_BUFSTAT_L) | FIMD_WINCON_BUFSTAT_H; in exynos4210_fimd_write() 1455 s->winchmap = val; in exynos4210_fimd_write() 1549 s->dithmode = val; in exynos4210_fimd_write() 1573 val = (val & ~FIMD_TRIGCON_ROMASK) | (s->trigcon & FIMD_TRIGCON_ROMASK); in exynos4210_fimd_write() 1574 s->trigcon = val; in exynos4210_fimd_write() [all …]
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H A D | cg3.c | 169 int val; in cg3_reg_read() local 174 val = 0; in cg3_reg_read() 177 val = s->regs[0]; in cg3_reg_read() 184 val = s->regs[addr - 0x10]; in cg3_reg_read() 191 val = 0; in cg3_reg_read() 196 return val; in cg3_reg_read() 209 s->dac_index = val; in cg3_reg_write() 215 val <<= 24; in cg3_reg_write() 219 regval = val >> 24; in cg3_reg_write() 239 val <<= 8; in cg3_reg_write() [all …]
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/qemu/hw/acpi/ |
H A D | core.c | 402 ar->pm1.evt.sts &= ~val; in acpi_pm1_evt_write_sts() 407 ar->pm1.evt.en = val; in acpi_pm1_evt_write_en() 449 acpi_pm1_evt_write_sts(ar, val); in acpi_pm_evt_write() 453 acpi_pm1_evt_write_en(ar, val); in acpi_pm_evt_write() 582 val = val << 8 | (ar->pm1.cnt.cnt & 0xff); in acpi_pm_cnt_write() 694 *cur = (*cur) & ~val; in acpi_gpe_ioport_writeb() 698 *cur = val; in acpi_gpe_ioport_writeb() 707 uint32_t val; in acpi_gpe_ioport_readb() local 710 val = 0; in acpi_gpe_ioport_readb() 712 val = *cur; in acpi_gpe_ioport_readb() [all …]
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/qemu/hw/misc/ |
H A D | iosb.c | 32 uint64_t val = 0; in iosb_read() local 42 val = s->regs[addr >> 8]; in iosb_read() 47 addr, val, size); in iosb_read() 50 trace_iosb_read(addr, val, size); in iosb_read() 51 return val; in iosb_read() 54 static void iosb_write(void *opaque, hwaddr addr, uint64_t val, in iosb_write() argument 67 s->regs[addr >> 8] = val; in iosb_write() 72 addr, val, size); in iosb_write() 75 trace_iosb_write(addr, val, size); in iosb_write()
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H A D | djmemc.c | 37 uint64_t val = 0; in djmemc_read() local 45 val = s->regs[addr >> 2]; in djmemc_read() 50 addr, val, size); in djmemc_read() 53 trace_djmemc_read(addr, val, size); in djmemc_read() 54 return val; in djmemc_read() 57 static void djmemc_write(void *opaque, hwaddr addr, uint64_t val, in djmemc_write() argument 62 trace_djmemc_write(addr, val, size); in djmemc_write() 70 s->regs[addr >> 2] = val; in djmemc_write() 75 addr, val, size); in djmemc_write()
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H A D | exynos4210_rng.c | 93 uint64_t val) in exynos4210_rng_set_seed() argument 147 uint32_t val = 0; in exynos4210_rng_read() local 153 val = s->reg_control; in exynos4210_rng_read() 157 val = s->reg_status; in exynos4210_rng_read() 167 offset, val); in exynos4210_rng_read() 176 return val; in exynos4210_rng_read() 180 uint64_t val, unsigned size) in exynos4210_rng_write() argument 188 DPRINTF("RNG_CONTROL_1 = 0x%" PRIx64 "\n", val); in exynos4210_rng_write() 189 s->reg_control = val; in exynos4210_rng_write() 196 s->reg_status |= val & EXYNOS4210_RNG_STATUS_WRITE_MASK; in exynos4210_rng_write() [all …]
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H A D | grlib_ahb_apb_pnp.c | 136 uint32_t val; in grlib_ahb_pnp_read() local 138 val = ahb_pnp->regs[offset >> 2]; in grlib_ahb_pnp_read() 139 val = extract32(val, (4 - (offset & 3) - size) * 8, size * 8); in grlib_ahb_pnp_read() 140 trace_grlib_ahb_pnp_read(offset, size, val); in grlib_ahb_pnp_read() 142 return val; in grlib_ahb_pnp_read() 146 uint64_t val, unsigned size) in grlib_ahb_pnp_write() argument 248 uint32_t val; in grlib_apb_pnp_read() local 250 val = apb_pnp->regs[offset >> 2]; in grlib_apb_pnp_read() 251 val = extract32(val, (4 - (offset & 3) - size) * 8, size * 8); in grlib_apb_pnp_read() 252 trace_grlib_apb_pnp_read(offset, size, val); in grlib_apb_pnp_read() [all …]
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/qemu/hw/mips/ |
H A D | boston.c | 168 uint64_t val = 0; in boston_lcd_read() local 189 return val; in boston_lcd_read() 230 uint32_t gic_freq, val; in boston_platreg_read() local 250 return val; in boston_platreg_read() 252 val = PLAT_BUILD_CFG_PCIE0_EN; in boston_platreg_read() 253 val |= PLAT_BUILD_CFG_PCIE1_EN; in boston_platreg_read() 254 val |= PLAT_BUILD_CFG_PCIE2_EN; in boston_platreg_read() 255 return val; in boston_platreg_read() 257 val = s->mach->ram_size / GiB; in boston_platreg_read() 259 val |= PLAT_DDR_CFG_MHZ; in boston_platreg_read() [all …]
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/qemu/hw/i386/ |
H A D | intel_iommu.c | 114 ((oldval & ~wmask) | (val & wmask)) & ~(w1cmask & val)); in vtd_set_quad() 677 ce->val[2] = le64_to_cpu(ce->val[2]); in vtd_get_context_entry_from_root() 678 ce->val[3] = le64_to_cpu(ce->val[3]); in vtd_get_context_entry_from_root() 777 pdire->val = le64_to_cpu(pdire->val); in vtd_get_pdire_from_pdir_table() 804 pe->val[i] = le64_to_cpu(pe->val[i]); in vtd_get_pe_in_pasid_leaf_table() 1443 __func__, ce->val[3], ce->val[2], in vtd_context_entry_rsvd_bits_check() 1444 ce->val[1], ce->val[0]); in vtd_context_entry_rsvd_bits_check() 2504 inv_desc->val[2] = le64_to_cpu(inv_desc->val[2]); in vtd_get_inv_desc() 2505 inv_desc->val[3] = le64_to_cpu(inv_desc->val[3]); in vtd_get_inv_desc() 2905 val = val & ((1ULL << 32) - 1); in vtd_mem_read() [all …]
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/qemu/hw/intc/ |
H A D | openpic.c | 460 src->idr = val & mask; in write_IRQreg_idr() 547 if (val & GCR_RESET) { in openpic_gcr_write() 571 __func__, addr, val); in openpic_gbl_write() 591 openpic_gcr_write(opp, val); in openpic_gbl_write() 607 opp->pir = val; in openpic_gbl_write() 693 tmr->tccr = val | tog; in qemu_timer_cb() 760 opp->tfrr = val; in openpic_tmr_write() 836 __func__, addr, val); in openpic_src_write() 890 __func__, addr, val); in openpic_msi_write() 961 __func__, addr, val); in openpic_summary_write() [all …]
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