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Searched refs:A0_DP2ADD (Results 1 – 25 of 34) sorted by relevance

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/dports/x11-drivers/xf86-video-intel/xf86-video-intel-31486f40f8e8f8923ca0799aea84b58799754564/xvmc/
H A Di915_program.h58 #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ macro
H A Di915_reg.h540 #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ macro
/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/mesa/drivers/dri/i915/
H A Di915_reg.h425 #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ macro
/dports/lang/clover/mesa-21.3.6/src/mesa/drivers/dri/i915/
H A Di915_reg.h425 #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ macro
/dports/graphics/libosmesa/mesa-21.3.6/src/mesa/drivers/dri/i915/
H A Di915_reg.h425 #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ macro
/dports/graphics/mesa-libs/mesa-21.3.6/src/mesa/drivers/dri/i915/
H A Di915_reg.h425 #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ macro
/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/mesa/drivers/dri/i915/
H A Di915_reg.h425 #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ macro
/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/mesa/drivers/dri/i915/
H A Di915_reg.h425 #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ macro
/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/mesa/drivers/dri/i915/
H A Di915_reg.h425 #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ macro
/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/mesa/drivers/dri/i915/
H A Di915_reg.h425 #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ macro
/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/mesa/drivers/dri/i915/
H A Di915_reg.h425 #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ macro
/dports/graphics/mesa-dri/mesa-21.3.6/src/mesa/drivers/dri/i915/
H A Di915_reg.h425 #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ macro
/dports/x11-drivers/xf86-video-intel/xf86-video-intel-31486f40f8e8f8923ca0799aea84b58799754564/src/sna/
H A Dgen3_render.h543 #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ macro
938 #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ macro
/dports/x11-drivers/xf86-video-intel/xf86-video-intel-31486f40f8e8f8923ca0799aea84b58799754564/src/uxa/
H A Di915_reg.h540 #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ macro
H A Di915_3d.h91 #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ macro
/dports/graphics/cairo/cairo-1.17.4/src/drm/
H A Dcairo-drm-intel-command-private.h579 #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ macro
/dports/www/firefox-esr/firefox-91.8.0/gfx/cairo/cairo/src/drm/
H A Dcairo-drm-intel-command-private.h579 #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ macro
/dports/www/firefox/firefox-99.0/gfx/cairo/cairo/src/drm/
H A Dcairo-drm-intel-command-private.h579 #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ macro
/dports/mail/thunderbird/thunderbird-91.8.0/gfx/cairo/cairo/src/drm/
H A Dcairo-drm-intel-command-private.h579 #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ macro
/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/gallium/drivers/i915/
H A Di915_reg.h526 #define A0_DP2ADD \ macro
/dports/lang/clover/mesa-21.3.6/src/gallium/drivers/i915/
H A Di915_reg.h526 #define A0_DP2ADD \ macro
/dports/graphics/libosmesa/mesa-21.3.6/src/gallium/drivers/i915/
H A Di915_reg.h526 #define A0_DP2ADD \ macro
/dports/graphics/mesa-libs/mesa-21.3.6/src/gallium/drivers/i915/
H A Di915_reg.h526 #define A0_DP2ADD \ macro
/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/gallium/drivers/i915/
H A Di915_reg.h526 #define A0_DP2ADD \ macro
/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/gallium/drivers/i915/
H A Di915_reg.h526 #define A0_DP2ADD \ macro

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