| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerCombiner.cpp | 167 unsigned ShiftAmt, AddSubOpc; in matchAArch64MulConstCombine() local
181 AddSubOpc = TargetOpcode::G_ADD; in matchAArch64MulConstCombine()
184 AddSubOpc = TargetOpcode::G_SUB; in matchAArch64MulConstCombine()
194 AddSubOpc = TargetOpcode::G_SUB; in matchAArch64MulConstCombine()
198 AddSubOpc = TargetOpcode::G_ADD; in matchAArch64MulConstCombine()
213 auto Res = B.buildInstr(AddSubOpc, {Ty}, {AddSubLHS, AddSubRHS}); in matchAArch64MulConstCombine()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerCombiner.cpp | 167 unsigned ShiftAmt, AddSubOpc; in matchAArch64MulConstCombine() local
181 AddSubOpc = TargetOpcode::G_ADD; in matchAArch64MulConstCombine()
184 AddSubOpc = TargetOpcode::G_SUB; in matchAArch64MulConstCombine()
194 AddSubOpc = TargetOpcode::G_SUB; in matchAArch64MulConstCombine()
198 AddSubOpc = TargetOpcode::G_ADD; in matchAArch64MulConstCombine()
213 auto Res = B.buildInstr(AddSubOpc, {Ty}, {AddSubLHS, AddSubRHS}); in matchAArch64MulConstCombine()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerCombiner.cpp | 167 unsigned ShiftAmt, AddSubOpc; in matchAArch64MulConstCombine() local
181 AddSubOpc = TargetOpcode::G_ADD; in matchAArch64MulConstCombine()
184 AddSubOpc = TargetOpcode::G_SUB; in matchAArch64MulConstCombine()
194 AddSubOpc = TargetOpcode::G_SUB; in matchAArch64MulConstCombine()
198 AddSubOpc = TargetOpcode::G_ADD; in matchAArch64MulConstCombine()
213 auto Res = B.buildInstr(AddSubOpc, {Ty}, {AddSubLHS, AddSubRHS}); in matchAArch64MulConstCombine()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/ARM/ |
| H A D | MLxExpansionPass.cpp | 68 unsigned MulOpc, unsigned AddSubOpc,
270 unsigned MulOpc, unsigned AddSubOpc, in ExpandFPMLxInstruction() argument
285 const MCInstrDesc &MCID2 = TII->get(AddSubOpc); in ExpandFPMLxInstruction()
354 unsigned MulOpc, AddSubOpc; in ExpandFPMLxInstructions() local
357 MulOpc, AddSubOpc, NegAcc, HasLane) || in ExpandFPMLxInstructions()
361 ExpandFPMLxInstruction(MBB, MI, MulOpc, AddSubOpc, NegAcc, HasLane); in ExpandFPMLxInstructions()
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/ARM/ |
| H A D | MLxExpansionPass.cpp | 68 unsigned MulOpc, unsigned AddSubOpc,
270 unsigned MulOpc, unsigned AddSubOpc, in ExpandFPMLxInstruction() argument
285 const MCInstrDesc &MCID2 = TII->get(AddSubOpc); in ExpandFPMLxInstruction()
354 unsigned MulOpc, AddSubOpc; in ExpandFPMLxInstructions() local
357 MulOpc, AddSubOpc, NegAcc, HasLane) || in ExpandFPMLxInstructions()
361 ExpandFPMLxInstruction(MBB, MI, MulOpc, AddSubOpc, NegAcc, HasLane); in ExpandFPMLxInstructions()
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/ARM/ |
| H A D | MLxExpansionPass.cpp | 68 unsigned MulOpc, unsigned AddSubOpc,
270 unsigned MulOpc, unsigned AddSubOpc, in ExpandFPMLxInstruction() argument
285 const MCInstrDesc &MCID2 = TII->get(AddSubOpc); in ExpandFPMLxInstruction()
354 unsigned MulOpc, AddSubOpc; in ExpandFPMLxInstructions() local
357 MulOpc, AddSubOpc, NegAcc, HasLane) || in ExpandFPMLxInstructions()
361 ExpandFPMLxInstruction(MBB, MI, MulOpc, AddSubOpc, NegAcc, HasLane); in ExpandFPMLxInstructions()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerCombiner.cpp | 171 unsigned ShiftAmt, AddSubOpc; in matchAArch64MulConstCombine() local
185 AddSubOpc = TargetOpcode::G_ADD; in matchAArch64MulConstCombine()
188 AddSubOpc = TargetOpcode::G_SUB; in matchAArch64MulConstCombine()
198 AddSubOpc = TargetOpcode::G_SUB; in matchAArch64MulConstCombine()
202 AddSubOpc = TargetOpcode::G_ADD; in matchAArch64MulConstCombine()
217 auto Res = B.buildInstr(AddSubOpc, {Ty}, {AddSubLHS, AddSubRHS}); in matchAArch64MulConstCombine()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
| H A D | MLxExpansionPass.cpp | 68 unsigned MulOpc, unsigned AddSubOpc,
270 unsigned MulOpc, unsigned AddSubOpc,
285 const MCInstrDesc &MCID2 = TII->get(AddSubOpc);
354 unsigned MulOpc, AddSubOpc;
357 MulOpc, AddSubOpc, NegAcc, HasLane) ||
361 ExpandFPMLxInstruction(MBB, MI, MulOpc, AddSubOpc, NegAcc, HasLane);
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerCombiner.cpp | 171 unsigned ShiftAmt, AddSubOpc; in matchAArch64MulConstCombine() local
185 AddSubOpc = TargetOpcode::G_ADD; in matchAArch64MulConstCombine()
188 AddSubOpc = TargetOpcode::G_SUB; in matchAArch64MulConstCombine()
198 AddSubOpc = TargetOpcode::G_SUB; in matchAArch64MulConstCombine()
202 AddSubOpc = TargetOpcode::G_ADD; in matchAArch64MulConstCombine()
217 auto Res = B.buildInstr(AddSubOpc, {Ty}, {AddSubLHS, AddSubRHS}); in matchAArch64MulConstCombine()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/ARM/ |
| H A D | MLxExpansionPass.cpp | 68 unsigned MulOpc, unsigned AddSubOpc,
270 unsigned MulOpc, unsigned AddSubOpc, in ExpandFPMLxInstruction() argument
285 const MCInstrDesc &MCID2 = TII->get(AddSubOpc); in ExpandFPMLxInstruction()
354 unsigned MulOpc, AddSubOpc; in ExpandFPMLxInstructions() local
357 MulOpc, AddSubOpc, NegAcc, HasLane) || in ExpandFPMLxInstructions()
361 ExpandFPMLxInstruction(MBB, MI, MulOpc, AddSubOpc, NegAcc, HasLane); in ExpandFPMLxInstructions()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/ |
| H A D | MLxExpansionPass.cpp | 68 unsigned MulOpc, unsigned AddSubOpc,
270 unsigned MulOpc, unsigned AddSubOpc, in ExpandFPMLxInstruction() argument
285 const MCInstrDesc &MCID2 = TII->get(AddSubOpc); in ExpandFPMLxInstruction()
354 unsigned MulOpc, AddSubOpc; in ExpandFPMLxInstructions() local
357 MulOpc, AddSubOpc, NegAcc, HasLane) || in ExpandFPMLxInstructions()
361 ExpandFPMLxInstruction(MBB, MI, MulOpc, AddSubOpc, NegAcc, HasLane); in ExpandFPMLxInstructions()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/ARM/ |
| H A D | MLxExpansionPass.cpp | 68 unsigned MulOpc, unsigned AddSubOpc,
270 unsigned MulOpc, unsigned AddSubOpc, in ExpandFPMLxInstruction() argument
285 const MCInstrDesc &MCID2 = TII->get(AddSubOpc); in ExpandFPMLxInstruction()
354 unsigned MulOpc, AddSubOpc; in ExpandFPMLxInstructions() local
357 MulOpc, AddSubOpc, NegAcc, HasLane) || in ExpandFPMLxInstructions()
361 ExpandFPMLxInstruction(MBB, MI, MulOpc, AddSubOpc, NegAcc, HasLane); in ExpandFPMLxInstructions()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerCombiner.cpp | 171 unsigned ShiftAmt, AddSubOpc; in matchAArch64MulConstCombine() local
185 AddSubOpc = TargetOpcode::G_ADD; in matchAArch64MulConstCombine()
188 AddSubOpc = TargetOpcode::G_SUB; in matchAArch64MulConstCombine()
198 AddSubOpc = TargetOpcode::G_SUB; in matchAArch64MulConstCombine()
202 AddSubOpc = TargetOpcode::G_ADD; in matchAArch64MulConstCombine()
217 auto Res = B.buildInstr(AddSubOpc, {Ty}, {AddSubLHS, AddSubRHS}); in matchAArch64MulConstCombine()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | MLxExpansionPass.cpp | 68 unsigned MulOpc, unsigned AddSubOpc,
270 unsigned MulOpc, unsigned AddSubOpc, in ExpandFPMLxInstruction() argument
285 const MCInstrDesc &MCID2 = TII->get(AddSubOpc); in ExpandFPMLxInstruction()
354 unsigned MulOpc, AddSubOpc; in ExpandFPMLxInstructions() local
357 MulOpc, AddSubOpc, NegAcc, HasLane) || in ExpandFPMLxInstructions()
361 ExpandFPMLxInstruction(MBB, MI, MulOpc, AddSubOpc, NegAcc, HasLane); in ExpandFPMLxInstructions()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/ARM/ |
| H A D | MLxExpansionPass.cpp | 68 unsigned MulOpc, unsigned AddSubOpc,
270 unsigned MulOpc, unsigned AddSubOpc, in ExpandFPMLxInstruction() argument
285 const MCInstrDesc &MCID2 = TII->get(AddSubOpc); in ExpandFPMLxInstruction()
354 unsigned MulOpc, AddSubOpc; in ExpandFPMLxInstructions() local
357 MulOpc, AddSubOpc, NegAcc, HasLane) || in ExpandFPMLxInstructions()
361 ExpandFPMLxInstruction(MBB, MI, MulOpc, AddSubOpc, NegAcc, HasLane); in ExpandFPMLxInstructions()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/ARM/ |
| H A D | MLxExpansionPass.cpp | 68 unsigned MulOpc, unsigned AddSubOpc,
270 unsigned MulOpc, unsigned AddSubOpc, in ExpandFPMLxInstruction() argument
285 const MCInstrDesc &MCID2 = TII->get(AddSubOpc); in ExpandFPMLxInstruction()
354 unsigned MulOpc, AddSubOpc; in ExpandFPMLxInstructions() local
357 MulOpc, AddSubOpc, NegAcc, HasLane) || in ExpandFPMLxInstructions()
361 ExpandFPMLxInstruction(MBB, MI, MulOpc, AddSubOpc, NegAcc, HasLane); in ExpandFPMLxInstructions()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
| H A D | MLxExpansionPass.cpp | 68 unsigned MulOpc, unsigned AddSubOpc,
270 unsigned MulOpc, unsigned AddSubOpc, in ExpandFPMLxInstruction() argument
285 const MCInstrDesc &MCID2 = TII->get(AddSubOpc); in ExpandFPMLxInstruction()
354 unsigned MulOpc, AddSubOpc; in ExpandFPMLxInstructions() local
357 MulOpc, AddSubOpc, NegAcc, HasLane) || in ExpandFPMLxInstructions()
361 ExpandFPMLxInstruction(MBB, MI, MulOpc, AddSubOpc, NegAcc, HasLane); in ExpandFPMLxInstructions()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerCombiner.cpp | 171 unsigned ShiftAmt, AddSubOpc; in matchAArch64MulConstCombine() local
185 AddSubOpc = TargetOpcode::G_ADD; in matchAArch64MulConstCombine()
188 AddSubOpc = TargetOpcode::G_SUB; in matchAArch64MulConstCombine()
198 AddSubOpc = TargetOpcode::G_SUB; in matchAArch64MulConstCombine()
202 AddSubOpc = TargetOpcode::G_ADD; in matchAArch64MulConstCombine()
217 auto Res = B.buildInstr(AddSubOpc, {Ty}, {AddSubLHS, AddSubRHS}); in matchAArch64MulConstCombine()
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/ARM/ |
| H A D | MLxExpansionPass.cpp | 68 unsigned MulOpc, unsigned AddSubOpc,
270 unsigned MulOpc, unsigned AddSubOpc, in ExpandFPMLxInstruction() argument
285 const MCInstrDesc &MCID2 = TII->get(AddSubOpc); in ExpandFPMLxInstruction()
354 unsigned MulOpc, AddSubOpc; in ExpandFPMLxInstructions() local
357 MulOpc, AddSubOpc, NegAcc, HasLane) || in ExpandFPMLxInstructions()
361 ExpandFPMLxInstruction(MBB, MI, MulOpc, AddSubOpc, NegAcc, HasLane); in ExpandFPMLxInstructions()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/ |
| H A D | MLxExpansionPass.cpp | 68 unsigned MulOpc, unsigned AddSubOpc,
270 unsigned MulOpc, unsigned AddSubOpc, in ExpandFPMLxInstruction() argument
285 const MCInstrDesc &MCID2 = TII->get(AddSubOpc); in ExpandFPMLxInstruction()
354 unsigned MulOpc, AddSubOpc; in ExpandFPMLxInstructions() local
357 MulOpc, AddSubOpc, NegAcc, HasLane) || in ExpandFPMLxInstructions()
361 ExpandFPMLxInstruction(MBB, MI, MulOpc, AddSubOpc, NegAcc, HasLane); in ExpandFPMLxInstructions()
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerCombiner.cpp | 171 unsigned ShiftAmt, AddSubOpc; in matchAArch64MulConstCombine() local
185 AddSubOpc = TargetOpcode::G_ADD; in matchAArch64MulConstCombine()
188 AddSubOpc = TargetOpcode::G_SUB; in matchAArch64MulConstCombine()
198 AddSubOpc = TargetOpcode::G_SUB; in matchAArch64MulConstCombine()
202 AddSubOpc = TargetOpcode::G_ADD; in matchAArch64MulConstCombine()
217 auto Res = B.buildInstr(AddSubOpc, {Ty}, {AddSubLHS, AddSubRHS}); in matchAArch64MulConstCombine()
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
| H A D | MLxExpansionPass.cpp | 68 unsigned MulOpc, unsigned AddSubOpc,
270 unsigned MulOpc, unsigned AddSubOpc, in ExpandFPMLxInstruction() argument
285 const MCInstrDesc &MCID2 = TII->get(AddSubOpc); in ExpandFPMLxInstruction()
354 unsigned MulOpc, AddSubOpc; in ExpandFPMLxInstructions() local
357 MulOpc, AddSubOpc, NegAcc, HasLane) || in ExpandFPMLxInstructions()
361 ExpandFPMLxInstruction(MBB, MI, MulOpc, AddSubOpc, NegAcc, HasLane); in ExpandFPMLxInstructions()
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/ARM/ |
| H A D | MLxExpansionPass.cpp | 68 unsigned MulOpc, unsigned AddSubOpc,
272 unsigned MulOpc, unsigned AddSubOpc, in ExpandFPMLxInstruction() argument
287 const MCInstrDesc &MCID2 = TII->get(AddSubOpc); in ExpandFPMLxInstruction()
356 unsigned MulOpc, AddSubOpc; in ExpandFPMLxInstructions() local
359 MulOpc, AddSubOpc, NegAcc, HasLane) || in ExpandFPMLxInstructions()
363 ExpandFPMLxInstruction(MBB, MI, MulOpc, AddSubOpc, NegAcc, HasLane); in ExpandFPMLxInstructions()
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/ARM/ |
| H A D | MLxExpansionPass.cpp | 69 unsigned MulOpc, unsigned AddSubOpc,
273 unsigned MulOpc, unsigned AddSubOpc, in ExpandFPMLxInstruction() argument
288 const MCInstrDesc &MCID2 = TII->get(AddSubOpc); in ExpandFPMLxInstruction()
357 unsigned MulOpc, AddSubOpc; in ExpandFPMLxInstructions() local
360 MulOpc, AddSubOpc, NegAcc, HasLane) || in ExpandFPMLxInstructions()
364 ExpandFPMLxInstruction(MBB, MI, MulOpc, AddSubOpc, NegAcc, HasLane); in ExpandFPMLxInstructions()
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/ARM/ |
| H A D | MLxExpansionPass.cpp | 69 unsigned MulOpc, unsigned AddSubOpc,
273 unsigned MulOpc, unsigned AddSubOpc,
288 const MCInstrDesc &MCID2 = TII->get(AddSubOpc);
357 unsigned MulOpc, AddSubOpc;
360 MulOpc, AddSubOpc, NegAcc, HasLane) ||
364 ExpandFPMLxInstruction(MBB, MI, MulOpc, AddSubOpc, NegAcc, HasLane);
|