/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/ARC/ |
H A D | ARCRegisterInfo.td | 65 let AltOrders=[(add (sequence "R%u", 0, 25), GP, FP, SP, ILINK, R30, BLINK)]; 69 // 1 is AltOrders[0] 70 // 2 is AltOrders[1] and so on
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/ARM/ |
H A D | ARMRegisterInfo.td | 230 let AltOrders = [(add LR, GPR), (trunc GPR, 8), 300 let AltOrders = [(add LR, rGPR), (trunc rGPR, 8), 339 let AltOrders = [(and tcGPR, tGPR)]; 346 let AltOrders = [(and tGPROdd, tGPR)]; 355 let AltOrders = [(and tGPREven, tGPR)]; 382 let AltOrders = [(add (decimate SPR, 2), SPR), 394 let AltOrders = [(add (decimate HPR, 2), SPR), 419 let AltOrders = [(rotl DPR, 16), 452 let AltOrders = [(rotl QPR, 8), (trunc QPR, 8)]; 537 let AltOrders = [(rotl QQPR, 8)]; [all …]
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/ARM/ |
H A D | ARMRegisterInfo.td | 230 let AltOrders = [(add LR, GPR), (trunc GPR, 8), 300 let AltOrders = [(add LR, rGPR), (trunc rGPR, 8), 339 let AltOrders = [(and tcGPR, tGPR)]; 346 let AltOrders = [(and tGPROdd, tGPR)]; 355 let AltOrders = [(and tGPREven, tGPR)]; 382 let AltOrders = [(add (decimate SPR, 2), SPR), 394 let AltOrders = [(add (decimate HPR, 2), SPR), 419 let AltOrders = [(rotl DPR, 16), 452 let AltOrders = [(rotl QPR, 8), (trunc QPR, 8)]; 537 let AltOrders = [(rotl QQPR, 8)]; [all …]
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/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/ARM/ |
H A D | ARMRegisterInfo.td | 230 let AltOrders = [(add LR, GPR), (trunc GPR, 8), 300 let AltOrders = [(add LR, rGPR), (trunc rGPR, 8), 328 let AltOrders = [(and tcGPR, tGPR)]; 335 let AltOrders = [(and tGPROdd, tGPR)]; 344 let AltOrders = [(and tGPREven, tGPR)]; 371 let AltOrders = [(add (decimate SPR, 2), SPR), 383 let AltOrders = [(add (decimate HPR, 2), SPR), 408 let AltOrders = [(rotl DPR, 16), 441 let AltOrders = [(rotl QPR, 8), (trunc QPR, 8)]; 526 let AltOrders = [(rotl QQPR, 8)]; [all …]
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/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/ARM/ |
H A D | ARMRegisterInfo.td | 230 let AltOrders = [(add LR, GPR), (trunc GPR, 8), 300 let AltOrders = [(add LR, rGPR), (trunc rGPR, 8), 339 let AltOrders = [(and tcGPR, tGPR)]; 346 let AltOrders = [(and tGPROdd, tGPR)]; 355 let AltOrders = [(and tGPREven, tGPR)]; 382 let AltOrders = [(add (decimate SPR, 2), SPR), 394 let AltOrders = [(add (decimate HPR, 2), SPR), 419 let AltOrders = [(rotl DPR, 16), 452 let AltOrders = [(rotl QPR, 8), (trunc QPR, 8)]; 537 let AltOrders = [(rotl QQPR, 8)]; [all …]
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
H A D | ARMRegisterInfo.td | 230 let AltOrders = [(add LR, GPR), (trunc GPR, 8), 300 let AltOrders = [(add LR, rGPR), (trunc rGPR, 8), 328 let AltOrders = [(and tcGPR, tGPR)]; 335 let AltOrders = [(and tGPROdd, tGPR)]; 344 let AltOrders = [(and tGPREven, tGPR)]; 371 let AltOrders = [(add (decimate SPR, 2), SPR), 383 let AltOrders = [(add (decimate HPR, 2), SPR), 408 let AltOrders = [(rotl DPR, 16), 441 let AltOrders = [(rotl QPR, 8), (trunc QPR, 8)]; 526 let AltOrders = [(rotl QQPR, 8)]; [all …]
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMRegisterInfo.td | 230 let AltOrders = [(add LR, GPR), (trunc GPR, 8), 300 let AltOrders = [(add LR, rGPR), (trunc rGPR, 8), 328 let AltOrders = [(and tcGPR, tGPR)]; 335 let AltOrders = [(and tGPROdd, tGPR)]; 344 let AltOrders = [(and tGPREven, tGPR)]; 371 let AltOrders = [(add (decimate SPR, 2), SPR), 383 let AltOrders = [(add (decimate HPR, 2), SPR), 408 let AltOrders = [(rotl DPR, 16), 441 let AltOrders = [(rotl QPR, 8), (trunc QPR, 8)]; 526 let AltOrders = [(rotl QQPR, 8)]; [all …]
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/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/ARM/ |
H A D | ARMRegisterInfo.td | 230 let AltOrders = [(add LR, GPR), (trunc GPR, 8), 300 let AltOrders = [(add LR, rGPR), (trunc rGPR, 8), 328 let AltOrders = [(and tcGPR, tGPR)]; 335 let AltOrders = [(and tGPROdd, tGPR)]; 344 let AltOrders = [(and tGPREven, tGPR)]; 371 let AltOrders = [(add (decimate SPR, 2), SPR), 383 let AltOrders = [(add (decimate HPR, 2), SPR), 408 let AltOrders = [(rotl DPR, 16), 441 let AltOrders = [(rotl QPR, 8), (trunc QPR, 8)]; 518 let AltOrders = [(rotl QQPR, 8)]; [all …]
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMRegisterInfo.td | 230 let AltOrders = [(add LR, GPR), (trunc GPR, 8), 317 let AltOrders = [(add LR, rGPR), (trunc rGPR, 8), 356 let AltOrders = [(and tcGPR, tGPR)]; 363 let AltOrders = [(and tGPROdd, tGPR)]; 372 let AltOrders = [(and tGPREven, tGPR)]; 399 let AltOrders = [(add (decimate SPR, 2), SPR), 411 let AltOrders = [(add (decimate HPR, 2), SPR), 436 let AltOrders = [(rotl DPR, 16), 469 let AltOrders = [(rotl QPR, 8), (trunc QPR, 8)]; 554 let AltOrders = [(rotl QQPR, 8)]; [all …]
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/ARM/ |
H A D | ARMRegisterInfo.td | 230 let AltOrders = [(add LR, GPR), (trunc GPR, 8), 317 let AltOrders = [(add LR, rGPR), (trunc rGPR, 8), 356 let AltOrders = [(and tcGPR, tGPR)]; 363 let AltOrders = [(and tGPROdd, tGPR)]; 372 let AltOrders = [(and tGPREven, tGPR)]; 399 let AltOrders = [(add (decimate SPR, 2), SPR), 411 let AltOrders = [(add (decimate HPR, 2), SPR), 436 let AltOrders = [(rotl DPR, 16), 469 let AltOrders = [(rotl QPR, 8), (trunc QPR, 8)]; 554 let AltOrders = [(rotl QQPR, 8)]; [all …]
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMRegisterInfo.td | 230 let AltOrders = [(add LR, GPR), (trunc GPR, 8), 317 let AltOrders = [(add LR, rGPR), (trunc rGPR, 8), 356 let AltOrders = [(and tcGPR, tGPR)]; 363 let AltOrders = [(and tGPROdd, tGPR)]; 372 let AltOrders = [(and tGPREven, tGPR)]; 399 let AltOrders = [(add (decimate SPR, 2), SPR), 411 let AltOrders = [(add (decimate HPR, 2), SPR), 436 let AltOrders = [(rotl DPR, 16), 469 let AltOrders = [(rotl QPR, 8), (trunc QPR, 8)]; 554 let AltOrders = [(rotl QQPR, 8)]; [all …]
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMRegisterInfo.td | 230 let AltOrders = [(add LR, GPR), (trunc GPR, 8), 317 let AltOrders = [(add LR, rGPR), (trunc rGPR, 8), 356 let AltOrders = [(and tcGPR, tGPR)]; 363 let AltOrders = [(and tGPROdd, tGPR)]; 372 let AltOrders = [(and tGPREven, tGPR)]; 399 let AltOrders = [(add (decimate SPR, 2), SPR), 411 let AltOrders = [(add (decimate HPR, 2), SPR), 436 let AltOrders = [(rotl DPR, 16), 469 let AltOrders = [(rotl QPR, 8), (trunc QPR, 8)]; 554 let AltOrders = [(rotl QQPR, 8)]; [all …]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/ARM/ |
H A D | ARMRegisterInfo.td | 232 let AltOrders = [(add LR, GPR), (trunc GPR, 8), 319 let AltOrders = [(add LR, rGPR), (trunc rGPR, 8), 358 let AltOrders = [(and tcGPR, tGPR)]; 365 let AltOrders = [(and tGPROdd, tGPR)]; 374 let AltOrders = [(and tGPREven, tGPR)]; 401 let AltOrders = [(add (decimate SPR, 2), SPR), 413 let AltOrders = [(add (decimate HPR, 2), SPR), 438 let AltOrders = [(rotl DPR, 16), 471 let AltOrders = [(rotl QPR, 8), (trunc QPR, 8)]; 556 let AltOrders = [(rotl QQPR, 8)]; [all …]
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMRegisterInfo.td | 230 let AltOrders = [(add LR, GPR), (trunc GPR, 8), 317 let AltOrders = [(add LR, rGPR), (trunc rGPR, 8), 356 let AltOrders = [(and tcGPR, tGPR)]; 363 let AltOrders = [(and tGPROdd, tGPR)]; 372 let AltOrders = [(and tGPREven, tGPR)]; 399 let AltOrders = [(add (decimate SPR, 2), SPR), 411 let AltOrders = [(add (decimate HPR, 2), SPR), 436 let AltOrders = [(rotl DPR, 16), 469 let AltOrders = [(rotl QPR, 8), (trunc QPR, 8)]; 554 let AltOrders = [(rotl QQPR, 8)]; [all …]
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMRegisterInfo.td | 230 let AltOrders = [(add LR, GPR), (trunc GPR, 8), 317 let AltOrders = [(add LR, rGPR), (trunc rGPR, 8), 356 let AltOrders = [(and tcGPR, tGPR)]; 363 let AltOrders = [(and tGPROdd, tGPR)]; 372 let AltOrders = [(and tGPREven, tGPR)]; 399 let AltOrders = [(add (decimate SPR, 2), SPR), 411 let AltOrders = [(add (decimate HPR, 2), SPR), 436 let AltOrders = [(rotl DPR, 16), 469 let AltOrders = [(rotl QPR, 8), (trunc QPR, 8)]; 554 let AltOrders = [(rotl QQPR, 8)]; [all …]
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMRegisterInfo.td | 230 let AltOrders = [(add LR, GPR), (trunc GPR, 8), 317 let AltOrders = [(add LR, rGPR), (trunc rGPR, 8), 356 let AltOrders = [(and tcGPR, tGPR)]; 363 let AltOrders = [(and tGPROdd, tGPR)]; 372 let AltOrders = [(and tGPREven, tGPR)]; 399 let AltOrders = [(add (decimate SPR, 2), SPR), 411 let AltOrders = [(add (decimate HPR, 2), SPR), 436 let AltOrders = [(rotl DPR, 16), 469 let AltOrders = [(rotl QPR, 8), (trunc QPR, 8)]; 554 let AltOrders = [(rotl QQPR, 8)]; [all …]
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/dports/emulators/qemu/qemu-6.2.0/capstone/suite/synctools/tablegen/ARM/ |
H A D | ARMRegisterInfo-digit.td | 212 let AltOrders = [(add LR, GPR), (trunc GPR, 8)]; 223 let AltOrders = [(add LR, GPRnopc), (trunc GPRnopc, 8)]; 234 let AltOrders = [(add LR, GPRnopc), (trunc GPRnopc, 8)]; 255 let AltOrders = [(add LR, rGPR), (trunc rGPR, 8)]; 282 let AltOrders = [(and tcGPR, tGPR)]; 299 let AltOrders = [(add (decimate SPR, 2), SPR), 311 let AltOrders = [(add (decimate HPR, 2), SPR), 336 let AltOrders = [(rotl DPR, 16), 362 let AltOrders = [(rotl QPR, 8)]; 428 let AltOrders = [(rotl QQPR, 8)]; [all …]
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H A D | ARMRegisterInfo.td | 212 let AltOrders = [(add LR, GPR), (trunc GPR, 8)]; 223 let AltOrders = [(add LR, GPRnopc), (trunc GPRnopc, 8)]; 234 let AltOrders = [(add LR, GPRnopc), (trunc GPRnopc, 8)]; 255 let AltOrders = [(add LR, rGPR), (trunc rGPR, 8)]; 282 let AltOrders = [(and tcGPR, tGPR)]; 299 let AltOrders = [(add (decimate SPR, 2), SPR), 311 let AltOrders = [(add (decimate HPR, 2), SPR), 336 let AltOrders = [(rotl DPR, 16), 362 let AltOrders = [(rotl QPR, 8)]; 428 let AltOrders = [(rotl QQPR, 8)]; [all …]
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/dports/emulators/qemu60/qemu-6.0.0/capstone/suite/synctools/tablegen/ARM/ |
H A D | ARMRegisterInfo-digit.td | 212 let AltOrders = [(add LR, GPR), (trunc GPR, 8)]; 223 let AltOrders = [(add LR, GPRnopc), (trunc GPRnopc, 8)]; 234 let AltOrders = [(add LR, GPRnopc), (trunc GPRnopc, 8)]; 255 let AltOrders = [(add LR, rGPR), (trunc rGPR, 8)]; 282 let AltOrders = [(and tcGPR, tGPR)]; 299 let AltOrders = [(add (decimate SPR, 2), SPR), 311 let AltOrders = [(add (decimate HPR, 2), SPR), 336 let AltOrders = [(rotl DPR, 16), 362 let AltOrders = [(rotl QPR, 8)]; 428 let AltOrders = [(rotl QQPR, 8)]; [all …]
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H A D | ARMRegisterInfo.td | 212 let AltOrders = [(add LR, GPR), (trunc GPR, 8)]; 223 let AltOrders = [(add LR, GPRnopc), (trunc GPRnopc, 8)]; 234 let AltOrders = [(add LR, GPRnopc), (trunc GPRnopc, 8)]; 255 let AltOrders = [(add LR, rGPR), (trunc rGPR, 8)]; 282 let AltOrders = [(and tcGPR, tGPR)]; 299 let AltOrders = [(add (decimate SPR, 2), SPR), 311 let AltOrders = [(add (decimate HPR, 2), SPR), 336 let AltOrders = [(rotl DPR, 16), 362 let AltOrders = [(rotl QPR, 8)]; 428 let AltOrders = [(rotl QQPR, 8)]; [all …]
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/dports/emulators/qemu5/qemu-5.2.0/capstone/suite/synctools/tablegen/ARM/ |
H A D | ARMRegisterInfo.td | 212 let AltOrders = [(add LR, GPR), (trunc GPR, 8)]; 223 let AltOrders = [(add LR, GPRnopc), (trunc GPRnopc, 8)]; 234 let AltOrders = [(add LR, GPRnopc), (trunc GPRnopc, 8)]; 255 let AltOrders = [(add LR, rGPR), (trunc rGPR, 8)]; 282 let AltOrders = [(and tcGPR, tGPR)]; 299 let AltOrders = [(add (decimate SPR, 2), SPR), 311 let AltOrders = [(add (decimate HPR, 2), SPR), 336 let AltOrders = [(rotl DPR, 16), 362 let AltOrders = [(rotl QPR, 8)]; 428 let AltOrders = [(rotl QQPR, 8)]; [all …]
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H A D | ARMRegisterInfo-digit.td | 212 let AltOrders = [(add LR, GPR), (trunc GPR, 8)]; 223 let AltOrders = [(add LR, GPRnopc), (trunc GPRnopc, 8)]; 234 let AltOrders = [(add LR, GPRnopc), (trunc GPRnopc, 8)]; 255 let AltOrders = [(add LR, rGPR), (trunc rGPR, 8)]; 282 let AltOrders = [(and tcGPR, tGPR)]; 299 let AltOrders = [(add (decimate SPR, 2), SPR), 311 let AltOrders = [(add (decimate HPR, 2), SPR), 336 let AltOrders = [(rotl DPR, 16), 362 let AltOrders = [(rotl QPR, 8)]; 428 let AltOrders = [(rotl QQPR, 8)]; [all …]
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/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/ARM/ |
H A D | ARMRegisterInfo.td | 212 let AltOrders = [(add LR, GPR), (trunc GPR, 8)]; 223 let AltOrders = [(add LR, GPRnopc), (trunc GPRnopc, 8)]; 234 let AltOrders = [(add LR, GPRnopc), (trunc GPRnopc, 8)]; 255 let AltOrders = [(add LR, rGPR), (trunc rGPR, 8)]; 282 let AltOrders = [(and tcGPR, tGPR)]; 299 let AltOrders = [(add (decimate SPR, 2), SPR), 311 let AltOrders = [(add (decimate HPR, 2), SPR), 336 let AltOrders = [(rotl DPR, 16), 362 let AltOrders = [(rotl QPR, 8)]; 428 let AltOrders = [(rotl QQPR, 8)]; [all …]
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/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/ARM/ |
H A D | ARMRegisterInfo.td | 212 let AltOrders = [(add LR, GPR), (trunc GPR, 8)]; 223 let AltOrders = [(add LR, GPRnopc), (trunc GPRnopc, 8)]; 234 let AltOrders = [(add LR, GPRnopc), (trunc GPRnopc, 8)]; 255 let AltOrders = [(add LR, rGPR), (trunc rGPR, 8)]; 282 let AltOrders = [(and tcGPR, tGPR)]; 299 let AltOrders = [(add (decimate SPR, 2), SPR), 311 let AltOrders = [(add (decimate HPR, 2), SPR), 336 let AltOrders = [(rotl DPR, 16), 362 let AltOrders = [(rotl QPR, 8)]; 428 let AltOrders = [(rotl QQPR, 8)]; [all …]
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/PowerPC/ |
H A D | PPCRegisterInfo.td | 261 let AltOrders = [(add (sub GPRC, R2), R2)]; 272 let AltOrders = [(add (sub G8RC, X2), X2)]; 284 let AltOrders = [(add (sub GPRC_NOR0, R2), R2)]; 293 let AltOrders = [(add (sub G8RC_NOX0, X2), X2)]; 366 let AltOrders = [(sub CRBITRC, CR2LT, CR2GT, CR2EQ, CR2UN, CR3LT, CR3GT, 377 let AltOrders = [(sub CRRC, CR2, CR3, CR4)];
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