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Searched refs:AmtVT (Results 1 – 25 of 73) sorted by relevance

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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/X86/
H A DX86InstCombineIntrinsic.cpp204 auto AmtVT = Amt->getType(); in simplifyX86immShift() local
212 assert(AmtVT->isIntegerTy(32) && "Unexpected shift-by-immediate type"); in simplifyX86immShift()
231 assert(AmtVT->isVectorTy() && AmtVT->getPrimitiveSizeInBits() == 128 && in simplifyX86immShift()
232 cast<VectorType>(AmtVT)->getElementType() == SVT && in simplifyX86immShift()
234 unsigned NumAmtElts = cast<FixedVectorType>(AmtVT)->getNumElements(); in simplifyX86immShift()
258 assert(AmtVT->isVectorTy() && AmtVT->getPrimitiveSizeInBits() == 128 && in simplifyX86immShift()
259 cast<VectorType>(AmtVT)->getElementType() == SVT && in simplifyX86immShift()
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/X86/
H A DX86InstCombineIntrinsic.cpp204 Type *AmtVT = Amt->getType();
212 assert(AmtVT->isIntegerTy(32) && "Unexpected shift-by-immediate type");
231 assert(AmtVT->isVectorTy() && AmtVT->getPrimitiveSizeInBits() == 128 &&
232 cast<VectorType>(AmtVT)->getElementType() == SVT &&
234 unsigned NumAmtElts = cast<FixedVectorType>(AmtVT)->getNumElements();
258 assert(AmtVT->isVectorTy() && AmtVT->getPrimitiveSizeInBits() == 128 &&
259 cast<VectorType>(AmtVT)->getElementType() == SVT &&
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/X86/
H A DX86InstCombineIntrinsic.cpp204 Type *AmtVT = Amt->getType(); in simplifyX86immShift() local
212 assert(AmtVT->isIntegerTy(32) && "Unexpected shift-by-immediate type"); in simplifyX86immShift()
231 assert(AmtVT->isVectorTy() && AmtVT->getPrimitiveSizeInBits() == 128 && in simplifyX86immShift()
232 cast<VectorType>(AmtVT)->getElementType() == SVT && in simplifyX86immShift()
234 unsigned NumAmtElts = cast<FixedVectorType>(AmtVT)->getNumElements(); in simplifyX86immShift()
258 assert(AmtVT->isVectorTy() && AmtVT->getPrimitiveSizeInBits() == 128 && in simplifyX86immShift()
259 cast<VectorType>(AmtVT)->getElementType() == SVT && in simplifyX86immShift()
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/X86/
H A DX86InstCombineIntrinsic.cpp204 auto AmtVT = Amt->getType(); in simplifyX86immShift() local
212 assert(AmtVT->isIntegerTy(32) && "Unexpected shift-by-immediate type"); in simplifyX86immShift()
231 assert(AmtVT->isVectorTy() && AmtVT->getPrimitiveSizeInBits() == 128 && in simplifyX86immShift()
232 cast<VectorType>(AmtVT)->getElementType() == SVT && in simplifyX86immShift()
234 unsigned NumAmtElts = cast<FixedVectorType>(AmtVT)->getNumElements(); in simplifyX86immShift()
258 assert(AmtVT->isVectorTy() && AmtVT->getPrimitiveSizeInBits() == 128 && in simplifyX86immShift()
259 cast<VectorType>(AmtVT)->getElementType() == SVT && in simplifyX86immShift()
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/X86/
H A DX86InstCombineIntrinsic.cpp204 Type *AmtVT = Amt->getType(); in simplifyX86immShift() local
212 assert(AmtVT->isIntegerTy(32) && "Unexpected shift-by-immediate type"); in simplifyX86immShift()
231 assert(AmtVT->isVectorTy() && AmtVT->getPrimitiveSizeInBits() == 128 && in simplifyX86immShift()
232 cast<VectorType>(AmtVT)->getElementType() == SVT && in simplifyX86immShift()
234 unsigned NumAmtElts = cast<FixedVectorType>(AmtVT)->getNumElements(); in simplifyX86immShift()
258 assert(AmtVT->isVectorTy() && AmtVT->getPrimitiveSizeInBits() == 128 && in simplifyX86immShift()
259 cast<VectorType>(AmtVT)->getElementType() == SVT && in simplifyX86immShift()
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/X86/
H A DX86InstCombineIntrinsic.cpp204 Type *AmtVT = Amt->getType(); in simplifyX86immShift() local
212 assert(AmtVT->isIntegerTy(32) && "Unexpected shift-by-immediate type"); in simplifyX86immShift()
231 assert(AmtVT->isVectorTy() && AmtVT->getPrimitiveSizeInBits() == 128 && in simplifyX86immShift()
232 cast<VectorType>(AmtVT)->getElementType() == SVT && in simplifyX86immShift()
234 unsigned NumAmtElts = cast<FixedVectorType>(AmtVT)->getNumElements(); in simplifyX86immShift()
258 assert(AmtVT->isVectorTy() && AmtVT->getPrimitiveSizeInBits() == 128 && in simplifyX86immShift()
259 cast<VectorType>(AmtVT)->getElementType() == SVT && in simplifyX86immShift()
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/X86/
H A DX86InstCombineIntrinsic.cpp204 Type *AmtVT = Amt->getType(); in simplifyX86immShift() local
212 assert(AmtVT->isIntegerTy(32) && "Unexpected shift-by-immediate type"); in simplifyX86immShift()
231 assert(AmtVT->isVectorTy() && AmtVT->getPrimitiveSizeInBits() == 128 && in simplifyX86immShift()
232 cast<VectorType>(AmtVT)->getElementType() == SVT && in simplifyX86immShift()
234 unsigned NumAmtElts = cast<FixedVectorType>(AmtVT)->getNumElements(); in simplifyX86immShift()
258 assert(AmtVT->isVectorTy() && AmtVT->getPrimitiveSizeInBits() == 128 && in simplifyX86immShift()
259 cast<VectorType>(AmtVT)->getElementType() == SVT && in simplifyX86immShift()
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/X86/
H A DX86InstCombineIntrinsic.cpp204 auto AmtVT = Amt->getType(); in simplifyX86immShift() local
212 assert(AmtVT->isIntegerTy(32) && "Unexpected shift-by-immediate type"); in simplifyX86immShift()
231 assert(AmtVT->isVectorTy() && AmtVT->getPrimitiveSizeInBits() == 128 && in simplifyX86immShift()
232 cast<VectorType>(AmtVT)->getElementType() == SVT && in simplifyX86immShift()
234 unsigned NumAmtElts = cast<FixedVectorType>(AmtVT)->getNumElements(); in simplifyX86immShift()
258 assert(AmtVT->isVectorTy() && AmtVT->getPrimitiveSizeInBits() == 128 && in simplifyX86immShift()
259 cast<VectorType>(AmtVT)->getElementType() == SVT && in simplifyX86immShift()
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/X86/
H A DX86InstCombineIntrinsic.cpp204 Type *AmtVT = Amt->getType(); in simplifyX86immShift() local
212 assert(AmtVT->isIntegerTy(32) && "Unexpected shift-by-immediate type"); in simplifyX86immShift()
231 assert(AmtVT->isVectorTy() && AmtVT->getPrimitiveSizeInBits() == 128 && in simplifyX86immShift()
232 cast<VectorType>(AmtVT)->getElementType() == SVT && in simplifyX86immShift()
234 unsigned NumAmtElts = cast<FixedVectorType>(AmtVT)->getNumElements(); in simplifyX86immShift()
258 assert(AmtVT->isVectorTy() && AmtVT->getPrimitiveSizeInBits() == 128 && in simplifyX86immShift()
259 cast<VectorType>(AmtVT)->getElementType() == SVT && in simplifyX86immShift()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp294 EVT AmtVT = Amt.getValueType(); in LowerShifts() local
295 Amt = DAG.getNode(ISD::AND, dl, AmtVT, Amt, in LowerShifts()
296 DAG.getConstant(VT.getSizeInBits() - 1, dl, AmtVT)); in LowerShifts()
301 EVT AmtVT = Amt.getValueType(); in LowerShifts() local
302 Amt = DAG.getNode(ISD::AND, dl, AmtVT, Amt, in LowerShifts()
303 DAG.getConstant(VT.getSizeInBits() - 1, dl, AmtVT)); in LowerShifts()
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp294 EVT AmtVT = Amt.getValueType(); in LowerShifts() local
295 Amt = DAG.getNode(ISD::AND, dl, AmtVT, Amt, in LowerShifts()
296 DAG.getConstant(VT.getSizeInBits() - 1, dl, AmtVT)); in LowerShifts()
301 EVT AmtVT = Amt.getValueType(); in LowerShifts() local
302 Amt = DAG.getNode(ISD::AND, dl, AmtVT, Amt, in LowerShifts()
303 DAG.getConstant(VT.getSizeInBits() - 1, dl, AmtVT)); in LowerShifts()
/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AVR/
H A DAVRISelLowering.cpp294 EVT AmtVT = Amt.getValueType(); in LowerShifts() local
295 Amt = DAG.getNode(ISD::AND, dl, AmtVT, Amt, in LowerShifts()
296 DAG.getConstant(VT.getSizeInBits() - 1, dl, AmtVT)); in LowerShifts()
301 EVT AmtVT = Amt.getValueType(); in LowerShifts() local
302 Amt = DAG.getNode(ISD::AND, dl, AmtVT, Amt, in LowerShifts()
303 DAG.getConstant(VT.getSizeInBits() - 1, dl, AmtVT)); in LowerShifts()
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp294 EVT AmtVT = Amt.getValueType(); in LowerShifts() local
295 Amt = DAG.getNode(ISD::AND, dl, AmtVT, Amt, in LowerShifts()
296 DAG.getConstant(VT.getSizeInBits() - 1, dl, AmtVT)); in LowerShifts()
301 EVT AmtVT = Amt.getValueType(); in LowerShifts() local
302 Amt = DAG.getNode(ISD::AND, dl, AmtVT, Amt, in LowerShifts()
303 DAG.getConstant(VT.getSizeInBits() - 1, dl, AmtVT)); in LowerShifts()
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AVR/
H A DAVRISelLowering.cpp294 EVT AmtVT = Amt.getValueType(); in LowerShifts() local
295 Amt = DAG.getNode(ISD::AND, dl, AmtVT, Amt, in LowerShifts()
296 DAG.getConstant(VT.getSizeInBits() - 1, dl, AmtVT)); in LowerShifts()
301 EVT AmtVT = Amt.getValueType(); in LowerShifts() local
302 Amt = DAG.getNode(ISD::AND, dl, AmtVT, Amt, in LowerShifts()
303 DAG.getConstant(VT.getSizeInBits() - 1, dl, AmtVT)); in LowerShifts()
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp294 EVT AmtVT = Amt.getValueType(); in LowerShifts() local
295 Amt = DAG.getNode(ISD::AND, dl, AmtVT, Amt, in LowerShifts()
296 DAG.getConstant(VT.getSizeInBits() - 1, dl, AmtVT)); in LowerShifts()
301 EVT AmtVT = Amt.getValueType(); in LowerShifts() local
302 Amt = DAG.getNode(ISD::AND, dl, AmtVT, Amt, in LowerShifts()
303 DAG.getConstant(VT.getSizeInBits() - 1, dl, AmtVT)); in LowerShifts()
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp294 EVT AmtVT = Amt.getValueType(); in LowerShifts() local
295 Amt = DAG.getNode(ISD::AND, dl, AmtVT, Amt, in LowerShifts()
296 DAG.getConstant(VT.getSizeInBits() - 1, dl, AmtVT)); in LowerShifts()
301 EVT AmtVT = Amt.getValueType(); in LowerShifts() local
302 Amt = DAG.getNode(ISD::AND, dl, AmtVT, Amt, in LowerShifts()
303 DAG.getConstant(VT.getSizeInBits() - 1, dl, AmtVT)); in LowerShifts()
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp294 EVT AmtVT = Amt.getValueType(); in LowerShifts() local
295 Amt = DAG.getNode(ISD::AND, dl, AmtVT, Amt, in LowerShifts()
296 DAG.getConstant(VT.getSizeInBits() - 1, dl, AmtVT)); in LowerShifts()
301 EVT AmtVT = Amt.getValueType(); in LowerShifts() local
302 Amt = DAG.getNode(ISD::AND, dl, AmtVT, Amt, in LowerShifts()
303 DAG.getConstant(VT.getSizeInBits() - 1, dl, AmtVT)); in LowerShifts()
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp294 EVT AmtVT = Amt.getValueType(); in LowerShifts() local
295 Amt = DAG.getNode(ISD::AND, dl, AmtVT, Amt, in LowerShifts()
296 DAG.getConstant(VT.getSizeInBits() - 1, dl, AmtVT)); in LowerShifts()
301 EVT AmtVT = Amt.getValueType(); in LowerShifts() local
302 Amt = DAG.getNode(ISD::AND, dl, AmtVT, Amt, in LowerShifts()
303 DAG.getConstant(VT.getSizeInBits() - 1, dl, AmtVT)); in LowerShifts()
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp294 EVT AmtVT = Amt.getValueType(); in LowerShifts() local
295 Amt = DAG.getNode(ISD::AND, dl, AmtVT, Amt, in LowerShifts()
296 DAG.getConstant(VT.getSizeInBits() - 1, dl, AmtVT)); in LowerShifts()
301 EVT AmtVT = Amt.getValueType(); in LowerShifts() local
302 Amt = DAG.getNode(ISD::AND, dl, AmtVT, Amt, in LowerShifts()
303 DAG.getConstant(VT.getSizeInBits() - 1, dl, AmtVT)); in LowerShifts()
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp294 EVT AmtVT = Amt.getValueType(); in LowerShifts() local
295 Amt = DAG.getNode(ISD::AND, dl, AmtVT, Amt, in LowerShifts()
296 DAG.getConstant(VT.getSizeInBits() - 1, dl, AmtVT)); in LowerShifts()
301 EVT AmtVT = Amt.getValueType(); in LowerShifts() local
302 Amt = DAG.getNode(ISD::AND, dl, AmtVT, Amt, in LowerShifts()
303 DAG.getConstant(VT.getSizeInBits() - 1, dl, AmtVT)); in LowerShifts()
/dports/security/clamav-lts/clamav-0.103.5/libclamav/c++/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp3687 EVT AmtVT = Amt.getValueType(); in LowerSHL_PARTS() local
3689 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT, in LowerSHL_PARTS()
3694 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, in LowerSHL_PARTS()
3695 DAG.getConstant(-BitWidth, AmtVT)); in LowerSHL_PARTS()
3716 EVT AmtVT = Amt.getValueType(); in LowerSRL_PARTS() local
3718 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT, in LowerSRL_PARTS()
3723 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, in LowerSRL_PARTS()
3724 DAG.getConstant(-BitWidth, AmtVT)); in LowerSRL_PARTS()
3744 EVT AmtVT = Amt.getValueType(); in LowerSRA_PARTS() local
3746 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT, in LowerSRA_PARTS()
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Transforms/InstCombine/
H A DInstCombineCalls.cpp395 auto AmtVT = Amt->getType(); in simplifyX86immShift() local
403 assert(AmtVT ->isIntegerTy(32) && in simplifyX86immShift()
423 assert(AmtVT->isVectorTy() && AmtVT->getPrimitiveSizeInBits() == 128 && in simplifyX86immShift()
424 cast<VectorType>(AmtVT)->getElementType() == SVT && in simplifyX86immShift()
426 unsigned NumAmtElts = cast<VectorType>(AmtVT)->getNumElements(); in simplifyX86immShift()
450 assert(AmtVT->isVectorTy() && AmtVT->getPrimitiveSizeInBits() == 128 && in simplifyX86immShift()
451 cast<VectorType>(AmtVT)->getElementType() == SVT && in simplifyX86immShift()
/dports/devel/llvm11/llvm-11.0.1.src/lib/Transforms/InstCombine/
H A DInstCombineCalls.cpp379 auto AmtVT = Amt->getType(); in simplifyX86immShift() local
387 assert(AmtVT ->isIntegerTy(32) && in simplifyX86immShift()
407 assert(AmtVT->isVectorTy() && AmtVT->getPrimitiveSizeInBits() == 128 && in simplifyX86immShift()
408 cast<VectorType>(AmtVT)->getElementType() == SVT && in simplifyX86immShift()
410 unsigned NumAmtElts = cast<VectorType>(AmtVT)->getNumElements(); in simplifyX86immShift()
434 assert(AmtVT->isVectorTy() && AmtVT->getPrimitiveSizeInBits() == 128 && in simplifyX86immShift()
435 cast<VectorType>(AmtVT)->getElementType() == SVT && in simplifyX86immShift()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp8882 EVT AmtVT = Amt.getValueType(); in LowerSHL_PARTS() local
8884 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT, in LowerSHL_PARTS()
8889 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, in LowerSHL_PARTS()
8911 EVT AmtVT = Amt.getValueType(); in LowerSRL_PARTS() local
8913 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT, in LowerSRL_PARTS()
8918 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, in LowerSRL_PARTS()
8939 EVT AmtVT = Amt.getValueType(); in LowerSRA_PARTS() local
8941 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT, in LowerSRA_PARTS()
8966 EVT AmtVT = Z.getValueType(); in LowerFunnelShift() local
8972 Z = DAG.getNode(ISD::AND, dl, AmtVT, Z, in LowerFunnelShift()
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp8360 EVT AmtVT = Amt.getValueType(); in LowerSHL_PARTS() local
8362 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT, in LowerSHL_PARTS()
8367 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, in LowerSHL_PARTS()
8389 EVT AmtVT = Amt.getValueType(); in LowerSRL_PARTS() local
8391 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT, in LowerSRL_PARTS()
8396 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, in LowerSRL_PARTS()
8417 EVT AmtVT = Amt.getValueType(); in LowerSRA_PARTS() local
8419 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT, in LowerSRA_PARTS()
8444 EVT AmtVT = Z.getValueType(); in LowerFunnelShift() local
8450 Z = DAG.getNode(ISD::AND, dl, AmtVT, Z, in LowerFunnelShift()
[all …]

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