/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/intel/compiler/ |
H A D | brw_reg_type.h | 49 BRW_REGISTER_TYPE_DF, /* 64-bit float (double float) */ enumerator 76 case BRW_REGISTER_TYPE_DF: in brw_reg_type_is_floating_point() 123 case BRW_REGISTER_TYPE_DF: in brw_reg_type_from_bit_size() 130 return BRW_REGISTER_TYPE_DF; in brw_reg_type_from_bit_size()
|
H A D | brw_reg_type.c | 124 [BRW_REGISTER_TYPE_DF] = { GFX7_HW_REG_TYPE_DF, INVALID }, 139 [BRW_REGISTER_TYPE_DF] = { GFX7_HW_REG_TYPE_DF, GFX8_HW_IMM_TYPE_DF }, 188 [BRW_REGISTER_TYPE_DF] = { GFX12_HW_REG_TYPE_FLOAT(3), GFX12_HW_REG_TYPE_FLOAT(3) }, 251 [BRW_REGISTER_TYPE_DF] = { GFX7_3SRC_TYPE_DF }, 258 [BRW_REGISTER_TYPE_DF] = { GFX7_3SRC_TYPE_DF }, 264 [BRW_REGISTER_TYPE_DF] = { GFX10_ALIGN1_3SRC_REG_TYPE_DF, E(FLOAT) }, 302 [BRW_REGISTER_TYPE_DF] = { GFX12_HW_REG_TYPE_UINT(3), E(FLOAT), }, 509 [BRW_REGISTER_TYPE_DF] = 8, in brw_reg_type_to_size() 542 [BRW_REGISTER_TYPE_DF] = "DF", in brw_reg_type_to_letters()
|
H A D | brw_shader.cpp | 69 return BRW_REGISTER_TYPE_DF; in brw_type_for_base_type() 604 case BRW_REGISTER_TYPE_DF: in brw_saturate_immediate() 654 case BRW_REGISTER_TYPE_DF: in brw_negate_immediate() 692 case BRW_REGISTER_TYPE_DF: in brw_abs_immediate() 774 case BRW_REGISTER_TYPE_DF: in is_zero() 805 case BRW_REGISTER_TYPE_DF: in is_one() 836 case BRW_REGISTER_TYPE_DF: in is_negative_one()
|
/dports/lang/clover/mesa-21.3.6/src/intel/compiler/ |
H A D | brw_reg_type.h | 49 BRW_REGISTER_TYPE_DF, /* 64-bit float (double float) */ enumerator 76 case BRW_REGISTER_TYPE_DF: in brw_reg_type_is_floating_point() 123 case BRW_REGISTER_TYPE_DF: in brw_reg_type_from_bit_size() 130 return BRW_REGISTER_TYPE_DF; in brw_reg_type_from_bit_size()
|
H A D | brw_reg_type.c | 124 [BRW_REGISTER_TYPE_DF] = { GFX7_HW_REG_TYPE_DF, INVALID }, 139 [BRW_REGISTER_TYPE_DF] = { GFX7_HW_REG_TYPE_DF, GFX8_HW_IMM_TYPE_DF }, 188 [BRW_REGISTER_TYPE_DF] = { GFX12_HW_REG_TYPE_FLOAT(3), GFX12_HW_REG_TYPE_FLOAT(3) }, 251 [BRW_REGISTER_TYPE_DF] = { GFX7_3SRC_TYPE_DF }, 258 [BRW_REGISTER_TYPE_DF] = { GFX7_3SRC_TYPE_DF }, 264 [BRW_REGISTER_TYPE_DF] = { GFX10_ALIGN1_3SRC_REG_TYPE_DF, E(FLOAT) }, 302 [BRW_REGISTER_TYPE_DF] = { GFX12_HW_REG_TYPE_UINT(3), E(FLOAT), }, 509 [BRW_REGISTER_TYPE_DF] = 8, in brw_reg_type_to_size() 542 [BRW_REGISTER_TYPE_DF] = "DF", in brw_reg_type_to_letters()
|
H A D | brw_shader.cpp | 69 return BRW_REGISTER_TYPE_DF; in brw_type_for_base_type() 604 case BRW_REGISTER_TYPE_DF: in brw_saturate_immediate() 654 case BRW_REGISTER_TYPE_DF: in brw_negate_immediate() 692 case BRW_REGISTER_TYPE_DF: in brw_abs_immediate() 774 case BRW_REGISTER_TYPE_DF: in is_zero() 805 case BRW_REGISTER_TYPE_DF: in is_one() 836 case BRW_REGISTER_TYPE_DF: in is_negative_one()
|
/dports/graphics/libosmesa/mesa-21.3.6/src/intel/compiler/ |
H A D | brw_reg_type.h | 49 BRW_REGISTER_TYPE_DF, /* 64-bit float (double float) */ enumerator 76 case BRW_REGISTER_TYPE_DF: in brw_reg_type_is_floating_point() 123 case BRW_REGISTER_TYPE_DF: in brw_reg_type_from_bit_size() 130 return BRW_REGISTER_TYPE_DF; in brw_reg_type_from_bit_size()
|
H A D | brw_reg_type.c | 124 [BRW_REGISTER_TYPE_DF] = { GFX7_HW_REG_TYPE_DF, INVALID }, 139 [BRW_REGISTER_TYPE_DF] = { GFX7_HW_REG_TYPE_DF, GFX8_HW_IMM_TYPE_DF }, 188 [BRW_REGISTER_TYPE_DF] = { GFX12_HW_REG_TYPE_FLOAT(3), GFX12_HW_REG_TYPE_FLOAT(3) }, 251 [BRW_REGISTER_TYPE_DF] = { GFX7_3SRC_TYPE_DF }, 258 [BRW_REGISTER_TYPE_DF] = { GFX7_3SRC_TYPE_DF }, 264 [BRW_REGISTER_TYPE_DF] = { GFX10_ALIGN1_3SRC_REG_TYPE_DF, E(FLOAT) }, 302 [BRW_REGISTER_TYPE_DF] = { GFX12_HW_REG_TYPE_UINT(3), E(FLOAT), }, 509 [BRW_REGISTER_TYPE_DF] = 8, in brw_reg_type_to_size() 542 [BRW_REGISTER_TYPE_DF] = "DF", in brw_reg_type_to_letters()
|
/dports/graphics/mesa-libs/mesa-21.3.6/src/intel/compiler/ |
H A D | brw_reg_type.h | 49 BRW_REGISTER_TYPE_DF, /* 64-bit float (double float) */ enumerator 76 case BRW_REGISTER_TYPE_DF: in brw_reg_type_is_floating_point() 123 case BRW_REGISTER_TYPE_DF: in brw_reg_type_from_bit_size() 130 return BRW_REGISTER_TYPE_DF; in brw_reg_type_from_bit_size()
|
H A D | brw_reg_type.c | 124 [BRW_REGISTER_TYPE_DF] = { GFX7_HW_REG_TYPE_DF, INVALID }, 139 [BRW_REGISTER_TYPE_DF] = { GFX7_HW_REG_TYPE_DF, GFX8_HW_IMM_TYPE_DF }, 188 [BRW_REGISTER_TYPE_DF] = { GFX12_HW_REG_TYPE_FLOAT(3), GFX12_HW_REG_TYPE_FLOAT(3) }, 251 [BRW_REGISTER_TYPE_DF] = { GFX7_3SRC_TYPE_DF }, 258 [BRW_REGISTER_TYPE_DF] = { GFX7_3SRC_TYPE_DF }, 264 [BRW_REGISTER_TYPE_DF] = { GFX10_ALIGN1_3SRC_REG_TYPE_DF, E(FLOAT) }, 302 [BRW_REGISTER_TYPE_DF] = { GFX12_HW_REG_TYPE_UINT(3), E(FLOAT), }, 509 [BRW_REGISTER_TYPE_DF] = 8, in brw_reg_type_to_size() 542 [BRW_REGISTER_TYPE_DF] = "DF", in brw_reg_type_to_letters()
|
/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/intel/compiler/ |
H A D | brw_reg_type.h | 49 BRW_REGISTER_TYPE_DF, /* 64-bit float (double float) */ enumerator 76 case BRW_REGISTER_TYPE_DF: in brw_reg_type_is_floating_point() 123 case BRW_REGISTER_TYPE_DF: in brw_reg_type_from_bit_size() 130 return BRW_REGISTER_TYPE_DF; in brw_reg_type_from_bit_size()
|
H A D | brw_reg_type.c | 124 [BRW_REGISTER_TYPE_DF] = { GFX7_HW_REG_TYPE_DF, INVALID }, 139 [BRW_REGISTER_TYPE_DF] = { GFX7_HW_REG_TYPE_DF, GFX8_HW_IMM_TYPE_DF }, 188 [BRW_REGISTER_TYPE_DF] = { GFX12_HW_REG_TYPE_FLOAT(3), GFX12_HW_REG_TYPE_FLOAT(3) }, 251 [BRW_REGISTER_TYPE_DF] = { GFX7_3SRC_TYPE_DF }, 258 [BRW_REGISTER_TYPE_DF] = { GFX7_3SRC_TYPE_DF }, 264 [BRW_REGISTER_TYPE_DF] = { GFX10_ALIGN1_3SRC_REG_TYPE_DF, E(FLOAT) }, 302 [BRW_REGISTER_TYPE_DF] = { GFX12_HW_REG_TYPE_UINT(3), E(FLOAT), }, 509 [BRW_REGISTER_TYPE_DF] = 8, in brw_reg_type_to_size() 542 [BRW_REGISTER_TYPE_DF] = "DF", in brw_reg_type_to_letters()
|
/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/intel/compiler/ |
H A D | brw_reg_type.h | 49 BRW_REGISTER_TYPE_DF, /* 64-bit float (double float) */ enumerator 76 case BRW_REGISTER_TYPE_DF: in brw_reg_type_is_floating_point() 123 case BRW_REGISTER_TYPE_DF: in brw_reg_type_from_bit_size() 130 return BRW_REGISTER_TYPE_DF; in brw_reg_type_from_bit_size()
|
H A D | brw_reg_type.c | 124 [BRW_REGISTER_TYPE_DF] = { GFX7_HW_REG_TYPE_DF, INVALID }, 139 [BRW_REGISTER_TYPE_DF] = { GFX7_HW_REG_TYPE_DF, GFX8_HW_IMM_TYPE_DF }, 188 [BRW_REGISTER_TYPE_DF] = { GFX12_HW_REG_TYPE_FLOAT(3), GFX12_HW_REG_TYPE_FLOAT(3) }, 251 [BRW_REGISTER_TYPE_DF] = { GFX7_3SRC_TYPE_DF }, 258 [BRW_REGISTER_TYPE_DF] = { GFX7_3SRC_TYPE_DF }, 264 [BRW_REGISTER_TYPE_DF] = { GFX10_ALIGN1_3SRC_REG_TYPE_DF, E(FLOAT) }, 302 [BRW_REGISTER_TYPE_DF] = { GFX12_HW_REG_TYPE_UINT(3), E(FLOAT), }, 509 [BRW_REGISTER_TYPE_DF] = 8, in brw_reg_type_to_size() 542 [BRW_REGISTER_TYPE_DF] = "DF", in brw_reg_type_to_letters()
|
/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/intel/compiler/ |
H A D | brw_reg_type.h | 49 BRW_REGISTER_TYPE_DF, /* 64-bit float (double float) */ enumerator 76 case BRW_REGISTER_TYPE_DF: in brw_reg_type_is_floating_point() 123 case BRW_REGISTER_TYPE_DF: in brw_reg_type_from_bit_size() 130 return BRW_REGISTER_TYPE_DF; in brw_reg_type_from_bit_size()
|
H A D | brw_reg_type.c | 124 [BRW_REGISTER_TYPE_DF] = { GFX7_HW_REG_TYPE_DF, INVALID }, 139 [BRW_REGISTER_TYPE_DF] = { GFX7_HW_REG_TYPE_DF, GFX8_HW_IMM_TYPE_DF }, 188 [BRW_REGISTER_TYPE_DF] = { GFX12_HW_REG_TYPE_FLOAT(3), GFX12_HW_REG_TYPE_FLOAT(3) }, 251 [BRW_REGISTER_TYPE_DF] = { GFX7_3SRC_TYPE_DF }, 258 [BRW_REGISTER_TYPE_DF] = { GFX7_3SRC_TYPE_DF }, 264 [BRW_REGISTER_TYPE_DF] = { GFX10_ALIGN1_3SRC_REG_TYPE_DF, E(FLOAT) }, 302 [BRW_REGISTER_TYPE_DF] = { GFX12_HW_REG_TYPE_UINT(3), E(FLOAT), }, 509 [BRW_REGISTER_TYPE_DF] = 8, in brw_reg_type_to_size() 542 [BRW_REGISTER_TYPE_DF] = "DF", in brw_reg_type_to_letters()
|
/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/intel/compiler/ |
H A D | brw_reg_type.h | 49 BRW_REGISTER_TYPE_DF, /* 64-bit float (double float) */ enumerator 76 case BRW_REGISTER_TYPE_DF: in brw_reg_type_is_floating_point() 123 case BRW_REGISTER_TYPE_DF: in brw_reg_type_from_bit_size() 130 return BRW_REGISTER_TYPE_DF; in brw_reg_type_from_bit_size()
|
H A D | brw_reg_type.c | 124 [BRW_REGISTER_TYPE_DF] = { GFX7_HW_REG_TYPE_DF, INVALID }, 139 [BRW_REGISTER_TYPE_DF] = { GFX7_HW_REG_TYPE_DF, GFX8_HW_IMM_TYPE_DF }, 188 [BRW_REGISTER_TYPE_DF] = { GFX12_HW_REG_TYPE_FLOAT(3), GFX12_HW_REG_TYPE_FLOAT(3) }, 251 [BRW_REGISTER_TYPE_DF] = { GFX7_3SRC_TYPE_DF }, 258 [BRW_REGISTER_TYPE_DF] = { GFX7_3SRC_TYPE_DF }, 264 [BRW_REGISTER_TYPE_DF] = { GFX10_ALIGN1_3SRC_REG_TYPE_DF, E(FLOAT) }, 302 [BRW_REGISTER_TYPE_DF] = { GFX12_HW_REG_TYPE_UINT(3), E(FLOAT), }, 509 [BRW_REGISTER_TYPE_DF] = 8, in brw_reg_type_to_size() 542 [BRW_REGISTER_TYPE_DF] = "DF", in brw_reg_type_to_letters()
|
/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/intel/compiler/ |
H A D | brw_reg_type.h | 49 BRW_REGISTER_TYPE_DF, /* 64-bit float (double float) */ enumerator 76 case BRW_REGISTER_TYPE_DF: in brw_reg_type_is_floating_point() 123 case BRW_REGISTER_TYPE_DF: in brw_reg_type_from_bit_size() 130 return BRW_REGISTER_TYPE_DF; in brw_reg_type_from_bit_size()
|
H A D | brw_reg_type.c | 124 [BRW_REGISTER_TYPE_DF] = { GFX7_HW_REG_TYPE_DF, INVALID }, 139 [BRW_REGISTER_TYPE_DF] = { GFX7_HW_REG_TYPE_DF, GFX8_HW_IMM_TYPE_DF }, 188 [BRW_REGISTER_TYPE_DF] = { GFX12_HW_REG_TYPE_FLOAT(3), GFX12_HW_REG_TYPE_FLOAT(3) }, 251 [BRW_REGISTER_TYPE_DF] = { GFX7_3SRC_TYPE_DF }, 258 [BRW_REGISTER_TYPE_DF] = { GFX7_3SRC_TYPE_DF }, 264 [BRW_REGISTER_TYPE_DF] = { GFX10_ALIGN1_3SRC_REG_TYPE_DF, E(FLOAT) }, 302 [BRW_REGISTER_TYPE_DF] = { GFX12_HW_REG_TYPE_UINT(3), E(FLOAT), }, 509 [BRW_REGISTER_TYPE_DF] = 8, in brw_reg_type_to_size() 542 [BRW_REGISTER_TYPE_DF] = "DF", in brw_reg_type_to_letters()
|
/dports/graphics/mesa-dri/mesa-21.3.6/src/intel/compiler/ |
H A D | brw_reg_type.h | 49 BRW_REGISTER_TYPE_DF, /* 64-bit float (double float) */ enumerator 76 case BRW_REGISTER_TYPE_DF: in brw_reg_type_is_floating_point() 123 case BRW_REGISTER_TYPE_DF: in brw_reg_type_from_bit_size() 130 return BRW_REGISTER_TYPE_DF; in brw_reg_type_from_bit_size()
|
H A D | brw_reg_type.c | 124 [BRW_REGISTER_TYPE_DF] = { GFX7_HW_REG_TYPE_DF, INVALID }, 139 [BRW_REGISTER_TYPE_DF] = { GFX7_HW_REG_TYPE_DF, GFX8_HW_IMM_TYPE_DF }, 188 [BRW_REGISTER_TYPE_DF] = { GFX12_HW_REG_TYPE_FLOAT(3), GFX12_HW_REG_TYPE_FLOAT(3) }, 251 [BRW_REGISTER_TYPE_DF] = { GFX7_3SRC_TYPE_DF }, 258 [BRW_REGISTER_TYPE_DF] = { GFX7_3SRC_TYPE_DF }, 264 [BRW_REGISTER_TYPE_DF] = { GFX10_ALIGN1_3SRC_REG_TYPE_DF, E(FLOAT) }, 302 [BRW_REGISTER_TYPE_DF] = { GFX12_HW_REG_TYPE_UINT(3), E(FLOAT), }, 509 [BRW_REGISTER_TYPE_DF] = 8, in brw_reg_type_to_size() 542 [BRW_REGISTER_TYPE_DF] = "DF", in brw_reg_type_to_letters()
|
/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/intel/compiler/ |
H A D | brw_reg_type.c | 124 [BRW_REGISTER_TYPE_DF] = { GEN7_HW_REG_TYPE_DF, INVALID }, 139 [BRW_REGISTER_TYPE_DF] = { GEN7_HW_REG_TYPE_DF, GEN8_HW_IMM_TYPE_DF }, 233 [BRW_REGISTER_TYPE_DF] = { GEN7_3SRC_TYPE_DF }, 240 [BRW_REGISTER_TYPE_DF] = { GEN7_3SRC_TYPE_DF }, 246 [BRW_REGISTER_TYPE_DF] = { GEN10_ALIGN1_3SRC_REG_TYPE_DF, E(FLOAT) }, 466 [BRW_REGISTER_TYPE_DF] = 8, in brw_reg_type_to_size() 499 [BRW_REGISTER_TYPE_DF] = "DF", in brw_reg_type_to_letters()
|
H A D | brw_reg_type.h | 49 BRW_REGISTER_TYPE_DF, enumerator 76 case BRW_REGISTER_TYPE_DF: in brw_reg_type_is_floating_point()
|
H A D | brw_shader.cpp | 69 return BRW_REGISTER_TYPE_DF; in brw_type_for_base_type() 575 case BRW_REGISTER_TYPE_DF: in brw_saturate_immediate() 625 case BRW_REGISTER_TYPE_DF: in brw_negate_immediate() 663 case BRW_REGISTER_TYPE_DF: in brw_abs_immediate() 744 case BRW_REGISTER_TYPE_DF: in is_zero() 775 case BRW_REGISTER_TYPE_DF: in is_one() 806 case BRW_REGISTER_TYPE_DF: in is_negative_one()
|