/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/intel/compiler/ |
H A D | brw_reg_type.h | 51 BRW_REGISTER_TYPE_HF, /* 16-bit float (half float) */ enumerator 78 case BRW_REGISTER_TYPE_HF: in brw_reg_type_is_floating_point() 121 case BRW_REGISTER_TYPE_HF: in brw_reg_type_from_bit_size() 126 return BRW_REGISTER_TYPE_HF; in brw_reg_type_from_bit_size()
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H A D | brw_reg_type.c | 141 [BRW_REGISTER_TYPE_HF] = { GFX8_HW_REG_TYPE_HF, GFX8_HW_IMM_TYPE_HF }, 159 [BRW_REGISTER_TYPE_HF] = { GFX11_HW_REG_TYPE_HF, GFX11_HW_IMM_TYPE_HF }, 174 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_FLOAT(1), GFX12_HW_REG_TYPE_FLOAT(1) }, 190 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_FLOAT(1), GFX12_HW_REG_TYPE_FLOAT(1) }, 259 [BRW_REGISTER_TYPE_HF] = { GFX8_3SRC_TYPE_HF }, 266 [BRW_REGISTER_TYPE_HF] = { GFX10_ALIGN1_3SRC_REG_TYPE_HF, E(FLOAT) }, 279 [BRW_REGISTER_TYPE_HF] = { GFX10_ALIGN1_3SRC_REG_TYPE_HF, E(FLOAT) }, 291 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_UINT(1), E(FLOAT), }, 304 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_UINT(1), E(FLOAT), }, 511 [BRW_REGISTER_TYPE_HF] = 2, in brw_reg_type_to_size() [all …]
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H A D | brw_eu_validate.c | 496 case BRW_REGISTER_TYPE_HF: in execution_type_for_type() 537 if (src0_exec_type == BRW_REGISTER_TYPE_HF) in execution_type() 617 (dst_type == BRW_REGISTER_TYPE_HF || src0_type == BRW_REGISTER_TYPE_HF)) { in is_half_float_conversion() 622 (dst_type == BRW_REGISTER_TYPE_HF || in is_half_float_conversion() 623 src1_type == BRW_REGISTER_TYPE_HF); in is_half_float_conversion() 810 ERROR_IF(dst_type == BRW_REGISTER_TYPE_HF && in general_restrictions_based_on_operand_types() 851 if ((dst_type == BRW_REGISTER_TYPE_HF && in general_restrictions_based_on_operand_types() 855 (src0_type == BRW_REGISTER_TYPE_HF || in general_restrictions_based_on_operand_types() 1201 dst_type == BRW_REGISTER_TYPE_HF, in special_restrictions_for_mixed_float_mode() 1212 if (src0_type == BRW_REGISTER_TYPE_HF) { in special_restrictions_for_mixed_float_mode() [all …]
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/dports/lang/clover/mesa-21.3.6/src/intel/compiler/ |
H A D | brw_reg_type.h | 51 BRW_REGISTER_TYPE_HF, /* 16-bit float (half float) */ enumerator 78 case BRW_REGISTER_TYPE_HF: in brw_reg_type_is_floating_point() 121 case BRW_REGISTER_TYPE_HF: in brw_reg_type_from_bit_size() 126 return BRW_REGISTER_TYPE_HF; in brw_reg_type_from_bit_size()
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H A D | brw_reg_type.c | 141 [BRW_REGISTER_TYPE_HF] = { GFX8_HW_REG_TYPE_HF, GFX8_HW_IMM_TYPE_HF }, 159 [BRW_REGISTER_TYPE_HF] = { GFX11_HW_REG_TYPE_HF, GFX11_HW_IMM_TYPE_HF }, 174 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_FLOAT(1), GFX12_HW_REG_TYPE_FLOAT(1) }, 190 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_FLOAT(1), GFX12_HW_REG_TYPE_FLOAT(1) }, 259 [BRW_REGISTER_TYPE_HF] = { GFX8_3SRC_TYPE_HF }, 266 [BRW_REGISTER_TYPE_HF] = { GFX10_ALIGN1_3SRC_REG_TYPE_HF, E(FLOAT) }, 279 [BRW_REGISTER_TYPE_HF] = { GFX10_ALIGN1_3SRC_REG_TYPE_HF, E(FLOAT) }, 291 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_UINT(1), E(FLOAT), }, 304 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_UINT(1), E(FLOAT), }, 511 [BRW_REGISTER_TYPE_HF] = 2, in brw_reg_type_to_size() [all …]
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H A D | brw_eu_validate.c | 496 case BRW_REGISTER_TYPE_HF: in execution_type_for_type() 537 if (src0_exec_type == BRW_REGISTER_TYPE_HF) in execution_type() 617 (dst_type == BRW_REGISTER_TYPE_HF || src0_type == BRW_REGISTER_TYPE_HF)) { in is_half_float_conversion() 622 (dst_type == BRW_REGISTER_TYPE_HF || in is_half_float_conversion() 623 src1_type == BRW_REGISTER_TYPE_HF); in is_half_float_conversion() 810 ERROR_IF(dst_type == BRW_REGISTER_TYPE_HF && in general_restrictions_based_on_operand_types() 851 if ((dst_type == BRW_REGISTER_TYPE_HF && in general_restrictions_based_on_operand_types() 855 (src0_type == BRW_REGISTER_TYPE_HF || in general_restrictions_based_on_operand_types() 1201 dst_type == BRW_REGISTER_TYPE_HF, in special_restrictions_for_mixed_float_mode() 1212 if (src0_type == BRW_REGISTER_TYPE_HF) { in special_restrictions_for_mixed_float_mode() [all …]
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/dports/graphics/libosmesa/mesa-21.3.6/src/intel/compiler/ |
H A D | brw_reg_type.h | 51 BRW_REGISTER_TYPE_HF, /* 16-bit float (half float) */ enumerator 78 case BRW_REGISTER_TYPE_HF: in brw_reg_type_is_floating_point() 121 case BRW_REGISTER_TYPE_HF: in brw_reg_type_from_bit_size() 126 return BRW_REGISTER_TYPE_HF; in brw_reg_type_from_bit_size()
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H A D | brw_reg_type.c | 141 [BRW_REGISTER_TYPE_HF] = { GFX8_HW_REG_TYPE_HF, GFX8_HW_IMM_TYPE_HF }, 159 [BRW_REGISTER_TYPE_HF] = { GFX11_HW_REG_TYPE_HF, GFX11_HW_IMM_TYPE_HF }, 174 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_FLOAT(1), GFX12_HW_REG_TYPE_FLOAT(1) }, 190 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_FLOAT(1), GFX12_HW_REG_TYPE_FLOAT(1) }, 259 [BRW_REGISTER_TYPE_HF] = { GFX8_3SRC_TYPE_HF }, 266 [BRW_REGISTER_TYPE_HF] = { GFX10_ALIGN1_3SRC_REG_TYPE_HF, E(FLOAT) }, 279 [BRW_REGISTER_TYPE_HF] = { GFX10_ALIGN1_3SRC_REG_TYPE_HF, E(FLOAT) }, 291 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_UINT(1), E(FLOAT), }, 304 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_UINT(1), E(FLOAT), }, 511 [BRW_REGISTER_TYPE_HF] = 2, in brw_reg_type_to_size() [all …]
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H A D | brw_eu_validate.c | 496 case BRW_REGISTER_TYPE_HF: in execution_type_for_type() 537 if (src0_exec_type == BRW_REGISTER_TYPE_HF) in execution_type() 617 (dst_type == BRW_REGISTER_TYPE_HF || src0_type == BRW_REGISTER_TYPE_HF)) { in is_half_float_conversion() 622 (dst_type == BRW_REGISTER_TYPE_HF || in is_half_float_conversion() 623 src1_type == BRW_REGISTER_TYPE_HF); in is_half_float_conversion() 810 ERROR_IF(dst_type == BRW_REGISTER_TYPE_HF && in general_restrictions_based_on_operand_types() 851 if ((dst_type == BRW_REGISTER_TYPE_HF && in general_restrictions_based_on_operand_types() 855 (src0_type == BRW_REGISTER_TYPE_HF || in general_restrictions_based_on_operand_types() 1201 dst_type == BRW_REGISTER_TYPE_HF, in special_restrictions_for_mixed_float_mode() 1212 if (src0_type == BRW_REGISTER_TYPE_HF) { in special_restrictions_for_mixed_float_mode() [all …]
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/dports/graphics/mesa-libs/mesa-21.3.6/src/intel/compiler/ |
H A D | brw_reg_type.h | 51 BRW_REGISTER_TYPE_HF, /* 16-bit float (half float) */ enumerator 78 case BRW_REGISTER_TYPE_HF: in brw_reg_type_is_floating_point() 121 case BRW_REGISTER_TYPE_HF: in brw_reg_type_from_bit_size() 126 return BRW_REGISTER_TYPE_HF; in brw_reg_type_from_bit_size()
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H A D | brw_reg_type.c | 141 [BRW_REGISTER_TYPE_HF] = { GFX8_HW_REG_TYPE_HF, GFX8_HW_IMM_TYPE_HF }, 159 [BRW_REGISTER_TYPE_HF] = { GFX11_HW_REG_TYPE_HF, GFX11_HW_IMM_TYPE_HF }, 174 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_FLOAT(1), GFX12_HW_REG_TYPE_FLOAT(1) }, 190 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_FLOAT(1), GFX12_HW_REG_TYPE_FLOAT(1) }, 259 [BRW_REGISTER_TYPE_HF] = { GFX8_3SRC_TYPE_HF }, 266 [BRW_REGISTER_TYPE_HF] = { GFX10_ALIGN1_3SRC_REG_TYPE_HF, E(FLOAT) }, 279 [BRW_REGISTER_TYPE_HF] = { GFX10_ALIGN1_3SRC_REG_TYPE_HF, E(FLOAT) }, 291 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_UINT(1), E(FLOAT), }, 304 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_UINT(1), E(FLOAT), }, 511 [BRW_REGISTER_TYPE_HF] = 2, in brw_reg_type_to_size() [all …]
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/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/intel/compiler/ |
H A D | brw_reg_type.h | 51 BRW_REGISTER_TYPE_HF, /* 16-bit float (half float) */ enumerator 78 case BRW_REGISTER_TYPE_HF: in brw_reg_type_is_floating_point() 121 case BRW_REGISTER_TYPE_HF: in brw_reg_type_from_bit_size() 126 return BRW_REGISTER_TYPE_HF; in brw_reg_type_from_bit_size()
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H A D | brw_reg_type.c | 141 [BRW_REGISTER_TYPE_HF] = { GFX8_HW_REG_TYPE_HF, GFX8_HW_IMM_TYPE_HF }, 159 [BRW_REGISTER_TYPE_HF] = { GFX11_HW_REG_TYPE_HF, GFX11_HW_IMM_TYPE_HF }, 174 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_FLOAT(1), GFX12_HW_REG_TYPE_FLOAT(1) }, 190 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_FLOAT(1), GFX12_HW_REG_TYPE_FLOAT(1) }, 259 [BRW_REGISTER_TYPE_HF] = { GFX8_3SRC_TYPE_HF }, 266 [BRW_REGISTER_TYPE_HF] = { GFX10_ALIGN1_3SRC_REG_TYPE_HF, E(FLOAT) }, 279 [BRW_REGISTER_TYPE_HF] = { GFX10_ALIGN1_3SRC_REG_TYPE_HF, E(FLOAT) }, 291 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_UINT(1), E(FLOAT), }, 304 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_UINT(1), E(FLOAT), }, 511 [BRW_REGISTER_TYPE_HF] = 2, in brw_reg_type_to_size() [all …]
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/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/intel/compiler/ |
H A D | brw_reg_type.h | 51 BRW_REGISTER_TYPE_HF, /* 16-bit float (half float) */ enumerator 78 case BRW_REGISTER_TYPE_HF: in brw_reg_type_is_floating_point() 121 case BRW_REGISTER_TYPE_HF: in brw_reg_type_from_bit_size() 126 return BRW_REGISTER_TYPE_HF; in brw_reg_type_from_bit_size()
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H A D | brw_reg_type.c | 141 [BRW_REGISTER_TYPE_HF] = { GFX8_HW_REG_TYPE_HF, GFX8_HW_IMM_TYPE_HF }, 159 [BRW_REGISTER_TYPE_HF] = { GFX11_HW_REG_TYPE_HF, GFX11_HW_IMM_TYPE_HF }, 174 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_FLOAT(1), GFX12_HW_REG_TYPE_FLOAT(1) }, 190 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_FLOAT(1), GFX12_HW_REG_TYPE_FLOAT(1) }, 259 [BRW_REGISTER_TYPE_HF] = { GFX8_3SRC_TYPE_HF }, 266 [BRW_REGISTER_TYPE_HF] = { GFX10_ALIGN1_3SRC_REG_TYPE_HF, E(FLOAT) }, 279 [BRW_REGISTER_TYPE_HF] = { GFX10_ALIGN1_3SRC_REG_TYPE_HF, E(FLOAT) }, 291 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_UINT(1), E(FLOAT), }, 304 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_UINT(1), E(FLOAT), }, 511 [BRW_REGISTER_TYPE_HF] = 2, in brw_reg_type_to_size() [all …]
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/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/intel/compiler/ |
H A D | brw_reg_type.h | 51 BRW_REGISTER_TYPE_HF, /* 16-bit float (half float) */ enumerator 78 case BRW_REGISTER_TYPE_HF: in brw_reg_type_is_floating_point() 121 case BRW_REGISTER_TYPE_HF: in brw_reg_type_from_bit_size() 126 return BRW_REGISTER_TYPE_HF; in brw_reg_type_from_bit_size()
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H A D | brw_reg_type.c | 141 [BRW_REGISTER_TYPE_HF] = { GFX8_HW_REG_TYPE_HF, GFX8_HW_IMM_TYPE_HF }, 159 [BRW_REGISTER_TYPE_HF] = { GFX11_HW_REG_TYPE_HF, GFX11_HW_IMM_TYPE_HF }, 174 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_FLOAT(1), GFX12_HW_REG_TYPE_FLOAT(1) }, 190 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_FLOAT(1), GFX12_HW_REG_TYPE_FLOAT(1) }, 259 [BRW_REGISTER_TYPE_HF] = { GFX8_3SRC_TYPE_HF }, 266 [BRW_REGISTER_TYPE_HF] = { GFX10_ALIGN1_3SRC_REG_TYPE_HF, E(FLOAT) }, 279 [BRW_REGISTER_TYPE_HF] = { GFX10_ALIGN1_3SRC_REG_TYPE_HF, E(FLOAT) }, 291 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_UINT(1), E(FLOAT), }, 304 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_UINT(1), E(FLOAT), }, 511 [BRW_REGISTER_TYPE_HF] = 2, in brw_reg_type_to_size() [all …]
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/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/intel/compiler/ |
H A D | brw_reg_type.h | 51 BRW_REGISTER_TYPE_HF, /* 16-bit float (half float) */ enumerator 78 case BRW_REGISTER_TYPE_HF: in brw_reg_type_is_floating_point() 121 case BRW_REGISTER_TYPE_HF: in brw_reg_type_from_bit_size() 126 return BRW_REGISTER_TYPE_HF; in brw_reg_type_from_bit_size()
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H A D | brw_reg_type.c | 141 [BRW_REGISTER_TYPE_HF] = { GFX8_HW_REG_TYPE_HF, GFX8_HW_IMM_TYPE_HF }, 159 [BRW_REGISTER_TYPE_HF] = { GFX11_HW_REG_TYPE_HF, GFX11_HW_IMM_TYPE_HF }, 174 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_FLOAT(1), GFX12_HW_REG_TYPE_FLOAT(1) }, 190 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_FLOAT(1), GFX12_HW_REG_TYPE_FLOAT(1) }, 259 [BRW_REGISTER_TYPE_HF] = { GFX8_3SRC_TYPE_HF }, 266 [BRW_REGISTER_TYPE_HF] = { GFX10_ALIGN1_3SRC_REG_TYPE_HF, E(FLOAT) }, 279 [BRW_REGISTER_TYPE_HF] = { GFX10_ALIGN1_3SRC_REG_TYPE_HF, E(FLOAT) }, 291 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_UINT(1), E(FLOAT), }, 304 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_UINT(1), E(FLOAT), }, 511 [BRW_REGISTER_TYPE_HF] = 2, in brw_reg_type_to_size() [all …]
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/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/intel/compiler/ |
H A D | brw_reg_type.h | 51 BRW_REGISTER_TYPE_HF, /* 16-bit float (half float) */ enumerator 78 case BRW_REGISTER_TYPE_HF: in brw_reg_type_is_floating_point() 121 case BRW_REGISTER_TYPE_HF: in brw_reg_type_from_bit_size() 126 return BRW_REGISTER_TYPE_HF; in brw_reg_type_from_bit_size()
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H A D | brw_reg_type.c | 141 [BRW_REGISTER_TYPE_HF] = { GFX8_HW_REG_TYPE_HF, GFX8_HW_IMM_TYPE_HF }, 159 [BRW_REGISTER_TYPE_HF] = { GFX11_HW_REG_TYPE_HF, GFX11_HW_IMM_TYPE_HF }, 174 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_FLOAT(1), GFX12_HW_REG_TYPE_FLOAT(1) }, 190 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_FLOAT(1), GFX12_HW_REG_TYPE_FLOAT(1) }, 259 [BRW_REGISTER_TYPE_HF] = { GFX8_3SRC_TYPE_HF }, 266 [BRW_REGISTER_TYPE_HF] = { GFX10_ALIGN1_3SRC_REG_TYPE_HF, E(FLOAT) }, 279 [BRW_REGISTER_TYPE_HF] = { GFX10_ALIGN1_3SRC_REG_TYPE_HF, E(FLOAT) }, 291 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_UINT(1), E(FLOAT), }, 304 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_UINT(1), E(FLOAT), }, 511 [BRW_REGISTER_TYPE_HF] = 2, in brw_reg_type_to_size() [all …]
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/dports/graphics/mesa-dri/mesa-21.3.6/src/intel/compiler/ |
H A D | brw_reg_type.h | 51 BRW_REGISTER_TYPE_HF, /* 16-bit float (half float) */ enumerator 78 case BRW_REGISTER_TYPE_HF: in brw_reg_type_is_floating_point() 121 case BRW_REGISTER_TYPE_HF: in brw_reg_type_from_bit_size() 126 return BRW_REGISTER_TYPE_HF; in brw_reg_type_from_bit_size()
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H A D | brw_reg_type.c | 141 [BRW_REGISTER_TYPE_HF] = { GFX8_HW_REG_TYPE_HF, GFX8_HW_IMM_TYPE_HF }, 159 [BRW_REGISTER_TYPE_HF] = { GFX11_HW_REG_TYPE_HF, GFX11_HW_IMM_TYPE_HF }, 174 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_FLOAT(1), GFX12_HW_REG_TYPE_FLOAT(1) }, 190 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_FLOAT(1), GFX12_HW_REG_TYPE_FLOAT(1) }, 259 [BRW_REGISTER_TYPE_HF] = { GFX8_3SRC_TYPE_HF }, 266 [BRW_REGISTER_TYPE_HF] = { GFX10_ALIGN1_3SRC_REG_TYPE_HF, E(FLOAT) }, 279 [BRW_REGISTER_TYPE_HF] = { GFX10_ALIGN1_3SRC_REG_TYPE_HF, E(FLOAT) }, 291 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_UINT(1), E(FLOAT), }, 304 [BRW_REGISTER_TYPE_HF] = { GFX12_HW_REG_TYPE_UINT(1), E(FLOAT), }, 511 [BRW_REGISTER_TYPE_HF] = 2, in brw_reg_type_to_size() [all …]
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/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/intel/compiler/ |
H A D | brw_reg_type.c | 141 [BRW_REGISTER_TYPE_HF] = { GEN8_HW_REG_TYPE_HF, GEN8_HW_IMM_TYPE_HF }, 159 [BRW_REGISTER_TYPE_HF] = { GEN11_HW_REG_TYPE_HF, GEN11_HW_IMM_TYPE_HF }, 174 [BRW_REGISTER_TYPE_HF] = { GEN12_HW_REG_TYPE_FLOAT(1), GEN12_HW_REG_TYPE_FLOAT(1) }, 241 [BRW_REGISTER_TYPE_HF] = { GEN8_3SRC_TYPE_HF }, 248 [BRW_REGISTER_TYPE_HF] = { GEN10_ALIGN1_3SRC_REG_TYPE_HF, E(FLOAT) }, 261 [BRW_REGISTER_TYPE_HF] = { GEN10_ALIGN1_3SRC_REG_TYPE_HF, E(FLOAT) }, 273 [BRW_REGISTER_TYPE_HF] = { GEN12_HW_REG_TYPE_UINT(1), E(FLOAT), }, 468 [BRW_REGISTER_TYPE_HF] = 2, in brw_reg_type_to_size() 501 [BRW_REGISTER_TYPE_HF] = "HF", in brw_reg_type_to_letters()
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H A D | brw_eu_validate.c | 493 case BRW_REGISTER_TYPE_HF: in execution_type_for_type() 534 if (src0_exec_type == BRW_REGISTER_TYPE_HF) in execution_type() 614 (dst_type == BRW_REGISTER_TYPE_HF || src0_type == BRW_REGISTER_TYPE_HF)) { in is_half_float_conversion() 619 (dst_type == BRW_REGISTER_TYPE_HF || in is_half_float_conversion() 620 src1_type == BRW_REGISTER_TYPE_HF); in is_half_float_conversion() 807 ERROR_IF(dst_type == BRW_REGISTER_TYPE_HF && in general_restrictions_based_on_operand_types() 848 if ((dst_type == BRW_REGISTER_TYPE_HF && in general_restrictions_based_on_operand_types() 852 (src0_type == BRW_REGISTER_TYPE_HF || in general_restrictions_based_on_operand_types() 1198 dst_type == BRW_REGISTER_TYPE_HF, in special_restrictions_for_mixed_float_mode() 1209 if (src0_type == BRW_REGISTER_TYPE_HF) { in special_restrictions_for_mixed_float_mode() [all …]
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