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Searched refs:BRW_REGISTER_TYPE_UV (Results 1 – 25 of 143) sorted by relevance

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/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/intel/compiler/
H A Dbrw_reg_type.c120 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
135 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
153 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
169 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX11_HW_IMM_TYPE_UV },
184 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX12_HW_REG_TYPE_UINT(0) },
202 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX12_HW_REG_TYPE_UINT(0) },
523 [BRW_REGISTER_TYPE_UV] = 2, in brw_reg_type_to_size()
556 [BRW_REGISTER_TYPE_UV] = "UV", in brw_reg_type_to_letters()
H A Dbrw_reg_type.h65 BRW_REGISTER_TYPE_UV, /* vector of 8 unsigned 4-bit integers (treated as UW) */ enumerator
68 BRW_REGISTER_TYPE_LAST = BRW_REGISTER_TYPE_UV
H A Dbrw_reg.h284 case BRW_REGISTER_TYPE_UV: in brw_regs_negative_equal()
332 case BRW_REGISTER_TYPE_UV: in type_sz()
351 case BRW_REGISTER_TYPE_UV: in get_exec_type()
730 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_UV); in brw_imm_uv()
/dports/lang/clover/mesa-21.3.6/src/intel/compiler/
H A Dbrw_reg_type.c120 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
135 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
153 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
169 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX11_HW_IMM_TYPE_UV },
184 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX12_HW_REG_TYPE_UINT(0) },
202 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX12_HW_REG_TYPE_UINT(0) },
523 [BRW_REGISTER_TYPE_UV] = 2, in brw_reg_type_to_size()
556 [BRW_REGISTER_TYPE_UV] = "UV", in brw_reg_type_to_letters()
H A Dbrw_reg_type.h65 BRW_REGISTER_TYPE_UV, /* vector of 8 unsigned 4-bit integers (treated as UW) */ enumerator
68 BRW_REGISTER_TYPE_LAST = BRW_REGISTER_TYPE_UV
H A Dbrw_reg.h284 case BRW_REGISTER_TYPE_UV: in brw_regs_negative_equal()
332 case BRW_REGISTER_TYPE_UV: in type_sz()
351 case BRW_REGISTER_TYPE_UV: in get_exec_type()
730 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_UV); in brw_imm_uv()
/dports/graphics/libosmesa/mesa-21.3.6/src/intel/compiler/
H A Dbrw_reg_type.c120 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
135 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
153 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
169 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX11_HW_IMM_TYPE_UV },
184 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX12_HW_REG_TYPE_UINT(0) },
202 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX12_HW_REG_TYPE_UINT(0) },
523 [BRW_REGISTER_TYPE_UV] = 2, in brw_reg_type_to_size()
556 [BRW_REGISTER_TYPE_UV] = "UV", in brw_reg_type_to_letters()
H A Dbrw_reg_type.h65 BRW_REGISTER_TYPE_UV, /* vector of 8 unsigned 4-bit integers (treated as UW) */ enumerator
68 BRW_REGISTER_TYPE_LAST = BRW_REGISTER_TYPE_UV
/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/intel/compiler/
H A Dbrw_reg_type.c120 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
135 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
153 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
169 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX11_HW_IMM_TYPE_UV },
184 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX12_HW_REG_TYPE_UINT(0) },
202 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX12_HW_REG_TYPE_UINT(0) },
523 [BRW_REGISTER_TYPE_UV] = 2, in brw_reg_type_to_size()
556 [BRW_REGISTER_TYPE_UV] = "UV", in brw_reg_type_to_letters()
H A Dbrw_reg_type.h65 BRW_REGISTER_TYPE_UV, /* vector of 8 unsigned 4-bit integers (treated as UW) */ enumerator
68 BRW_REGISTER_TYPE_LAST = BRW_REGISTER_TYPE_UV
/dports/graphics/mesa-libs/mesa-21.3.6/src/intel/compiler/
H A Dbrw_reg_type.c120 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
135 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
153 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
169 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX11_HW_IMM_TYPE_UV },
184 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX12_HW_REG_TYPE_UINT(0) },
202 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX12_HW_REG_TYPE_UINT(0) },
523 [BRW_REGISTER_TYPE_UV] = 2, in brw_reg_type_to_size()
556 [BRW_REGISTER_TYPE_UV] = "UV", in brw_reg_type_to_letters()
H A Dbrw_reg_type.h65 BRW_REGISTER_TYPE_UV, /* vector of 8 unsigned 4-bit integers (treated as UW) */ enumerator
68 BRW_REGISTER_TYPE_LAST = BRW_REGISTER_TYPE_UV
/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/intel/compiler/
H A Dbrw_reg_type.c120 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
135 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
153 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
169 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX11_HW_IMM_TYPE_UV },
184 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX12_HW_REG_TYPE_UINT(0) },
202 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX12_HW_REG_TYPE_UINT(0) },
523 [BRW_REGISTER_TYPE_UV] = 2, in brw_reg_type_to_size()
556 [BRW_REGISTER_TYPE_UV] = "UV", in brw_reg_type_to_letters()
H A Dbrw_reg_type.h65 BRW_REGISTER_TYPE_UV, /* vector of 8 unsigned 4-bit integers (treated as UW) */ enumerator
68 BRW_REGISTER_TYPE_LAST = BRW_REGISTER_TYPE_UV
/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/intel/compiler/
H A Dbrw_reg_type.c120 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
135 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
153 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
169 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX11_HW_IMM_TYPE_UV },
184 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX12_HW_REG_TYPE_UINT(0) },
202 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX12_HW_REG_TYPE_UINT(0) },
523 [BRW_REGISTER_TYPE_UV] = 2, in brw_reg_type_to_size()
556 [BRW_REGISTER_TYPE_UV] = "UV", in brw_reg_type_to_letters()
H A Dbrw_reg_type.h65 BRW_REGISTER_TYPE_UV, /* vector of 8 unsigned 4-bit integers (treated as UW) */ enumerator
68 BRW_REGISTER_TYPE_LAST = BRW_REGISTER_TYPE_UV
/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/intel/compiler/
H A Dbrw_reg_type.c120 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
135 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
153 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
169 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX11_HW_IMM_TYPE_UV },
184 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX12_HW_REG_TYPE_UINT(0) },
202 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX12_HW_REG_TYPE_UINT(0) },
523 [BRW_REGISTER_TYPE_UV] = 2, in brw_reg_type_to_size()
556 [BRW_REGISTER_TYPE_UV] = "UV", in brw_reg_type_to_letters()
H A Dbrw_reg_type.h65 BRW_REGISTER_TYPE_UV, /* vector of 8 unsigned 4-bit integers (treated as UW) */ enumerator
68 BRW_REGISTER_TYPE_LAST = BRW_REGISTER_TYPE_UV
/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/intel/compiler/
H A Dbrw_reg_type.c120 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
135 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
153 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
169 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX11_HW_IMM_TYPE_UV },
184 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX12_HW_REG_TYPE_UINT(0) },
202 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX12_HW_REG_TYPE_UINT(0) },
523 [BRW_REGISTER_TYPE_UV] = 2, in brw_reg_type_to_size()
556 [BRW_REGISTER_TYPE_UV] = "UV", in brw_reg_type_to_letters()
H A Dbrw_reg_type.h65 BRW_REGISTER_TYPE_UV, /* vector of 8 unsigned 4-bit integers (treated as UW) */ enumerator
68 BRW_REGISTER_TYPE_LAST = BRW_REGISTER_TYPE_UV
/dports/graphics/mesa-dri/mesa-21.3.6/src/intel/compiler/
H A Dbrw_reg_type.c120 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
135 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
153 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
169 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX11_HW_IMM_TYPE_UV },
184 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX12_HW_REG_TYPE_UINT(0) },
202 [BRW_REGISTER_TYPE_UV] = { INVALID, GFX12_HW_REG_TYPE_UINT(0) },
523 [BRW_REGISTER_TYPE_UV] = 2, in brw_reg_type_to_size()
556 [BRW_REGISTER_TYPE_UV] = "UV", in brw_reg_type_to_letters()
H A Dbrw_reg_type.h65 BRW_REGISTER_TYPE_UV, /* vector of 8 unsigned 4-bit integers (treated as UW) */ enumerator
68 BRW_REGISTER_TYPE_LAST = BRW_REGISTER_TYPE_UV
/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/intel/compiler/
H A Dbrw_reg_type.c120 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
135 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
153 [BRW_REGISTER_TYPE_UV] = { INVALID, BRW_HW_IMM_TYPE_UV },
169 [BRW_REGISTER_TYPE_UV] = { INVALID, GEN11_HW_IMM_TYPE_UV },
184 [BRW_REGISTER_TYPE_UV] = { INVALID, GEN12_HW_REG_TYPE_UINT(0) },
480 [BRW_REGISTER_TYPE_UV] = 2, in brw_reg_type_to_size()
513 [BRW_REGISTER_TYPE_UV] = "UV", in brw_reg_type_to_letters()
H A Dbrw_reg_type.h65 BRW_REGISTER_TYPE_UV, enumerator
68 BRW_REGISTER_TYPE_LAST = BRW_REGISTER_TYPE_UV
H A Dbrw_reg.h284 case BRW_REGISTER_TYPE_UV: in brw_regs_negative_equal()
330 case BRW_REGISTER_TYPE_UV: in type_sz()
350 case BRW_REGISTER_TYPE_UV: in get_exec_type()
738 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_UV); in brw_imm_uv()

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