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Searched refs:BRW_REGISTER_TYPE_W (Results 1 – 25 of 220) sorted by relevance

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/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/intel/compiler/
H A Dbrw_reg_type.c102 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
115 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
130 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
148 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
164 [BRW_REGISTER_TYPE_W] = { GFX11_HW_REG_TYPE_W, GFX11_HW_IMM_TYPE_W },
270 [BRW_REGISTER_TYPE_W] = { GFX10_ALIGN1_3SRC_REG_TYPE_W, E(INT) },
283 [BRW_REGISTER_TYPE_W] = { GFX10_ALIGN1_3SRC_REG_TYPE_W, E(INT) },
295 [BRW_REGISTER_TYPE_W] = { GFX12_HW_REG_TYPE_SINT(1), E(INT), },
310 [BRW_REGISTER_TYPE_W] = { GFX12_HW_REG_TYPE_SINT(1), E(INT), },
518 [BRW_REGISTER_TYPE_W] = 2, in brw_reg_type_to_size()
[all …]
H A Dbrw_reg_type.h60 BRW_REGISTER_TYPE_W, /* 16-bit signed integer (word) */ enumerator
93 case BRW_REGISTER_TYPE_W: in brw_reg_type_is_integer()
135 case BRW_REGISTER_TYPE_W: in brw_reg_type_from_bit_size()
142 return BRW_REGISTER_TYPE_W; in brw_reg_type_from_bit_size()
H A Dtest_eu_validate.cpp294 { BRW_REGISTER_TYPE_W, true }, in TEST_P()
327 t = BRW_REGISTER_TYPE_W; in TEST_P()
481 { BRW_REGISTER_TYPE_W, E(INT), true }, in TEST_P()
1185 { BRW_REGISTER_TYPE_B , BRW_REGISTER_TYPE_W , 0, 0, 0, false }, in TEST_P()
1221 retype(g0, BRW_REGISTER_TYPE_W), in TEST_P()
1222 retype(g0, BRW_REGISTER_TYPE_W)); in TEST_P()
1231 retype(g0, BRW_REGISTER_TYPE_W), in TEST_P()
1232 retype(g0, BRW_REGISTER_TYPE_W)); in TEST_P()
2071 { BRW_REGISTER_TYPE_W, BRW_REGISTER_TYPE_V, 0, BRW_EXECUTE_8, true }, in TEST_P()
2072 { BRW_REGISTER_TYPE_W, BRW_REGISTER_TYPE_V, 16, BRW_EXECUTE_8, true }, in TEST_P()
[all …]
/dports/lang/clover/mesa-21.3.6/src/intel/compiler/
H A Dbrw_reg_type.c102 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
115 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
130 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
148 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
164 [BRW_REGISTER_TYPE_W] = { GFX11_HW_REG_TYPE_W, GFX11_HW_IMM_TYPE_W },
270 [BRW_REGISTER_TYPE_W] = { GFX10_ALIGN1_3SRC_REG_TYPE_W, E(INT) },
283 [BRW_REGISTER_TYPE_W] = { GFX10_ALIGN1_3SRC_REG_TYPE_W, E(INT) },
295 [BRW_REGISTER_TYPE_W] = { GFX12_HW_REG_TYPE_SINT(1), E(INT), },
310 [BRW_REGISTER_TYPE_W] = { GFX12_HW_REG_TYPE_SINT(1), E(INT), },
518 [BRW_REGISTER_TYPE_W] = 2, in brw_reg_type_to_size()
[all …]
H A Dbrw_reg_type.h60 BRW_REGISTER_TYPE_W, /* 16-bit signed integer (word) */ enumerator
93 case BRW_REGISTER_TYPE_W: in brw_reg_type_is_integer()
135 case BRW_REGISTER_TYPE_W: in brw_reg_type_from_bit_size()
142 return BRW_REGISTER_TYPE_W; in brw_reg_type_from_bit_size()
H A Dtest_eu_validate.cpp294 { BRW_REGISTER_TYPE_W, true }, in TEST_P()
327 t = BRW_REGISTER_TYPE_W; in TEST_P()
481 { BRW_REGISTER_TYPE_W, E(INT), true }, in TEST_P()
1185 { BRW_REGISTER_TYPE_B , BRW_REGISTER_TYPE_W , 0, 0, 0, false }, in TEST_P()
1221 retype(g0, BRW_REGISTER_TYPE_W), in TEST_P()
1222 retype(g0, BRW_REGISTER_TYPE_W)); in TEST_P()
1231 retype(g0, BRW_REGISTER_TYPE_W), in TEST_P()
1232 retype(g0, BRW_REGISTER_TYPE_W)); in TEST_P()
2071 { BRW_REGISTER_TYPE_W, BRW_REGISTER_TYPE_V, 0, BRW_EXECUTE_8, true }, in TEST_P()
2072 { BRW_REGISTER_TYPE_W, BRW_REGISTER_TYPE_V, 16, BRW_EXECUTE_8, true }, in TEST_P()
[all …]
/dports/graphics/libosmesa/mesa-21.3.6/src/intel/compiler/
H A Dbrw_reg_type.c102 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
115 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
130 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
148 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
164 [BRW_REGISTER_TYPE_W] = { GFX11_HW_REG_TYPE_W, GFX11_HW_IMM_TYPE_W },
270 [BRW_REGISTER_TYPE_W] = { GFX10_ALIGN1_3SRC_REG_TYPE_W, E(INT) },
283 [BRW_REGISTER_TYPE_W] = { GFX10_ALIGN1_3SRC_REG_TYPE_W, E(INT) },
295 [BRW_REGISTER_TYPE_W] = { GFX12_HW_REG_TYPE_SINT(1), E(INT), },
310 [BRW_REGISTER_TYPE_W] = { GFX12_HW_REG_TYPE_SINT(1), E(INT), },
518 [BRW_REGISTER_TYPE_W] = 2, in brw_reg_type_to_size()
[all …]
H A Dbrw_reg_type.h60 BRW_REGISTER_TYPE_W, /* 16-bit signed integer (word) */ enumerator
93 case BRW_REGISTER_TYPE_W: in brw_reg_type_is_integer()
135 case BRW_REGISTER_TYPE_W: in brw_reg_type_from_bit_size()
142 return BRW_REGISTER_TYPE_W; in brw_reg_type_from_bit_size()
H A Dtest_eu_validate.cpp294 { BRW_REGISTER_TYPE_W, true }, in TEST_P()
327 t = BRW_REGISTER_TYPE_W; in TEST_P()
481 { BRW_REGISTER_TYPE_W, E(INT), true }, in TEST_P()
1185 { BRW_REGISTER_TYPE_B , BRW_REGISTER_TYPE_W , 0, 0, 0, false }, in TEST_P()
1221 retype(g0, BRW_REGISTER_TYPE_W), in TEST_P()
1222 retype(g0, BRW_REGISTER_TYPE_W)); in TEST_P()
1231 retype(g0, BRW_REGISTER_TYPE_W), in TEST_P()
1232 retype(g0, BRW_REGISTER_TYPE_W)); in TEST_P()
2071 { BRW_REGISTER_TYPE_W, BRW_REGISTER_TYPE_V, 0, BRW_EXECUTE_8, true }, in TEST_P()
2072 { BRW_REGISTER_TYPE_W, BRW_REGISTER_TYPE_V, 16, BRW_EXECUTE_8, true }, in TEST_P()
[all …]
/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/intel/compiler/
H A Dbrw_reg_type.c102 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
115 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
130 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
148 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
164 [BRW_REGISTER_TYPE_W] = { GFX11_HW_REG_TYPE_W, GFX11_HW_IMM_TYPE_W },
270 [BRW_REGISTER_TYPE_W] = { GFX10_ALIGN1_3SRC_REG_TYPE_W, E(INT) },
283 [BRW_REGISTER_TYPE_W] = { GFX10_ALIGN1_3SRC_REG_TYPE_W, E(INT) },
295 [BRW_REGISTER_TYPE_W] = { GFX12_HW_REG_TYPE_SINT(1), E(INT), },
310 [BRW_REGISTER_TYPE_W] = { GFX12_HW_REG_TYPE_SINT(1), E(INT), },
518 [BRW_REGISTER_TYPE_W] = 2, in brw_reg_type_to_size()
[all …]
H A Dbrw_reg_type.h60 BRW_REGISTER_TYPE_W, /* 16-bit signed integer (word) */ enumerator
93 case BRW_REGISTER_TYPE_W: in brw_reg_type_is_integer()
135 case BRW_REGISTER_TYPE_W: in brw_reg_type_from_bit_size()
142 return BRW_REGISTER_TYPE_W; in brw_reg_type_from_bit_size()
/dports/graphics/mesa-libs/mesa-21.3.6/src/intel/compiler/
H A Dbrw_reg_type.c102 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
115 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
130 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
148 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
164 [BRW_REGISTER_TYPE_W] = { GFX11_HW_REG_TYPE_W, GFX11_HW_IMM_TYPE_W },
270 [BRW_REGISTER_TYPE_W] = { GFX10_ALIGN1_3SRC_REG_TYPE_W, E(INT) },
283 [BRW_REGISTER_TYPE_W] = { GFX10_ALIGN1_3SRC_REG_TYPE_W, E(INT) },
295 [BRW_REGISTER_TYPE_W] = { GFX12_HW_REG_TYPE_SINT(1), E(INT), },
310 [BRW_REGISTER_TYPE_W] = { GFX12_HW_REG_TYPE_SINT(1), E(INT), },
518 [BRW_REGISTER_TYPE_W] = 2, in brw_reg_type_to_size()
[all …]
H A Dbrw_reg_type.h60 BRW_REGISTER_TYPE_W, /* 16-bit signed integer (word) */ enumerator
93 case BRW_REGISTER_TYPE_W: in brw_reg_type_is_integer()
135 case BRW_REGISTER_TYPE_W: in brw_reg_type_from_bit_size()
142 return BRW_REGISTER_TYPE_W; in brw_reg_type_from_bit_size()
H A Dtest_eu_validate.cpp294 { BRW_REGISTER_TYPE_W, true }, in TEST_P()
327 t = BRW_REGISTER_TYPE_W; in TEST_P()
481 { BRW_REGISTER_TYPE_W, E(INT), true }, in TEST_P()
1185 { BRW_REGISTER_TYPE_B , BRW_REGISTER_TYPE_W , 0, 0, 0, false }, in TEST_P()
1221 retype(g0, BRW_REGISTER_TYPE_W), in TEST_P()
1222 retype(g0, BRW_REGISTER_TYPE_W)); in TEST_P()
1231 retype(g0, BRW_REGISTER_TYPE_W), in TEST_P()
1232 retype(g0, BRW_REGISTER_TYPE_W)); in TEST_P()
2071 { BRW_REGISTER_TYPE_W, BRW_REGISTER_TYPE_V, 0, BRW_EXECUTE_8, true }, in TEST_P()
2072 { BRW_REGISTER_TYPE_W, BRW_REGISTER_TYPE_V, 16, BRW_EXECUTE_8, true }, in TEST_P()
[all …]
/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/intel/compiler/
H A Dbrw_reg_type.c102 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
115 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
130 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
148 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
164 [BRW_REGISTER_TYPE_W] = { GFX11_HW_REG_TYPE_W, GFX11_HW_IMM_TYPE_W },
270 [BRW_REGISTER_TYPE_W] = { GFX10_ALIGN1_3SRC_REG_TYPE_W, E(INT) },
283 [BRW_REGISTER_TYPE_W] = { GFX10_ALIGN1_3SRC_REG_TYPE_W, E(INT) },
295 [BRW_REGISTER_TYPE_W] = { GFX12_HW_REG_TYPE_SINT(1), E(INT), },
310 [BRW_REGISTER_TYPE_W] = { GFX12_HW_REG_TYPE_SINT(1), E(INT), },
518 [BRW_REGISTER_TYPE_W] = 2, in brw_reg_type_to_size()
[all …]
H A Dbrw_reg_type.h60 BRW_REGISTER_TYPE_W, /* 16-bit signed integer (word) */ enumerator
93 case BRW_REGISTER_TYPE_W: in brw_reg_type_is_integer()
135 case BRW_REGISTER_TYPE_W: in brw_reg_type_from_bit_size()
142 return BRW_REGISTER_TYPE_W; in brw_reg_type_from_bit_size()
/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/intel/compiler/
H A Dbrw_reg_type.c102 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
115 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
130 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
148 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
164 [BRW_REGISTER_TYPE_W] = { GFX11_HW_REG_TYPE_W, GFX11_HW_IMM_TYPE_W },
270 [BRW_REGISTER_TYPE_W] = { GFX10_ALIGN1_3SRC_REG_TYPE_W, E(INT) },
283 [BRW_REGISTER_TYPE_W] = { GFX10_ALIGN1_3SRC_REG_TYPE_W, E(INT) },
295 [BRW_REGISTER_TYPE_W] = { GFX12_HW_REG_TYPE_SINT(1), E(INT), },
310 [BRW_REGISTER_TYPE_W] = { GFX12_HW_REG_TYPE_SINT(1), E(INT), },
518 [BRW_REGISTER_TYPE_W] = 2, in brw_reg_type_to_size()
[all …]
H A Dbrw_reg_type.h60 BRW_REGISTER_TYPE_W, /* 16-bit signed integer (word) */ enumerator
93 case BRW_REGISTER_TYPE_W: in brw_reg_type_is_integer()
135 case BRW_REGISTER_TYPE_W: in brw_reg_type_from_bit_size()
142 return BRW_REGISTER_TYPE_W; in brw_reg_type_from_bit_size()
/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/intel/compiler/
H A Dbrw_reg_type.c102 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
115 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
130 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
148 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
164 [BRW_REGISTER_TYPE_W] = { GFX11_HW_REG_TYPE_W, GFX11_HW_IMM_TYPE_W },
270 [BRW_REGISTER_TYPE_W] = { GFX10_ALIGN1_3SRC_REG_TYPE_W, E(INT) },
283 [BRW_REGISTER_TYPE_W] = { GFX10_ALIGN1_3SRC_REG_TYPE_W, E(INT) },
295 [BRW_REGISTER_TYPE_W] = { GFX12_HW_REG_TYPE_SINT(1), E(INT), },
310 [BRW_REGISTER_TYPE_W] = { GFX12_HW_REG_TYPE_SINT(1), E(INT), },
518 [BRW_REGISTER_TYPE_W] = 2, in brw_reg_type_to_size()
[all …]
H A Dbrw_reg_type.h60 BRW_REGISTER_TYPE_W, /* 16-bit signed integer (word) */ enumerator
93 case BRW_REGISTER_TYPE_W: in brw_reg_type_is_integer()
135 case BRW_REGISTER_TYPE_W: in brw_reg_type_from_bit_size()
142 return BRW_REGISTER_TYPE_W; in brw_reg_type_from_bit_size()
/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/intel/compiler/
H A Dbrw_reg_type.c102 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
115 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
130 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
148 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
164 [BRW_REGISTER_TYPE_W] = { GFX11_HW_REG_TYPE_W, GFX11_HW_IMM_TYPE_W },
270 [BRW_REGISTER_TYPE_W] = { GFX10_ALIGN1_3SRC_REG_TYPE_W, E(INT) },
283 [BRW_REGISTER_TYPE_W] = { GFX10_ALIGN1_3SRC_REG_TYPE_W, E(INT) },
295 [BRW_REGISTER_TYPE_W] = { GFX12_HW_REG_TYPE_SINT(1), E(INT), },
310 [BRW_REGISTER_TYPE_W] = { GFX12_HW_REG_TYPE_SINT(1), E(INT), },
518 [BRW_REGISTER_TYPE_W] = 2, in brw_reg_type_to_size()
[all …]
H A Dbrw_reg_type.h60 BRW_REGISTER_TYPE_W, /* 16-bit signed integer (word) */ enumerator
93 case BRW_REGISTER_TYPE_W: in brw_reg_type_is_integer()
135 case BRW_REGISTER_TYPE_W: in brw_reg_type_from_bit_size()
142 return BRW_REGISTER_TYPE_W; in brw_reg_type_from_bit_size()
/dports/graphics/mesa-dri/mesa-21.3.6/src/intel/compiler/
H A Dbrw_reg_type.c102 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
115 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
130 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
148 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
164 [BRW_REGISTER_TYPE_W] = { GFX11_HW_REG_TYPE_W, GFX11_HW_IMM_TYPE_W },
270 [BRW_REGISTER_TYPE_W] = { GFX10_ALIGN1_3SRC_REG_TYPE_W, E(INT) },
283 [BRW_REGISTER_TYPE_W] = { GFX10_ALIGN1_3SRC_REG_TYPE_W, E(INT) },
295 [BRW_REGISTER_TYPE_W] = { GFX12_HW_REG_TYPE_SINT(1), E(INT), },
310 [BRW_REGISTER_TYPE_W] = { GFX12_HW_REG_TYPE_SINT(1), E(INT), },
518 [BRW_REGISTER_TYPE_W] = 2, in brw_reg_type_to_size()
[all …]
H A Dbrw_reg_type.h60 BRW_REGISTER_TYPE_W, /* 16-bit signed integer (word) */ enumerator
93 case BRW_REGISTER_TYPE_W: in brw_reg_type_is_integer()
135 case BRW_REGISTER_TYPE_W: in brw_reg_type_from_bit_size()
142 return BRW_REGISTER_TYPE_W; in brw_reg_type_from_bit_size()
/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/intel/compiler/
H A Dbrw_reg_type.c102 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
115 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
130 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
148 [BRW_REGISTER_TYPE_W] = { BRW_HW_REG_TYPE_W, BRW_HW_IMM_TYPE_W },
164 [BRW_REGISTER_TYPE_W] = { GEN11_HW_REG_TYPE_W, GEN11_HW_IMM_TYPE_W },
179 [BRW_REGISTER_TYPE_W] = { GEN12_HW_REG_TYPE_SINT(1), GEN12_HW_REG_TYPE_SINT(1) },
252 [BRW_REGISTER_TYPE_W] = { GEN10_ALIGN1_3SRC_REG_TYPE_W, E(INT) },
265 [BRW_REGISTER_TYPE_W] = { GEN10_ALIGN1_3SRC_REG_TYPE_W, E(INT) },
277 [BRW_REGISTER_TYPE_W] = { GEN12_HW_REG_TYPE_SINT(1), E(INT), },
475 [BRW_REGISTER_TYPE_W] = 2, in brw_reg_type_to_size()
[all …]

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