Searched refs:CLKBWRCLK (Results 1 – 6 of 6) sorted by relevance
/dports/cad/yosys/yosys-yosys-0.12/techlibs/xilinx/ |
H A D | xc7_brams_map.v | 61 .CLKBWRCLK(CLK3), 126 .CLKBWRCLK(CLK3), 202 .CLKBWRCLK(CLK3), 240 .CLKBWRCLK(CLK3), 316 .CLKBWRCLK(CLK3), 354 .CLKBWRCLK(CLK3),
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H A D | xcu_brams_map.v | 61 .CLKBWRCLK(CLK3), 130 .CLKBWRCLK(CLK3), 209 .CLKBWRCLK(CLK3), 251 .CLKBWRCLK(CLK3), 331 .CLKBWRCLK(CLK3), 374 .CLKBWRCLK(CLK3),
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H A D | cells_sim.v | 3958 input CLKBWRCLK, port 4094 $setup(WEBWE, posedge CLKBWRCLK, 532); 4100 $setup(REGCEB, posedge CLKBWRCLK, 360); 4102 $setup(RSTREGB, posedge CLKBWRCLK, 342); 4106 $setup(DIBDI, posedge CLKBWRCLK, 737); 4110 $setup(DIPBDIP, posedge CLKBWRCLK, 737); 4156 input CLKBWRCLK, port 4358 $setup(WEBWE, posedge CLKBWRCLK, 532); 4364 $setup(REGCEB, posedge CLKBWRCLK, 360); 4366 $setup(RSTREGB, posedge CLKBWRCLK, 342); [all …]
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H A D | cells_xtra.v | 4667 input CLKBWRCLK; port 4910 input CLKBWRCLK; port
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/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/rfnoc/fosphor/ |
H A D | f15_histo_mem.v | 274 .CLKBWRCLK(clk),
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H A D | f15_logpwr.v | 468 .CLKBWRCLK(1'b0),
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