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Searched refs:CLKOUT6_PHASE (Results 1 – 4 of 4) sorted by relevance

/dports/cad/digital/Digital-0.27/src/main/resources/vhdl/
H A DDIG_MMCME2_BASE.tem69 -- CLKOUT0_PHASE - CLKOUT6_PHASE: Phase offset for each CLKOUT (-360.000-360.000).
76 CLKOUT6_PHASE => 0.0,
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/n3xx/dboards/rh/db_ifc/
H A DRadioClocking.vhd147 CLKOUT6_PHASE => 0.000, -- unused
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/n3xx/dboards/mg/db_ifc/
H A DRadioClocking.vhd146 CLKOUT6_PHASE => 0.000, -- unused
/dports/cad/yosys/yosys-yosys-0.12/techlibs/xilinx/
H A Dcells_xtra.v7885 parameter real CLKOUT6_PHASE = 0.000; constant
7955 parameter real CLKOUT6_PHASE = 0.000; constant
8020 parameter real CLKOUT6_PHASE = 0.000; constant
8101 parameter real CLKOUT6_PHASE = 0.000; constant
8269 parameter real CLKOUT6_PHASE = 0.000; constant
8358 parameter real CLKOUT6_PHASE = 0.000; constant
8516 parameter real CLKOUT6_PHASE = 0.000; constant
8605 parameter real CLKOUT6_PHASE = 0.000; constant