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Searched refs:CLK_AUDDIV_0 (Results 1 – 9 of 9) sorted by relevance

/dports/multimedia/v4l_compat/linux-5.13-rc2/sound/soc/mediatek/mt8192/
H A Dmt8192-afe-clk.c427 .div_pdn_reg = CLK_AUDDIV_0,
440 .div_pdn_reg = CLK_AUDDIV_0,
453 .div_pdn_reg = CLK_AUDDIV_0,
466 .div_pdn_reg = CLK_AUDDIV_0,
479 .div_pdn_reg = CLK_AUDDIV_0,
492 .div_pdn_reg = CLK_AUDDIV_0,
502 .div_pdn_reg = CLK_AUDDIV_0,
515 .div_pdn_reg = CLK_AUDDIV_0,
528 .div_pdn_reg = CLK_AUDDIV_0,
541 .div_pdn_reg = CLK_AUDDIV_0,
[all …]
H A Dmt8192-afe-clk.h32 #define CLK_AUDDIV_0 0x0320 macro
/dports/multimedia/libv4l/linux-5.13-rc2/sound/soc/mediatek/mt8192/
H A Dmt8192-afe-clk.c427 .div_pdn_reg = CLK_AUDDIV_0,
440 .div_pdn_reg = CLK_AUDDIV_0,
453 .div_pdn_reg = CLK_AUDDIV_0,
466 .div_pdn_reg = CLK_AUDDIV_0,
479 .div_pdn_reg = CLK_AUDDIV_0,
492 .div_pdn_reg = CLK_AUDDIV_0,
502 .div_pdn_reg = CLK_AUDDIV_0,
515 .div_pdn_reg = CLK_AUDDIV_0,
528 .div_pdn_reg = CLK_AUDDIV_0,
541 .div_pdn_reg = CLK_AUDDIV_0,
[all …]
H A Dmt8192-afe-clk.h32 #define CLK_AUDDIV_0 0x0320 macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/sound/soc/mediatek/mt8192/
H A Dmt8192-afe-clk.c427 .div_pdn_reg = CLK_AUDDIV_0,
440 .div_pdn_reg = CLK_AUDDIV_0,
453 .div_pdn_reg = CLK_AUDDIV_0,
466 .div_pdn_reg = CLK_AUDDIV_0,
479 .div_pdn_reg = CLK_AUDDIV_0,
492 .div_pdn_reg = CLK_AUDDIV_0,
502 .div_pdn_reg = CLK_AUDDIV_0,
515 .div_pdn_reg = CLK_AUDDIV_0,
528 .div_pdn_reg = CLK_AUDDIV_0,
541 .div_pdn_reg = CLK_AUDDIV_0,
[all …]
H A Dmt8192-afe-clk.h32 #define CLK_AUDDIV_0 0x0320 macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/sound/soc/mediatek/mt6797/
H A Dmt6797-reg.h183 #define CLK_AUDDIV_0 0x05a0 macro
/dports/multimedia/libv4l/linux-5.13-rc2/sound/soc/mediatek/mt6797/
H A Dmt6797-reg.h183 #define CLK_AUDDIV_0 0x05a0 macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/sound/soc/mediatek/mt6797/
H A Dmt6797-reg.h183 #define CLK_AUDDIV_0 0x05a0 macro