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Searched refs:CLOCK_ID_USB (Results 1 – 25 of 440) sorted by relevance

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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/mach-tegra/
H A Dclock.c96 assert(clkid != CLOCK_ID_USB); in clock_ll_read_pll()
99 if (!clock_id_is_pll(clkid) || clkid == CLOCK_ID_USB) in clock_ll_read_pll()
692 pll_rate[CLOCK_ID_USB] = clock_get_rate(CLOCK_ID_USB); in clock_init()
704 debug("PLLU = %d\n", pll_rate[CLOCK_ID_USB]); in clock_init()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/mach-tegra/
H A Dclock.c96 assert(clkid != CLOCK_ID_USB); in clock_ll_read_pll()
99 if (!clock_id_is_pll(clkid) || clkid == CLOCK_ID_USB) in clock_ll_read_pll()
692 pll_rate[CLOCK_ID_USB] = clock_get_rate(CLOCK_ID_USB); in clock_init()
704 debug("PLLU = %d\n", pll_rate[CLOCK_ID_USB]); in clock_init()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c99 assert(clkid != CLOCK_ID_USB); in clock_ll_read_pll()
102 if (!clock_id_is_pll(clkid) || clkid == CLOCK_ID_USB) in clock_ll_read_pll()
696 pll_rate[CLOCK_ID_USB] = clock_get_rate(CLOCK_ID_USB); in clock_init()
708 debug("PLLU = %d\n", pll_rate[CLOCK_ID_USB]); in clock_init()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c99 assert(clkid != CLOCK_ID_USB); in clock_ll_read_pll()
102 if (!clock_id_is_pll(clkid) || clkid == CLOCK_ID_USB) in clock_ll_read_pll()
696 pll_rate[CLOCK_ID_USB] = clock_get_rate(CLOCK_ID_USB); in clock_init()
708 debug("PLLU = %d\n", pll_rate[CLOCK_ID_USB]); in clock_init()
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c99 assert(clkid != CLOCK_ID_USB); in clock_ll_read_pll()
102 if (!clock_id_is_pll(clkid) || clkid == CLOCK_ID_USB) in clock_ll_read_pll()
696 pll_rate[CLOCK_ID_USB] = clock_get_rate(CLOCK_ID_USB); in clock_init()
708 debug("PLLU = %d\n", pll_rate[CLOCK_ID_USB]); in clock_init()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c99 assert(clkid != CLOCK_ID_USB); in clock_ll_read_pll()
102 if (!clock_id_is_pll(clkid) || clkid == CLOCK_ID_USB) in clock_ll_read_pll()
696 pll_rate[CLOCK_ID_USB] = clock_get_rate(CLOCK_ID_USB); in clock_init()
708 debug("PLLU = %d\n", pll_rate[CLOCK_ID_USB]); in clock_init()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c99 assert(clkid != CLOCK_ID_USB); in clock_ll_read_pll()
102 if (!clock_id_is_pll(clkid) || clkid == CLOCK_ID_USB) in clock_ll_read_pll()
696 pll_rate[CLOCK_ID_USB] = clock_get_rate(CLOCK_ID_USB); in clock_init()
708 debug("PLLU = %d\n", pll_rate[CLOCK_ID_USB]); in clock_init()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c99 assert(clkid != CLOCK_ID_USB); in clock_ll_read_pll()
102 if (!clock_id_is_pll(clkid) || clkid == CLOCK_ID_USB) in clock_ll_read_pll()
696 pll_rate[CLOCK_ID_USB] = clock_get_rate(CLOCK_ID_USB); in clock_init()
708 debug("PLLU = %d\n", pll_rate[CLOCK_ID_USB]); in clock_init()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c99 assert(clkid != CLOCK_ID_USB); in clock_ll_read_pll()
102 if (!clock_id_is_pll(clkid) || clkid == CLOCK_ID_USB) in clock_ll_read_pll()
696 pll_rate[CLOCK_ID_USB] = clock_get_rate(CLOCK_ID_USB); in clock_init()
708 debug("PLLU = %d\n", pll_rate[CLOCK_ID_USB]); in clock_init()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c99 assert(clkid != CLOCK_ID_USB); in clock_ll_read_pll()
102 if (!clock_id_is_pll(clkid) || clkid == CLOCK_ID_USB) in clock_ll_read_pll()
696 pll_rate[CLOCK_ID_USB] = clock_get_rate(CLOCK_ID_USB); in clock_init()
708 debug("PLLU = %d\n", pll_rate[CLOCK_ID_USB]); in clock_init()
/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c99 assert(clkid != CLOCK_ID_USB); in clock_ll_read_pll()
102 if (!clock_id_is_pll(clkid) || clkid == CLOCK_ID_USB) in clock_ll_read_pll()
696 pll_rate[CLOCK_ID_USB] = clock_get_rate(CLOCK_ID_USB); in clock_init()
708 debug("PLLU = %d\n", pll_rate[CLOCK_ID_USB]); in clock_init()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c99 assert(clkid != CLOCK_ID_USB); in clock_ll_read_pll()
102 if (!clock_id_is_pll(clkid) || clkid == CLOCK_ID_USB) in clock_ll_read_pll()
696 pll_rate[CLOCK_ID_USB] = clock_get_rate(CLOCK_ID_USB); in clock_init()
708 debug("PLLU = %d\n", pll_rate[CLOCK_ID_USB]); in clock_init()
/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c99 assert(clkid != CLOCK_ID_USB); in clock_ll_read_pll()
102 if (!clock_id_is_pll(clkid) || clkid == CLOCK_ID_USB) in clock_ll_read_pll()
696 pll_rate[CLOCK_ID_USB] = clock_get_rate(CLOCK_ID_USB); in clock_init()
708 debug("PLLU = %d\n", pll_rate[CLOCK_ID_USB]); in clock_init()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c99 assert(clkid != CLOCK_ID_USB); in clock_ll_read_pll()
102 if (!clock_id_is_pll(clkid) || clkid == CLOCK_ID_USB) in clock_ll_read_pll()
696 pll_rate[CLOCK_ID_USB] = clock_get_rate(CLOCK_ID_USB); in clock_init()
708 debug("PLLU = %d\n", pll_rate[CLOCK_ID_USB]); in clock_init()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c99 assert(clkid != CLOCK_ID_USB); in clock_ll_read_pll()
102 if (!clock_id_is_pll(clkid) || clkid == CLOCK_ID_USB) in clock_ll_read_pll()
696 pll_rate[CLOCK_ID_USB] = clock_get_rate(CLOCK_ID_USB); in clock_init()
708 debug("PLLU = %d\n", pll_rate[CLOCK_ID_USB]); in clock_init()
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c99 assert(clkid != CLOCK_ID_USB); in clock_ll_read_pll()
102 if (!clock_id_is_pll(clkid) || clkid == CLOCK_ID_USB) in clock_ll_read_pll()
696 pll_rate[CLOCK_ID_USB] = clock_get_rate(CLOCK_ID_USB); in clock_init()
708 debug("PLLU = %d\n", pll_rate[CLOCK_ID_USB]); in clock_init()
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c99 assert(clkid != CLOCK_ID_USB); in clock_ll_read_pll()
102 if (!clock_id_is_pll(clkid) || clkid == CLOCK_ID_USB) in clock_ll_read_pll()
696 pll_rate[CLOCK_ID_USB] = clock_get_rate(CLOCK_ID_USB); in clock_init()
708 debug("PLLU = %d\n", pll_rate[CLOCK_ID_USB]); in clock_init()
/dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c99 assert(clkid != CLOCK_ID_USB); in clock_ll_read_pll()
102 if (!clock_id_is_pll(clkid) || clkid == CLOCK_ID_USB) in clock_ll_read_pll()
696 pll_rate[CLOCK_ID_USB] = clock_get_rate(CLOCK_ID_USB); in clock_init()
708 debug("PLLU = %d\n", pll_rate[CLOCK_ID_USB]); in clock_init()
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c99 assert(clkid != CLOCK_ID_USB); in clock_ll_read_pll()
102 if (!clock_id_is_pll(clkid) || clkid == CLOCK_ID_USB) in clock_ll_read_pll()
696 pll_rate[CLOCK_ID_USB] = clock_get_rate(CLOCK_ID_USB); in clock_init()
708 debug("PLLU = %d\n", pll_rate[CLOCK_ID_USB]); in clock_init()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/mach-tegra/
H A Dclock.c96 assert(clkid != CLOCK_ID_USB); in clock_ll_read_pll()
99 if (!clock_id_is_pll(clkid) || clkid == CLOCK_ID_USB) in clock_ll_read_pll()
692 pll_rate[CLOCK_ID_USB] = clock_get_rate(CLOCK_ID_USB); in clock_init()
704 debug("PLLU = %d\n", pll_rate[CLOCK_ID_USB]); in clock_init()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/mach-tegra/
H A Dclock.c96 assert(clkid != CLOCK_ID_USB); in clock_ll_read_pll()
99 if (!clock_id_is_pll(clkid) || clkid == CLOCK_ID_USB) in clock_ll_read_pll()
692 pll_rate[CLOCK_ID_USB] = clock_get_rate(CLOCK_ID_USB); in clock_init()
704 debug("PLLU = %d\n", pll_rate[CLOCK_ID_USB]); in clock_init()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c99 assert(clkid != CLOCK_ID_USB); in clock_ll_read_pll()
102 if (!clock_id_is_pll(clkid) || clkid == CLOCK_ID_USB) in clock_ll_read_pll()
696 pll_rate[CLOCK_ID_USB] = clock_get_rate(CLOCK_ID_USB); in clock_init()
708 debug("PLLU = %d\n", pll_rate[CLOCK_ID_USB]); in clock_init()
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c99 assert(clkid != CLOCK_ID_USB); in clock_ll_read_pll()
102 if (!clock_id_is_pll(clkid) || clkid == CLOCK_ID_USB) in clock_ll_read_pll()
696 pll_rate[CLOCK_ID_USB] = clock_get_rate(CLOCK_ID_USB); in clock_init()
708 debug("PLLU = %d\n", pll_rate[CLOCK_ID_USB]); in clock_init()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c99 assert(clkid != CLOCK_ID_USB); in clock_ll_read_pll()
102 if (!clock_id_is_pll(clkid) || clkid == CLOCK_ID_USB) in clock_ll_read_pll()
696 pll_rate[CLOCK_ID_USB] = clock_get_rate(CLOCK_ID_USB); in clock_init()
708 debug("PLLU = %d\n", pll_rate[CLOCK_ID_USB]); in clock_init()
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c99 assert(clkid != CLOCK_ID_USB); in clock_ll_read_pll()
102 if (!clock_id_is_pll(clkid) || clkid == CLOCK_ID_USB) in clock_ll_read_pll()
696 pll_rate[CLOCK_ID_USB] = clock_get_rate(CLOCK_ID_USB); in clock_init()
708 debug("PLLU = %d\n", pll_rate[CLOCK_ID_USB]); in clock_init()

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