Home
last modified time | relevance | path

Searched refs:DDRCTL_REG_MAP (Results 1 – 25 of 67) sorted by relevance

123

/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/ram/stm32mp1/
H A Dstm32mp1_ddr.c89 #define DDRCTL_REG_MAP(x) DDRCTL_REG(x, stm32mp1_ddrctrl_map) macro
91 DDRCTL_REG_MAP(addrmap1),
92 DDRCTL_REG_MAP(addrmap2),
93 DDRCTL_REG_MAP(addrmap3),
94 DDRCTL_REG_MAP(addrmap4),
95 DDRCTL_REG_MAP(addrmap5),
96 DDRCTL_REG_MAP(addrmap6),
97 DDRCTL_REG_MAP(addrmap9),
98 DDRCTL_REG_MAP(addrmap10),
99 DDRCTL_REG_MAP(addrmap11),
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/ram/stm32mp1/
H A Dstm32mp1_ddr.c89 #define DDRCTL_REG_MAP(x) DDRCTL_REG(x, stm32mp1_ddrctrl_map) macro
91 DDRCTL_REG_MAP(addrmap1),
92 DDRCTL_REG_MAP(addrmap2),
93 DDRCTL_REG_MAP(addrmap3),
94 DDRCTL_REG_MAP(addrmap4),
95 DDRCTL_REG_MAP(addrmap5),
96 DDRCTL_REG_MAP(addrmap6),
97 DDRCTL_REG_MAP(addrmap9),
98 DDRCTL_REG_MAP(addrmap10),
99 DDRCTL_REG_MAP(addrmap11),
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/ram/stm32mp1/
H A Dstm32mp1_ddr.c89 #define DDRCTL_REG_MAP(x) DDRCTL_REG(x, stm32mp1_ddrctrl_map) macro
91 DDRCTL_REG_MAP(addrmap1),
92 DDRCTL_REG_MAP(addrmap2),
93 DDRCTL_REG_MAP(addrmap3),
94 DDRCTL_REG_MAP(addrmap4),
95 DDRCTL_REG_MAP(addrmap5),
96 DDRCTL_REG_MAP(addrmap6),
97 DDRCTL_REG_MAP(addrmap9),
98 DDRCTL_REG_MAP(addrmap10),
99 DDRCTL_REG_MAP(addrmap11),
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/ram/stm32mp1/
H A Dstm32mp1_ddr.c89 #define DDRCTL_REG_MAP(x) DDRCTL_REG(x, stm32mp1_ddrctrl_map) macro
91 DDRCTL_REG_MAP(addrmap1),
92 DDRCTL_REG_MAP(addrmap2),
93 DDRCTL_REG_MAP(addrmap3),
94 DDRCTL_REG_MAP(addrmap4),
95 DDRCTL_REG_MAP(addrmap5),
96 DDRCTL_REG_MAP(addrmap6),
97 DDRCTL_REG_MAP(addrmap9),
98 DDRCTL_REG_MAP(addrmap10),
99 DDRCTL_REG_MAP(addrmap11),
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/drivers/ram/stm32mp1/
H A Dstm32mp1_ddr.c89 #define DDRCTL_REG_MAP(x) DDRCTL_REG(x, stm32mp1_ddrctrl_map) macro
91 DDRCTL_REG_MAP(addrmap1),
92 DDRCTL_REG_MAP(addrmap2),
93 DDRCTL_REG_MAP(addrmap3),
94 DDRCTL_REG_MAP(addrmap4),
95 DDRCTL_REG_MAP(addrmap5),
96 DDRCTL_REG_MAP(addrmap6),
97 DDRCTL_REG_MAP(addrmap9),
98 DDRCTL_REG_MAP(addrmap10),
99 DDRCTL_REG_MAP(addrmap11),
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ddr.c118 #define DDRCTL_REG_MAP(x) DDRCTL_REG(x, stm32mp1_ddrctrl_map) macro
120 DDRCTL_REG_MAP(addrmap1),
121 DDRCTL_REG_MAP(addrmap2),
122 DDRCTL_REG_MAP(addrmap3),
123 DDRCTL_REG_MAP(addrmap4),
124 DDRCTL_REG_MAP(addrmap5),
125 DDRCTL_REG_MAP(addrmap6),
126 DDRCTL_REG_MAP(addrmap9),
127 DDRCTL_REG_MAP(addrmap10),
128 DDRCTL_REG_MAP(addrmap11),
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ddr.c118 #define DDRCTL_REG_MAP(x) DDRCTL_REG(x, stm32mp1_ddrctrl_map) macro
120 DDRCTL_REG_MAP(addrmap1),
121 DDRCTL_REG_MAP(addrmap2),
122 DDRCTL_REG_MAP(addrmap3),
123 DDRCTL_REG_MAP(addrmap4),
124 DDRCTL_REG_MAP(addrmap5),
125 DDRCTL_REG_MAP(addrmap6),
126 DDRCTL_REG_MAP(addrmap9),
127 DDRCTL_REG_MAP(addrmap10),
128 DDRCTL_REG_MAP(addrmap11),
/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ddr.c118 #define DDRCTL_REG_MAP(x) DDRCTL_REG(x, stm32mp1_ddrctrl_map) macro
120 DDRCTL_REG_MAP(addrmap1),
121 DDRCTL_REG_MAP(addrmap2),
122 DDRCTL_REG_MAP(addrmap3),
123 DDRCTL_REG_MAP(addrmap4),
124 DDRCTL_REG_MAP(addrmap5),
125 DDRCTL_REG_MAP(addrmap6),
126 DDRCTL_REG_MAP(addrmap9),
127 DDRCTL_REG_MAP(addrmap10),
128 DDRCTL_REG_MAP(addrmap11),
/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/drivers/st/ddr/
H A Dstm32mp1_ddr.c93 #define DDRCTL_REG_MAP(x) DDRCTL_REG(x, stm32mp1_ddrctrl_map) macro
95 DDRCTL_REG_MAP(addrmap1),
96 DDRCTL_REG_MAP(addrmap2),
97 DDRCTL_REG_MAP(addrmap3),
98 DDRCTL_REG_MAP(addrmap4),
99 DDRCTL_REG_MAP(addrmap5),
100 DDRCTL_REG_MAP(addrmap6),
101 DDRCTL_REG_MAP(addrmap9),
102 DDRCTL_REG_MAP(addrmap10),
103 DDRCTL_REG_MAP(addrmap11),
/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/drivers/st/ddr/
H A Dstm32mp1_ddr.c93 #define DDRCTL_REG_MAP(x) DDRCTL_REG(x, stm32mp1_ddrctrl_map) macro
95 DDRCTL_REG_MAP(addrmap1),
96 DDRCTL_REG_MAP(addrmap2),
97 DDRCTL_REG_MAP(addrmap3),
98 DDRCTL_REG_MAP(addrmap4),
99 DDRCTL_REG_MAP(addrmap5),
100 DDRCTL_REG_MAP(addrmap6),
101 DDRCTL_REG_MAP(addrmap9),
102 DDRCTL_REG_MAP(addrmap10),
103 DDRCTL_REG_MAP(addrmap11),
/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/drivers/st/ddr/
H A Dstm32mp1_ddr.c93 #define DDRCTL_REG_MAP(x) DDRCTL_REG(x, stm32mp1_ddrctrl_map) macro
95 DDRCTL_REG_MAP(addrmap1),
96 DDRCTL_REG_MAP(addrmap2),
97 DDRCTL_REG_MAP(addrmap3),
98 DDRCTL_REG_MAP(addrmap4),
99 DDRCTL_REG_MAP(addrmap5),
100 DDRCTL_REG_MAP(addrmap6),
101 DDRCTL_REG_MAP(addrmap9),
102 DDRCTL_REG_MAP(addrmap10),
103 DDRCTL_REG_MAP(addrmap11),
/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/drivers/st/ddr/
H A Dstm32mp1_ddr.c93 #define DDRCTL_REG_MAP(x) DDRCTL_REG(x, stm32mp1_ddrctrl_map) macro
95 DDRCTL_REG_MAP(addrmap1),
96 DDRCTL_REG_MAP(addrmap2),
97 DDRCTL_REG_MAP(addrmap3),
98 DDRCTL_REG_MAP(addrmap4),
99 DDRCTL_REG_MAP(addrmap5),
100 DDRCTL_REG_MAP(addrmap6),
101 DDRCTL_REG_MAP(addrmap9),
102 DDRCTL_REG_MAP(addrmap10),
103 DDRCTL_REG_MAP(addrmap11),
/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/drivers/st/ddr/
H A Dstm32mp1_ddr.c93 #define DDRCTL_REG_MAP(x) DDRCTL_REG(x, stm32mp1_ddrctrl_map) macro
95 DDRCTL_REG_MAP(addrmap1),
96 DDRCTL_REG_MAP(addrmap2),
97 DDRCTL_REG_MAP(addrmap3),
98 DDRCTL_REG_MAP(addrmap4),
99 DDRCTL_REG_MAP(addrmap5),
100 DDRCTL_REG_MAP(addrmap6),
101 DDRCTL_REG_MAP(addrmap9),
102 DDRCTL_REG_MAP(addrmap10),
103 DDRCTL_REG_MAP(addrmap11),
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ddr.c118 #define DDRCTL_REG_MAP(x) DDRCTL_REG(x, stm32mp1_ddrctrl_map) macro
120 DDRCTL_REG_MAP(addrmap1),
121 DDRCTL_REG_MAP(addrmap2),
122 DDRCTL_REG_MAP(addrmap3),
123 DDRCTL_REG_MAP(addrmap4),
124 DDRCTL_REG_MAP(addrmap5),
125 DDRCTL_REG_MAP(addrmap6),
126 DDRCTL_REG_MAP(addrmap9),
127 DDRCTL_REG_MAP(addrmap10),
128 DDRCTL_REG_MAP(addrmap11),
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ddr.c118 #define DDRCTL_REG_MAP(x) DDRCTL_REG(x, stm32mp1_ddrctrl_map) macro
120 DDRCTL_REG_MAP(addrmap1),
121 DDRCTL_REG_MAP(addrmap2),
122 DDRCTL_REG_MAP(addrmap3),
123 DDRCTL_REG_MAP(addrmap4),
124 DDRCTL_REG_MAP(addrmap5),
125 DDRCTL_REG_MAP(addrmap6),
126 DDRCTL_REG_MAP(addrmap9),
127 DDRCTL_REG_MAP(addrmap10),
128 DDRCTL_REG_MAP(addrmap11),
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ddr.c118 #define DDRCTL_REG_MAP(x) DDRCTL_REG(x, stm32mp1_ddrctrl_map) macro
120 DDRCTL_REG_MAP(addrmap1),
121 DDRCTL_REG_MAP(addrmap2),
122 DDRCTL_REG_MAP(addrmap3),
123 DDRCTL_REG_MAP(addrmap4),
124 DDRCTL_REG_MAP(addrmap5),
125 DDRCTL_REG_MAP(addrmap6),
126 DDRCTL_REG_MAP(addrmap9),
127 DDRCTL_REG_MAP(addrmap10),
128 DDRCTL_REG_MAP(addrmap11),
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ddr.c118 #define DDRCTL_REG_MAP(x) DDRCTL_REG(x, stm32mp1_ddrctrl_map) macro
120 DDRCTL_REG_MAP(addrmap1),
121 DDRCTL_REG_MAP(addrmap2),
122 DDRCTL_REG_MAP(addrmap3),
123 DDRCTL_REG_MAP(addrmap4),
124 DDRCTL_REG_MAP(addrmap5),
125 DDRCTL_REG_MAP(addrmap6),
126 DDRCTL_REG_MAP(addrmap9),
127 DDRCTL_REG_MAP(addrmap10),
128 DDRCTL_REG_MAP(addrmap11),
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ddr.c118 #define DDRCTL_REG_MAP(x) DDRCTL_REG(x, stm32mp1_ddrctrl_map) macro
120 DDRCTL_REG_MAP(addrmap1),
121 DDRCTL_REG_MAP(addrmap2),
122 DDRCTL_REG_MAP(addrmap3),
123 DDRCTL_REG_MAP(addrmap4),
124 DDRCTL_REG_MAP(addrmap5),
125 DDRCTL_REG_MAP(addrmap6),
126 DDRCTL_REG_MAP(addrmap9),
127 DDRCTL_REG_MAP(addrmap10),
128 DDRCTL_REG_MAP(addrmap11),
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ddr.c118 #define DDRCTL_REG_MAP(x) DDRCTL_REG(x, stm32mp1_ddrctrl_map) macro
120 DDRCTL_REG_MAP(addrmap1),
121 DDRCTL_REG_MAP(addrmap2),
122 DDRCTL_REG_MAP(addrmap3),
123 DDRCTL_REG_MAP(addrmap4),
124 DDRCTL_REG_MAP(addrmap5),
125 DDRCTL_REG_MAP(addrmap6),
126 DDRCTL_REG_MAP(addrmap9),
127 DDRCTL_REG_MAP(addrmap10),
128 DDRCTL_REG_MAP(addrmap11),
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ddr.c118 #define DDRCTL_REG_MAP(x) DDRCTL_REG(x, stm32mp1_ddrctrl_map) macro
120 DDRCTL_REG_MAP(addrmap1),
121 DDRCTL_REG_MAP(addrmap2),
122 DDRCTL_REG_MAP(addrmap3),
123 DDRCTL_REG_MAP(addrmap4),
124 DDRCTL_REG_MAP(addrmap5),
125 DDRCTL_REG_MAP(addrmap6),
126 DDRCTL_REG_MAP(addrmap9),
127 DDRCTL_REG_MAP(addrmap10),
128 DDRCTL_REG_MAP(addrmap11),
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ddr.c118 #define DDRCTL_REG_MAP(x) DDRCTL_REG(x, stm32mp1_ddrctrl_map) macro
120 DDRCTL_REG_MAP(addrmap1),
121 DDRCTL_REG_MAP(addrmap2),
122 DDRCTL_REG_MAP(addrmap3),
123 DDRCTL_REG_MAP(addrmap4),
124 DDRCTL_REG_MAP(addrmap5),
125 DDRCTL_REG_MAP(addrmap6),
126 DDRCTL_REG_MAP(addrmap9),
127 DDRCTL_REG_MAP(addrmap10),
128 DDRCTL_REG_MAP(addrmap11),
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ddr.c118 #define DDRCTL_REG_MAP(x) DDRCTL_REG(x, stm32mp1_ddrctrl_map) macro
120 DDRCTL_REG_MAP(addrmap1),
121 DDRCTL_REG_MAP(addrmap2),
122 DDRCTL_REG_MAP(addrmap3),
123 DDRCTL_REG_MAP(addrmap4),
124 DDRCTL_REG_MAP(addrmap5),
125 DDRCTL_REG_MAP(addrmap6),
126 DDRCTL_REG_MAP(addrmap9),
127 DDRCTL_REG_MAP(addrmap10),
128 DDRCTL_REG_MAP(addrmap11),
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ddr.c118 #define DDRCTL_REG_MAP(x) DDRCTL_REG(x, stm32mp1_ddrctrl_map) macro
120 DDRCTL_REG_MAP(addrmap1),
121 DDRCTL_REG_MAP(addrmap2),
122 DDRCTL_REG_MAP(addrmap3),
123 DDRCTL_REG_MAP(addrmap4),
124 DDRCTL_REG_MAP(addrmap5),
125 DDRCTL_REG_MAP(addrmap6),
126 DDRCTL_REG_MAP(addrmap9),
127 DDRCTL_REG_MAP(addrmap10),
128 DDRCTL_REG_MAP(addrmap11),
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ddr.c118 #define DDRCTL_REG_MAP(x) DDRCTL_REG(x, stm32mp1_ddrctrl_map) macro
120 DDRCTL_REG_MAP(addrmap1),
121 DDRCTL_REG_MAP(addrmap2),
122 DDRCTL_REG_MAP(addrmap3),
123 DDRCTL_REG_MAP(addrmap4),
124 DDRCTL_REG_MAP(addrmap5),
125 DDRCTL_REG_MAP(addrmap6),
126 DDRCTL_REG_MAP(addrmap9),
127 DDRCTL_REG_MAP(addrmap10),
128 DDRCTL_REG_MAP(addrmap11),
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ddr.c118 #define DDRCTL_REG_MAP(x) DDRCTL_REG(x, stm32mp1_ddrctrl_map) macro
120 DDRCTL_REG_MAP(addrmap1),
121 DDRCTL_REG_MAP(addrmap2),
122 DDRCTL_REG_MAP(addrmap3),
123 DDRCTL_REG_MAP(addrmap4),
124 DDRCTL_REG_MAP(addrmap5),
125 DDRCTL_REG_MAP(addrmap6),
126 DDRCTL_REG_MAP(addrmap9),
127 DDRCTL_REG_MAP(addrmap10),
128 DDRCTL_REG_MAP(addrmap11),

123