/dports/emulators/ppsspp-qt5/ppsspp-1.12.3/Core/MIPS/ |
H A D | MIPSTables.cpp | 98 INSTR("j", JITFUNC(Comp_Jump), Dis_JumpType, Int_JumpType, IS_JUMP|IN_IMM26|DELAYSLOT), 99 INSTR("jal", JITFUNC(Comp_Jump), Dis_JumpType, Int_JumpType, IS_JUMP|IN_IMM26|OUT_RA|DELAYSLOT), 100 …lBranch), Dis_RelBranch2, Int_RelBranch, IS_CONDBRANCH|IN_IMM16|IN_RS|IN_RT|DELAYSLOT|CONDTYPE_EQ), 101 …lBranch), Dis_RelBranch2, Int_RelBranch, IS_CONDBRANCH|IN_IMM16|IN_RS|IN_RT|DELAYSLOT|CONDTYPE_NE), 102 …mp_RelBranch), Dis_RelBranch, Int_RelBranch, IS_CONDBRANCH|IN_IMM16|IN_RS|DELAYSLOT|CONDTYPE_LEZ), 103 …mp_RelBranch), Dis_RelBranch, Int_RelBranch, IS_CONDBRANCH|IN_IMM16|IN_RS|DELAYSLOT|CONDTYPE_GTZ), 185 INSTR("jr", JITFUNC(Comp_JumpReg), Dis_JumpRegType, Int_JumpRegType, IS_JUMP|IN_RS|DELAYSLOT), 186 …("jalr", JITFUNC(Comp_JumpReg), Dis_JumpRegType, Int_JumpRegType, IS_JUMP|IN_RS|OUT_RD|DELAYSLOT), 358 …FUNC(Comp_VBranch), Dis_VBranch, Int_VBranch, IS_CONDBRANCH|IN_IMM16|IN_VFPU_CC|DELAYSLOT|IS_VFPU), 359 …FUNC(Comp_VBranch), Dis_VBranch, Int_VBranch, IS_CONDBRANCH|IN_IMM16|IN_VFPU_CC|DELAYSLOT|IS_VFPU), [all …]
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H A D | MIPSTables.h | 45 #define DELAYSLOT 0x00000010ULL macro
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H A D | MIPSAnalyst.cpp | 638 return (info & DELAYSLOT) != 0; in OpHasDelaySlot() 733 if (info & DELAYSLOT) { in Analyze()
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/dports/emulators/ppsspp/ppsspp-1.12.3/Core/MIPS/ |
H A D | MIPSTables.cpp | 98 INSTR("j", JITFUNC(Comp_Jump), Dis_JumpType, Int_JumpType, IS_JUMP|IN_IMM26|DELAYSLOT), 99 INSTR("jal", JITFUNC(Comp_Jump), Dis_JumpType, Int_JumpType, IS_JUMP|IN_IMM26|OUT_RA|DELAYSLOT), 100 …lBranch), Dis_RelBranch2, Int_RelBranch, IS_CONDBRANCH|IN_IMM16|IN_RS|IN_RT|DELAYSLOT|CONDTYPE_EQ), 101 …lBranch), Dis_RelBranch2, Int_RelBranch, IS_CONDBRANCH|IN_IMM16|IN_RS|IN_RT|DELAYSLOT|CONDTYPE_NE), 102 …mp_RelBranch), Dis_RelBranch, Int_RelBranch, IS_CONDBRANCH|IN_IMM16|IN_RS|DELAYSLOT|CONDTYPE_LEZ), 103 …mp_RelBranch), Dis_RelBranch, Int_RelBranch, IS_CONDBRANCH|IN_IMM16|IN_RS|DELAYSLOT|CONDTYPE_GTZ), 185 INSTR("jr", JITFUNC(Comp_JumpReg), Dis_JumpRegType, Int_JumpRegType, IS_JUMP|IN_RS|DELAYSLOT), 186 …("jalr", JITFUNC(Comp_JumpReg), Dis_JumpRegType, Int_JumpRegType, IS_JUMP|IN_RS|OUT_RD|DELAYSLOT), 358 …FUNC(Comp_VBranch), Dis_VBranch, Int_VBranch, IS_CONDBRANCH|IN_IMM16|IN_VFPU_CC|DELAYSLOT|IS_VFPU), 359 …FUNC(Comp_VBranch), Dis_VBranch, Int_VBranch, IS_CONDBRANCH|IN_IMM16|IN_VFPU_CC|DELAYSLOT|IS_VFPU), [all …]
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H A D | MIPSTables.h | 45 #define DELAYSLOT 0x00000010ULL macro
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/dports/emulators/libretro-ppsspp/ppsspp-1.12.3/Core/MIPS/ |
H A D | MIPSTables.cpp | 98 INSTR("j", JITFUNC(Comp_Jump), Dis_JumpType, Int_JumpType, IS_JUMP|IN_IMM26|DELAYSLOT), 99 INSTR("jal", JITFUNC(Comp_Jump), Dis_JumpType, Int_JumpType, IS_JUMP|IN_IMM26|OUT_RA|DELAYSLOT), 100 …lBranch), Dis_RelBranch2, Int_RelBranch, IS_CONDBRANCH|IN_IMM16|IN_RS|IN_RT|DELAYSLOT|CONDTYPE_EQ), 101 …lBranch), Dis_RelBranch2, Int_RelBranch, IS_CONDBRANCH|IN_IMM16|IN_RS|IN_RT|DELAYSLOT|CONDTYPE_NE), 102 …mp_RelBranch), Dis_RelBranch, Int_RelBranch, IS_CONDBRANCH|IN_IMM16|IN_RS|DELAYSLOT|CONDTYPE_LEZ), 103 …mp_RelBranch), Dis_RelBranch, Int_RelBranch, IS_CONDBRANCH|IN_IMM16|IN_RS|DELAYSLOT|CONDTYPE_GTZ), 185 INSTR("jr", JITFUNC(Comp_JumpReg), Dis_JumpRegType, Int_JumpRegType, IS_JUMP|IN_RS|DELAYSLOT), 186 …("jalr", JITFUNC(Comp_JumpReg), Dis_JumpRegType, Int_JumpRegType, IS_JUMP|IN_RS|OUT_RD|DELAYSLOT), 358 …FUNC(Comp_VBranch), Dis_VBranch, Int_VBranch, IS_CONDBRANCH|IN_IMM16|IN_VFPU_CC|DELAYSLOT|IS_VFPU), 359 …FUNC(Comp_VBranch), Dis_VBranch, Int_VBranch, IS_CONDBRANCH|IN_IMM16|IN_VFPU_CC|DELAYSLOT|IS_VFPU), [all …]
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H A D | MIPSTables.h | 45 #define DELAYSLOT 0x00000010ULL macro
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/dports/emulators/vmips/vmips-1.5.1/test_code/vmips.outcheck/ |
H A D | bdexcp.par | 4 Priority is 5; delay state is DELAYSLOT; mem access mode is data load
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/dports/emulators/ppsspp/ppsspp-1.12.3/Core/MIPS/fake/ |
H A D | FakeJit.cpp | 108 if (info & DELAYSLOT) { in EatInstruction()
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/dports/emulators/ppsspp-qt5/ppsspp-1.12.3/Core/MIPS/fake/ |
H A D | FakeJit.cpp | 108 if (info & DELAYSLOT) { in EatInstruction()
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/dports/emulators/libretro-ppsspp/ppsspp-1.12.3/Core/MIPS/fake/ |
H A D | FakeJit.cpp | 108 if (info & DELAYSLOT) { in EatInstruction()
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/dports/emulators/ppsspp/ppsspp-1.12.3/Core/MIPS/MIPS/ |
H A D | MipsJit.cpp | 107 if (info & DELAYSLOT) { in EatInstruction()
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/dports/emulators/ppsspp-qt5/ppsspp-1.12.3/Core/MIPS/MIPS/ |
H A D | MipsJit.cpp | 107 if (info & DELAYSLOT) {
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/dports/emulators/libretro-ppsspp/ppsspp-1.12.3/Core/MIPS/MIPS/ |
H A D | MipsJit.cpp | 107 if (info & DELAYSLOT) { in EatInstruction()
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/dports/emulators/vmips/vmips-1.5.1/ |
H A D | cpu.cc | 37 static const int NORMAL = 0, DELAYING = 1, DELAYSLOT = 2; variable 262 bool delaying = (delay_state == DELAYSLOT); in exception() 1847 if (delay_state != DELAYSLOT) in step() 1920 if (delay_state == DELAYSLOT) in step()
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/dports/emulators/ppsspp-qt5/ppsspp-1.12.3/Core/MIPS/x86/ |
H A D | Jit.cpp | 259 if (info & DELAYSLOT) { in EatInstruction() 643 _dbg_assert_msg_((MIPSGetInfo(op) & DELAYSLOT) == 0, "Cannot use interpreter for branch ops."); in Comp_Generic()
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/dports/emulators/ppsspp/ppsspp-1.12.3/Core/MIPS/x86/ |
H A D | Jit.cpp | 259 if (info & DELAYSLOT) { in EatInstruction() 643 _dbg_assert_msg_((MIPSGetInfo(op) & DELAYSLOT) == 0, "Cannot use interpreter for branch ops."); in Comp_Generic()
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/dports/emulators/libretro-ppsspp/ppsspp-1.12.3/Core/MIPS/x86/ |
H A D | Jit.cpp | 259 if (info & DELAYSLOT) { in EatInstruction() 643 _dbg_assert_msg_((MIPSGetInfo(op) & DELAYSLOT) == 0, "Cannot use interpreter for branch ops."); in Comp_Generic()
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/dports/emulators/ppsspp-qt5/ppsspp-1.12.3/Core/MIPS/IR/ |
H A D | IRFrontend.cpp | 85 if (info & DELAYSLOT) { in EatInstruction()
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/dports/emulators/ppsspp/ppsspp-1.12.3/Core/MIPS/IR/ |
H A D | IRFrontend.cpp | 85 if (info & DELAYSLOT) { in EatInstruction()
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/dports/emulators/libretro-ppsspp/ppsspp-1.12.3/Core/MIPS/IR/ |
H A D | IRFrontend.cpp | 85 if (info & DELAYSLOT) { in EatInstruction()
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/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/mips/ |
H A D | interp.c | 108 #define DELAYSLOT() {\ macro 115 DELAYSLOT ();\ 2219 DELAYSLOT(); in decode_coproc()
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/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/mips/ |
H A D | interp.c | 108 #define DELAYSLOT() {\ macro 115 DELAYSLOT ();\ 2219 DELAYSLOT(); in decode_coproc()
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/dports/devel/avr-gdb/gdb-7.3.1/sim/mips/ |
H A D | interp.c | 106 #define DELAYSLOT() {\ macro 113 DELAYSLOT ();\ 2427 DELAYSLOT(); in decode_coproc()
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/dports/devel/gdb761/gdb-7.6.1/sim/mips/ |
H A D | interp.c | 107 #define DELAYSLOT() {\ macro 114 DELAYSLOT ();\ 2418 DELAYSLOT(); in decode_coproc()
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