/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AArch64/ |
H A D | AArch64InstructionSelector.cpp | 2521 static bool getLaneCopyOpcode(unsigned &CopyOpc, unsigned &ExtractSubReg, in getLaneCopyOpcode() argument 2528 ExtractSubReg = AArch64::hsub; in getLaneCopyOpcode() 2532 ExtractSubReg = AArch64::ssub; in getLaneCopyOpcode() 2536 ExtractSubReg = AArch64::dsub; in getLaneCopyOpcode() 2551 unsigned ExtractSubReg = 0; in emitExtractVectorElt() local 2552 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, ScalarTy.getSizeInBits())) { in emitExtractVectorElt() 2581 .addReg(VecReg, 0, ExtractSubReg); in emitExtractVectorElt() 2710 unsigned ExtractSubReg = 0; in selectUnmergeValues() local 2711 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, NarrowTy.getSizeInBits())) in selectUnmergeValues() 2760 .addReg(InsertRegs[0], 0, ExtractSubReg); in selectUnmergeValues()
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/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AArch64/ |
H A D | AArch64InstructionSelector.cpp | 2875 static bool getLaneCopyOpcode(unsigned &CopyOpc, unsigned &ExtractSubReg, in getLaneCopyOpcode() argument 2882 ExtractSubReg = AArch64::hsub; in getLaneCopyOpcode() 2886 ExtractSubReg = AArch64::ssub; in getLaneCopyOpcode() 2890 ExtractSubReg = AArch64::dsub; in getLaneCopyOpcode() 2905 unsigned ExtractSubReg = 0; in emitExtractVectorElt() local 2906 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, ScalarTy.getSizeInBits())) { in emitExtractVectorElt() 2935 .addReg(VecReg, 0, ExtractSubReg); in emitExtractVectorElt() 3065 unsigned ExtractSubReg = 0; in selectUnmergeValues() local 3066 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, NarrowTy.getSizeInBits())) in selectUnmergeValues() 3115 .addReg(InsertRegs[0], 0, ExtractSubReg); in selectUnmergeValues()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
H A D | AArch64InstructionSelector.cpp | 2875 static bool getLaneCopyOpcode(unsigned &CopyOpc, unsigned &ExtractSubReg, in getLaneCopyOpcode() argument 2882 ExtractSubReg = AArch64::hsub; in getLaneCopyOpcode() 2886 ExtractSubReg = AArch64::ssub; in getLaneCopyOpcode() 2890 ExtractSubReg = AArch64::dsub; in getLaneCopyOpcode() 2905 unsigned ExtractSubReg = 0; in emitExtractVectorElt() local 2906 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, ScalarTy.getSizeInBits())) { in emitExtractVectorElt() 2935 .addReg(VecReg, 0, ExtractSubReg); in emitExtractVectorElt() 3065 unsigned ExtractSubReg = 0; in selectUnmergeValues() local 3066 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, NarrowTy.getSizeInBits())) in selectUnmergeValues() 3115 .addReg(InsertRegs[0], 0, ExtractSubReg); in selectUnmergeValues()
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64InstructionSelector.cpp | 2875 static bool getLaneCopyOpcode(unsigned &CopyOpc, unsigned &ExtractSubReg, in getLaneCopyOpcode() argument 2882 ExtractSubReg = AArch64::hsub; in getLaneCopyOpcode() 2886 ExtractSubReg = AArch64::ssub; in getLaneCopyOpcode() 2890 ExtractSubReg = AArch64::dsub; in getLaneCopyOpcode() 2905 unsigned ExtractSubReg = 0; in emitExtractVectorElt() local 2906 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, ScalarTy.getSizeInBits())) { in emitExtractVectorElt() 2935 .addReg(VecReg, 0, ExtractSubReg); in emitExtractVectorElt() 3065 unsigned ExtractSubReg = 0; in selectUnmergeValues() local 3066 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, NarrowTy.getSizeInBits())) in selectUnmergeValues() 3115 .addReg(InsertRegs[0], 0, ExtractSubReg); in selectUnmergeValues()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 3448 static bool getLaneCopyOpcode(unsigned &CopyOpc, unsigned &ExtractSubReg, in getLaneCopyOpcode() argument 3455 ExtractSubReg = AArch64::hsub; in getLaneCopyOpcode() 3459 ExtractSubReg = AArch64::ssub; in getLaneCopyOpcode() 3463 ExtractSubReg = AArch64::dsub; in getLaneCopyOpcode() 3478 unsigned ExtractSubReg = 0; in emitExtractVectorElt() local 3479 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, ScalarTy.getSizeInBits())) { in emitExtractVectorElt() 3508 .addReg(VecReg, 0, ExtractSubReg); in emitExtractVectorElt() 3638 unsigned ExtractSubReg = 0; in selectUnmergeValues() local 3639 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, NarrowTy.getSizeInBits())) in selectUnmergeValues() 3688 .addReg(InsertRegs[0], 0, ExtractSubReg); in selectUnmergeValues()
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 3348 static bool getLaneCopyOpcode(unsigned &CopyOpc, unsigned &ExtractSubReg, in getLaneCopyOpcode() argument 3355 ExtractSubReg = AArch64::hsub; in getLaneCopyOpcode() 3359 ExtractSubReg = AArch64::ssub; in getLaneCopyOpcode() 3363 ExtractSubReg = AArch64::dsub; in getLaneCopyOpcode() 3378 unsigned ExtractSubReg = 0; in emitExtractVectorElt() local 3379 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, ScalarTy.getSizeInBits())) { in emitExtractVectorElt() 3408 .addReg(VecReg, 0, ExtractSubReg); in emitExtractVectorElt() 3538 unsigned ExtractSubReg = 0; in selectUnmergeValues() local 3539 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, NarrowTy.getSizeInBits())) in selectUnmergeValues() 3588 .addReg(InsertRegs[0], 0, ExtractSubReg); in selectUnmergeValues()
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/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 3349 static bool getLaneCopyOpcode(unsigned &CopyOpc, unsigned &ExtractSubReg, in getLaneCopyOpcode() argument 3356 ExtractSubReg = AArch64::hsub; in getLaneCopyOpcode() 3360 ExtractSubReg = AArch64::ssub; in getLaneCopyOpcode() 3364 ExtractSubReg = AArch64::dsub; in getLaneCopyOpcode() 3379 unsigned ExtractSubReg = 0; in emitExtractVectorElt() local 3380 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, ScalarTy.getSizeInBits())) { in emitExtractVectorElt() 3409 .addReg(VecReg, 0, ExtractSubReg); in emitExtractVectorElt() 3539 unsigned ExtractSubReg = 0; in selectUnmergeValues() local 3540 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, NarrowTy.getSizeInBits())) in selectUnmergeValues() 3589 .addReg(InsertRegs[0], 0, ExtractSubReg); in selectUnmergeValues()
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 3909 static bool getLaneCopyOpcode(unsigned &CopyOpc, unsigned &ExtractSubReg, in getLaneCopyOpcode() argument 3916 ExtractSubReg = AArch64::bsub; in getLaneCopyOpcode() 3920 ExtractSubReg = AArch64::hsub; in getLaneCopyOpcode() 3924 ExtractSubReg = AArch64::ssub; in getLaneCopyOpcode() 3928 ExtractSubReg = AArch64::dsub; in getLaneCopyOpcode() 3943 unsigned ExtractSubReg = 0; in emitExtractVectorElt() local 3944 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, ScalarTy.getSizeInBits())) { in emitExtractVectorElt() 3973 .addReg(VecReg, 0, ExtractSubReg); in emitExtractVectorElt() 4098 unsigned ExtractSubReg = 0; in selectUnmergeValues() local 4099 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, NarrowTy.getSizeInBits())) in selectUnmergeValues() [all …]
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 3845 static bool getLaneCopyOpcode(unsigned &CopyOpc, unsigned &ExtractSubReg, in getLaneCopyOpcode() argument 3852 ExtractSubReg = AArch64::hsub; in getLaneCopyOpcode() 3856 ExtractSubReg = AArch64::ssub; in getLaneCopyOpcode() 3860 ExtractSubReg = AArch64::dsub; in getLaneCopyOpcode() 3875 unsigned ExtractSubReg = 0; in emitExtractVectorElt() local 3876 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, ScalarTy.getSizeInBits())) { in emitExtractVectorElt() 3905 .addReg(VecReg, 0, ExtractSubReg); in emitExtractVectorElt() 4030 unsigned ExtractSubReg = 0; in selectUnmergeValues() local 4031 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, NarrowTy.getSizeInBits())) in selectUnmergeValues() 4087 .addReg(InsertRegs[0], 0, ExtractSubReg); in selectUnmergeValues()
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 3845 static bool getLaneCopyOpcode(unsigned &CopyOpc, unsigned &ExtractSubReg, in getLaneCopyOpcode() argument 3852 ExtractSubReg = AArch64::hsub; in getLaneCopyOpcode() 3856 ExtractSubReg = AArch64::ssub; in getLaneCopyOpcode() 3860 ExtractSubReg = AArch64::dsub; in getLaneCopyOpcode() 3875 unsigned ExtractSubReg = 0; in emitExtractVectorElt() local 3876 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, ScalarTy.getSizeInBits())) { in emitExtractVectorElt() 3905 .addReg(VecReg, 0, ExtractSubReg); in emitExtractVectorElt() 4030 unsigned ExtractSubReg = 0; in selectUnmergeValues() local 4031 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, NarrowTy.getSizeInBits())) in selectUnmergeValues() 4087 .addReg(InsertRegs[0], 0, ExtractSubReg); in selectUnmergeValues()
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 3674 static bool getLaneCopyOpcode(unsigned &CopyOpc, unsigned &ExtractSubReg, in getLaneCopyOpcode() argument 3681 ExtractSubReg = AArch64::hsub; in getLaneCopyOpcode() 3685 ExtractSubReg = AArch64::ssub; in getLaneCopyOpcode() 3689 ExtractSubReg = AArch64::dsub; in getLaneCopyOpcode() 3704 unsigned ExtractSubReg = 0; in emitExtractVectorElt() local 3705 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, ScalarTy.getSizeInBits())) { in emitExtractVectorElt() 3734 .addReg(VecReg, 0, ExtractSubReg); in emitExtractVectorElt() 3864 unsigned ExtractSubReg = 0; in selectUnmergeValues() local 3865 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, NarrowTy.getSizeInBits())) in selectUnmergeValues() 3914 .addReg(InsertRegs[0], 0, ExtractSubReg); in selectUnmergeValues()
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 3845 static bool getLaneCopyOpcode(unsigned &CopyOpc, unsigned &ExtractSubReg, in getLaneCopyOpcode() argument 3852 ExtractSubReg = AArch64::hsub; in getLaneCopyOpcode() 3856 ExtractSubReg = AArch64::ssub; in getLaneCopyOpcode() 3860 ExtractSubReg = AArch64::dsub; in getLaneCopyOpcode() 3875 unsigned ExtractSubReg = 0; in emitExtractVectorElt() local 3876 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, ScalarTy.getSizeInBits())) { in emitExtractVectorElt() 3905 .addReg(VecReg, 0, ExtractSubReg); in emitExtractVectorElt() 4030 unsigned ExtractSubReg = 0; in selectUnmergeValues() local 4031 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, NarrowTy.getSizeInBits())) in selectUnmergeValues() 4087 .addReg(InsertRegs[0], 0, ExtractSubReg); in selectUnmergeValues()
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 3845 static bool getLaneCopyOpcode(unsigned &CopyOpc, unsigned &ExtractSubReg, in getLaneCopyOpcode() argument 3852 ExtractSubReg = AArch64::hsub; in getLaneCopyOpcode() 3856 ExtractSubReg = AArch64::ssub; in getLaneCopyOpcode() 3860 ExtractSubReg = AArch64::dsub; in getLaneCopyOpcode() 3875 unsigned ExtractSubReg = 0; in emitExtractVectorElt() local 3876 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, ScalarTy.getSizeInBits())) { in emitExtractVectorElt() 3905 .addReg(VecReg, 0, ExtractSubReg); in emitExtractVectorElt() 4030 unsigned ExtractSubReg = 0; in selectUnmergeValues() local 4031 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, NarrowTy.getSizeInBits())) in selectUnmergeValues() 4087 .addReg(InsertRegs[0], 0, ExtractSubReg); in selectUnmergeValues()
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 3674 static bool getLaneCopyOpcode(unsigned &CopyOpc, unsigned &ExtractSubReg, in getLaneCopyOpcode() argument 3681 ExtractSubReg = AArch64::hsub; in getLaneCopyOpcode() 3685 ExtractSubReg = AArch64::ssub; in getLaneCopyOpcode() 3689 ExtractSubReg = AArch64::dsub; in getLaneCopyOpcode() 3704 unsigned ExtractSubReg = 0; in emitExtractVectorElt() local 3705 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, ScalarTy.getSizeInBits())) { in emitExtractVectorElt() 3734 .addReg(VecReg, 0, ExtractSubReg); in emitExtractVectorElt() 3864 unsigned ExtractSubReg = 0; in selectUnmergeValues() local 3865 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, NarrowTy.getSizeInBits())) in selectUnmergeValues() 3914 .addReg(InsertRegs[0], 0, ExtractSubReg); in selectUnmergeValues()
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 3845 static bool getLaneCopyOpcode(unsigned &CopyOpc, unsigned &ExtractSubReg, in getLaneCopyOpcode() argument 3852 ExtractSubReg = AArch64::hsub; in getLaneCopyOpcode() 3856 ExtractSubReg = AArch64::ssub; in getLaneCopyOpcode() 3860 ExtractSubReg = AArch64::dsub; in getLaneCopyOpcode() 3875 unsigned ExtractSubReg = 0; in emitExtractVectorElt() local 3876 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, ScalarTy.getSizeInBits())) { in emitExtractVectorElt() 3905 .addReg(VecReg, 0, ExtractSubReg); in emitExtractVectorElt() 4030 unsigned ExtractSubReg = 0; in selectUnmergeValues() local 4031 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, NarrowTy.getSizeInBits())) in selectUnmergeValues() 4087 .addReg(InsertRegs[0], 0, ExtractSubReg); in selectUnmergeValues()
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