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Searched refs:HEX4 (Results 1 – 25 of 66) sorted by relevance

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/dports/emulators/stella/stella-6.6/src/debugger/gui/
H A DCartFCWidget.cxx38 << " $" << Common::Base::HEX4 << hotspot << " (defines low 2 bits)\n" in description()
39 << " $" << Common::Base::HEX4 << (hotspot + 1) << " (defines high bits)\n" in description()
40 << " $" << Common::Base::HEX4 << (hotspot + 4) << " (triggers bank switch)\n"; in description()
54 info << "$" << Common::Base::HEX4 << hotspot << " = " << (bank & 0b11); in hotspotStr()
55 info << ", $" << Common::Base::HEX4 << (hotspot + 1) << " = " << (bank >> 2); in hotspotStr()
H A DCart3EPlusWidget.cxx54 info << "Bank RORG" << " = $" << Common::Base::HEX4 << start << "\n"; in description()
122 label << "$" << Common::Base::HEX4 << addr1 << "-$" << Common::Base::HEX4 << (addr1 + 0x1FF); in bankSelect()
132 label << "$" << Common::Base::HEX4 << addr2 << "-$" << Common::Base::HEX4 << (addr2 + 0x1FF); in bankSelect()
208 buf << "RAM @ $" << Common::Base::HEX4 in updateUIState()
213 buf << "RAM @ $" << Common::Base::HEX4 in updateUIState()
222 buf << "ROM @ $" << Common::Base::HEX4 in updateUIState()
227 buf << "ROM @ $" << Common::Base::HEX4 in updateUIState()
H A DCartEnhancedWidget.cxx81 << "$" << Common::Base::HEX4 << ADDR_BASE << " - " in ramDescription()
84 info << " $" << Common::Base::HEX4 << (ADDR_BASE | myCart.myReadOffset) in ramDescription()
108 << Common::Base::HEX4 << (start + myCart.myRomOffset) << " - $" << (start + 0xFFF); in romDescription()
133 << Common::Base::HEX4 << start << " - $" in romDescription()
134 << Common::Base::HEX4 << end; in romDescription()
342 desc << indent << "$" << Common::Base::HEX4 << (ADDR_BASE | myCart.myReadOffset) in internalRamDescription()
347 desc << indent << "$" << Common::Base::HEX4 << (ADDR_BASE | myCart.myWriteOffset) in internalRamDescription()
353 desc << indent << "\n$" << Common::Base::HEX4 << (ADDR_BASE | myCart.myReadOffset) in internalRamDescription()
H A DCartF0Widget.cxx38 << "Bankswitch triggered by accessing $" << Common::Base::HEX4 << 0xFFF0 << "\n"; in description()
49 << " (hotspot $" << Common::Base::HEX4 << 0xFFF0 << ")"; in bankState()
H A DCartDPCWidget.cxx35 << "DPC registers accessible @ $" << Common::Base::HEX4 << 0xF000 << " - $" << 0xF07F << "\n"
45 info << "Bank " << i << " @ $" << Common::Base::HEX4 << (start + 0x80) << " - "
58 buf << "#" << std::dec << bank << " ($" << Common::Base::HEX4 << (0xFFF8 + bank) << ")";
232 << " (hotspot $" << Common::Base::HEX4 << (0xFFF8 + myCart.getBank()) << ")"; in bankState()
253 desc << "2K display data @ $0000 - $" << Common::Base::HEX4 << 0x07FF << "\n" in internalRamDescription()
/dports/games/libretro-stella2014/stella2014-libretro-64f9364/stella/src/debugger/
H A DDiStella.cxx214 reservedLabel << "L" << Base::HEX4 << (k+myOffset); in DiStella()
253 myDisasmBuf << Base::HEX4 << myPC+myOffset << "'L" << Base::HEX4 << myPC+myOffset << "'"; in disasm()
280 myDisasmBuf << Base::HEX4 << myPC+myOffset << "'L" << Base::HEX4 << myPC+myOffset << "'"; in disasm()
286 << Base::HEX4 << myPC+myOffset << "'" in disasm()
314 myDisasmBuf << Base::HEX4 << myPC+myOffset << "'L" << Base::HEX4 in disasm()
364 myDisasmBuf << Base::HEX4 << myPC+myOffset << "'L" << Base::HEX4 << myPC+myOffset << "'"; in disasm()
432 … myDisasmBuf << Base::HEX4 << myPC+myOffset << "'L" << Base::HEX4 << myPC+myOffset << "'"; in disasm()
539 nextline << "$" << Base::HEX4 << ad; in disasm()
612 nextline << "$" << Base::HEX4 << ad << ",X"; in disasm()
662 nextline << "$" << Base::HEX4 << ad << ",Y"; in disasm()
[all …]
H A DCartDebug.hxx311 os << "start=$" << HEX4 << b.start << ", end=$" << HEX4 << b.end
312 << ", offset=$" << HEX4 << b.offset << ", size=" << dec << b.size
317 os << HEX4 << *i << " ";
/dports/devel/djgpp-binutils/binutils-2.17/bfd/
H A Dihex.c135 #define HEX4(buffer) ((HEX2 (buffer) << 8) + HEX2 ((buffer) + 2)) macro
303 addr = HEX4 (hdr + 2); in ihex_scan()
395 segbase = HEX4 (buf) << 4; in ihex_scan()
412 abfd->start_address += (HEX4 (buf) << 4) + HEX4 (buf + 4); in ihex_scan()
429 extbase = HEX4 (buf) << 16; in ihex_scan()
447 abfd->start_address += HEX4 (buf) << 16; in ihex_scan()
449 abfd->start_address = (HEX4 (buf) << 16) + HEX4 (buf + 4); in ihex_scan()
571 addr = HEX4 (hdr + 2); in ihex_read_section()
/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/bfd/
H A Dihex.c163 #define HEX4(buffer) ((HEX2 (buffer) << 8) + HEX2 ((buffer) + 2)) macro
340 addr = HEX4 (hdr + 2);
432 segbase = HEX4 (buf) << 4;
449 abfd->start_address += (HEX4 (buf) << 4) + HEX4 (buf + 4);
466 extbase = HEX4 (buf) << 16;
484 abfd->start_address += HEX4 (buf) << 16;
486 abfd->start_address = (HEX4 (buf) << 16) + HEX4 (buf + 4);
612 addr = HEX4 (hdr + 2);
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/bfd/
H A Dihex.c163 #define HEX4(buffer) ((HEX2 (buffer) << 8) + HEX2 ((buffer) + 2))
340 addr = HEX4 (hdr + 2);
432 segbase = HEX4 (buf) << 4;
449 abfd->start_address += (HEX4 (buf) << 4) + HEX4 (buf + 4);
466 extbase = HEX4 (buf) << 16;
484 abfd->start_address += HEX4 (buf) << 16;
486 abfd->start_address = (HEX4 (buf) << 16) + HEX4 (buf + 4);
612 addr = HEX4 (hdr + 2);
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/bfd/
H A Dihex.c163 #define HEX4(buffer) ((HEX2 (buffer) << 8) + HEX2 ((buffer) + 2)) macro
340 addr = HEX4 (hdr + 2);
432 segbase = HEX4 (buf) << 4;
449 abfd->start_address += (HEX4 (buf) << 4) + HEX4 (buf + 4);
466 extbase = HEX4 (buf) << 16;
484 abfd->start_address += HEX4 (buf) << 16;
486 abfd->start_address = (HEX4 (buf) << 16) + HEX4 (buf + 4);
612 addr = HEX4 (hdr + 2);
/dports/devel/binutils/binutils-2.37/bfd/
H A Dihex.c136 #define HEX4(buffer) ((HEX2 (buffer) << 8) + HEX2 ((buffer) + 2)) macro
305 addr = HEX4 (hdr + 2); in ihex_scan()
399 segbase = HEX4 (buf) << 4; in ihex_scan()
417 abfd->start_address += (HEX4 (buf) << 4) + HEX4 (buf + 4); in ihex_scan()
435 extbase = HEX4 (buf) << 16; in ihex_scan()
454 abfd->start_address += HEX4 (buf) << 16; in ihex_scan()
456 abfd->start_address = (HEX4 (buf) << 16) + HEX4 (buf + 4); in ihex_scan()
/dports/lang/gnatdroid-binutils-x86/binutils-2.27/bfd/
H A Dihex.c136 #define HEX4(buffer) ((HEX2 (buffer) << 8) + HEX2 ((buffer) + 2)) macro
304 addr = HEX4 (hdr + 2); in ihex_scan()
397 segbase = HEX4 (buf) << 4; in ihex_scan()
414 abfd->start_address += (HEX4 (buf) << 4) + HEX4 (buf + 4); in ihex_scan()
431 extbase = HEX4 (buf) << 16; in ihex_scan()
449 abfd->start_address += HEX4 (buf) << 16; in ihex_scan()
451 abfd->start_address = (HEX4 (buf) << 16) + HEX4 (buf + 4); in ihex_scan()
/dports/devel/arm-elf-binutils/binutils-2.37/bfd/
H A Dihex.c136 #define HEX4(buffer) ((HEX2 (buffer) << 8) + HEX2 ((buffer) + 2)) macro
305 addr = HEX4 (hdr + 2); in ihex_scan()
399 segbase = HEX4 (buf) << 4; in ihex_scan()
417 abfd->start_address += (HEX4 (buf) << 4) + HEX4 (buf + 4); in ihex_scan()
435 extbase = HEX4 (buf) << 16; in ihex_scan()
454 abfd->start_address += HEX4 (buf) << 16; in ihex_scan()
456 abfd->start_address = (HEX4 (buf) << 16) + HEX4 (buf + 4); in ihex_scan()
/dports/devel/gnulibiberty/binutils-2.37/bfd/
H A Dihex.c136 #define HEX4(buffer) ((HEX2 (buffer) << 8) + HEX2 ((buffer) + 2)) macro
305 addr = HEX4 (hdr + 2); in ihex_scan()
399 segbase = HEX4 (buf) << 4; in ihex_scan()
417 abfd->start_address += (HEX4 (buf) << 4) + HEX4 (buf + 4); in ihex_scan()
435 extbase = HEX4 (buf) << 16; in ihex_scan()
454 abfd->start_address += HEX4 (buf) << 16; in ihex_scan()
456 abfd->start_address = (HEX4 (buf) << 16) + HEX4 (buf + 4); in ihex_scan()
/dports/devel/avr-gdb/gdb-7.3.1/bfd/
H A Dihex.c137 #define HEX4(buffer) ((HEX2 (buffer) << 8) + HEX2 ((buffer) + 2)) macro
305 addr = HEX4 (hdr + 2); in ihex_scan()
398 segbase = HEX4 (buf) << 4; in ihex_scan()
415 abfd->start_address += (HEX4 (buf) << 4) + HEX4 (buf + 4); in ihex_scan()
432 extbase = HEX4 (buf) << 16; in ihex_scan()
450 abfd->start_address += HEX4 (buf) << 16; in ihex_scan()
452 abfd->start_address = (HEX4 (buf) << 16) + HEX4 (buf + 4); in ihex_scan()
/dports/lang/gnatdroid-binutils/binutils-2.27/bfd/
H A Dihex.c136 #define HEX4(buffer) ((HEX2 (buffer) << 8) + HEX2 ((buffer) + 2)) macro
304 addr = HEX4 (hdr + 2); in ihex_scan()
397 segbase = HEX4 (buf) << 4; in ihex_scan()
414 abfd->start_address += (HEX4 (buf) << 4) + HEX4 (buf + 4); in ihex_scan()
431 extbase = HEX4 (buf) << 16; in ihex_scan()
449 abfd->start_address += HEX4 (buf) << 16; in ihex_scan()
451 abfd->start_address = (HEX4 (buf) << 16) + HEX4 (buf + 4); in ihex_scan()
/dports/devel/gdb/gdb-11.1/bfd/
H A Dihex.c136 #define HEX4(buffer) ((HEX2 (buffer) << 8) + HEX2 ((buffer) + 2)) macro
305 addr = HEX4 (hdr + 2); in ihex_scan()
399 segbase = HEX4 (buf) << 4; in ihex_scan()
417 abfd->start_address += (HEX4 (buf) << 4) + HEX4 (buf + 4); in ihex_scan()
435 extbase = HEX4 (buf) << 16; in ihex_scan()
454 abfd->start_address += HEX4 (buf) << 16; in ihex_scan()
456 abfd->start_address = (HEX4 (buf) << 16) + HEX4 (buf + 4); in ihex_scan()
/dports/devel/gdb761/gdb-7.6.1/bfd/
H A Dihex.c137 #define HEX4(buffer) ((HEX2 (buffer) << 8) + HEX2 ((buffer) + 2)) macro
305 addr = HEX4 (hdr + 2); in ihex_scan()
398 segbase = HEX4 (buf) << 4; in ihex_scan()
415 abfd->start_address += (HEX4 (buf) << 4) + HEX4 (buf + 4); in ihex_scan()
432 extbase = HEX4 (buf) << 16; in ihex_scan()
450 abfd->start_address += HEX4 (buf) << 16; in ihex_scan()
452 abfd->start_address = (HEX4 (buf) << 16) + HEX4 (buf + 4); in ihex_scan()
/dports/lang/sdcc/sdcc-4.0.0/support/sdbinutils/bfd/
H A Dihex.c136 #define HEX4(buffer) ((HEX2 (buffer) << 8) + HEX2 ((buffer) + 2)) macro
305 addr = HEX4 (hdr + 2); in ihex_scan()
400 segbase = HEX4 (buf) << 4; in ihex_scan()
418 abfd->start_address += (HEX4 (buf) << 4) + HEX4 (buf + 4); in ihex_scan()
436 extbase = HEX4 (buf) << 16; in ihex_scan()
455 abfd->start_address += HEX4 (buf) << 16; in ihex_scan()
457 abfd->start_address = (HEX4 (buf) << 16) + HEX4 (buf + 4); in ihex_scan()
/dports/cad/yosys/yosys-yosys-0.12/examples/intel/MAX10/
H A Dtop.v2 module top ( output wire [6:0] HEX0, HEX1, HEX2, HEX3, HEX4, HEX5, HEX6, HEX7, port
10 sevenseg UUD4 (.HEX0(HEX4), .SW(SW[3:0]));
/dports/cad/yosys/yosys-yosys-0.12/examples/intel/DE2i-150/
H A Dtop.v2 module top ( output wire [6:0] HEX0, HEX1, HEX2, HEX3, HEX4, HEX5, HEX6, HEX7, port
10 sevenseg UUD4 (.HEX0(HEX4), .SW(SW[3:0]));
/dports/emulators/stella/stella-6.6/src/debugger/
H A DCartDebug.cxx728 buf << "$" << Base::HEX4 << addr; in getLabel()
1128 buf << " ORG $" << Base::HEX4 << info.offset << "\n\n"; in saveDisassembly()
1130 buf << " ORG $" << Base::HEX4 << origin << "\n" in saveDisassembly()
1131 << " RORG $" << Base::HEX4 << info.offset << "\n\n"; in saveDisassembly()
1161 buf << ALIGN(13) << "|" << "$" << Base::HEX4 << tag.address << " (G)"; in saveDisassembly()
1169 buf << ALIGN(13) << "|" << "$" << Base::HEX4 << tag.address << " (P)"; in saveDisassembly()
1285 << Base::HEX4 << right << (addr+0x280) << "\n"; in saveDisassembly()
1453 buf << " " << Base::HEX4 << i.start << " " << Base::HEX4 << i.end << endl; in listConfig()
1547 buf << "ORG " << Base::HEX4 << info.offset << endl; in getBankDirectives()
1560 buf << " " << Base::HEX4 << prev << " " << Base::HEX4 << (addr-1) << endl; in getBankDirectives()
[all …]
H A DDiStella.cxx85 reservedLabel << "L" << Base::HEX4 << (k + myOffset);
204 … myDisasmBuf << Base::HEX4 << myPC + myOffset << "'L" << Base::HEX4 << myPC + myOffset << "'"; in disasm()
274 << Base::HEX4 << myPC + myOffset << "'" in disasm()
280 … myDisasmBuf << Base::HEX4 << myPC + myOffset << "'L" << Base::HEX4 << myPC + myOffset << "'"; in disasm()
286 << Base::HEX4 << myPC + myOffset << "'" in disasm()
351 nextLine << "$" << Base::HEX4 << ad; in disasm()
415 nextLine << "$" << Base::HEX4 << ad << ",x"; in disasm()
538 nextLine << " $" << Base::HEX4 << ad; in disasm()
1112 myDisasmBuf << Base::HEX4 << myPC + myOffset << "'L" << Base::HEX4 << myPC + myOffset << "'"; in outputGraphics()
1159 myDisasmBuf << Base::HEX4 << myPC + myOffset << "'L" << Base::HEX4 << myPC + myOffset << "'"; in outputColors()
[all …]
/dports/emulators/stella/stella-6.6/src/emucore/
H A DM6532.cxx540 out << Common::Base::HEX4 << (addr | 0x80) << "," in getAccessCounters()
545 out << Common::Base::HEX4 << (addr | 0x80) << "," in getAccessCounters()
552 out << Common::Base::HEX4 << (addr | 0x180) << "," in getAccessCounters()
557 out << Common::Base::HEX4 << (addr | 0x180) << "," in getAccessCounters()
563 out << Common::Base::HEX4 << (addr | 0x280) << "," in getAccessCounters()
568 out << Common::Base::HEX4 << (addr | 0x280) << "," in getAccessCounters()

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